author | Iain Ireland <iireland@mozilla.com> |
Fri, 16 Aug 2019 19:01:41 +0000 | |
changeset 553213 | c74a30be936c3292f755f634bf64f2e03d3d6879 |
parent 553212 | 01ed7f4e9a8f62f1761b6048539cd220cdc74827 |
child 553214 | dd1ba2689a3b98d3f6b4bb34342766d7085e42d3 |
push id | 2165 |
push user | ffxbld-merge |
push date | Mon, 14 Oct 2019 16:30:58 +0000 |
treeherder | mozilla-release@0eae18af659f [default view] [failures only] |
perfherder | [talos] [build metrics] [platform microbench] (compared to previous push) |
reviewers | sstangl |
bugs | 1571918 |
milestone | 70.0a1 |
first release with | nightly linux32
nightly linux64
nightly mac
nightly win32
nightly win64
|
last release without | nightly linux32
nightly linux64
nightly mac
nightly win32
nightly win64
|
--- a/js/src/jit/MoveResolver.cpp +++ b/js/src/jit/MoveResolver.cpp @@ -184,21 +184,36 @@ bool MoveResolver::resolve() { // but the algorithm below assumes that every register can participate // in at most one cycle. To satisfy the algorithm, any double registers // that may conflict are split into their single-register halves. // // This logic is only applicable because ARM only uses registers d0-d15, // all of which alias s0-s31. Double registers d16-d31 are unused. // Therefore there is never a double move that cannot be split. // If this changes in the future, the algorithm will have to be fixed. + + bool splitDoubles = false; for (auto iter = pending_.begin(); iter != pending_.end(); ++iter) { PendingMove* pm = *iter; if (isDoubleAliasedAsSingle(pm->from()) || isDoubleAliasedAsSingle(pm->to())) { + splitDoubles = true; + break; + } + } + + if (splitDoubles) { + for (auto iter = pending_.begin(); iter != pending_.end(); ++iter) { + PendingMove *pm = *iter; + + if (!MoveIsDouble(pm->from()) && !MoveIsDouble(pm->to())) { + continue; + } + MoveOperand fromLower = SplitIntoLowerHalf(pm->from()); MoveOperand toLower = SplitIntoLowerHalf(pm->to()); PendingMove* lower = movePool_.allocate(fromLower, toLower, MoveOp::FLOAT32); if (!lower) { return false; }