Backed out 3 changesets (bug 1455028, bug 1455019, bug 1455016) because they were already pushed to inbound. DONTBUILD
authorRyan VanderMeulen <ryanvm@gmail.com>
Thu, 26 Apr 2018 05:40:13 -0400
changeset 471814 6e69352a940e1052f275518256249308f170a5f7
parent 471813 53422b4220719b9d0c4c21da881b6baff2298266
child 471815 56084ee1029acf0a608eb8122d5451354ddee7fd
push id1728
push userjlund@mozilla.com
push dateMon, 18 Jun 2018 21:12:27 +0000
treeherdermozilla-release@c296fde26f5f [default view] [failures only]
perfherder[talos] [build metrics] [platform microbench] (compared to previous push)
bugs1455028, 1455019, 1455016
milestone61.0a1
backs out53422b4220719b9d0c4c21da881b6baff2298266
1b5f2913b206dec1926bd8f482ec97d4897bc97e
f93d567284f7365632af954635ccfd438e8f2ed8
first release with
nightly linux32
nightly linux64
nightly mac
nightly win32
nightly win64
last release without
nightly linux32
nightly linux64
nightly mac
nightly win32
nightly win64
Backed out 3 changesets (bug 1455028, bug 1455019, bug 1455016) because they were already pushed to inbound. DONTBUILD Backed out changeset 53422b422071 (bug 1455028) Backed out changeset 1b5f2913b206 (bug 1455019) Backed out changeset f93d567284f7 (bug 1455016)
js/src/jit/mips64/MacroAssembler-mips64.cpp
js/src/jit/mips64/Simulator-mips64.cpp
js/src/jit/mips64/Simulator-mips64.h
--- a/js/src/jit/mips64/MacroAssembler-mips64.cpp
+++ b/js/src/jit/mips64/MacroAssembler-mips64.cpp
@@ -325,17 +325,17 @@ void
 MacroAssemblerMIPS64::ma_dror(Register rd, Register rt, Register shift)
 {
     as_drotrv(rd, rt, shift);
 }
 
 void
 MacroAssemblerMIPS64::ma_drol(Register rd, Register rt, Register shift)
 {
-    as_dsubu(ScratchRegister, zero, shift);
+    ma_negu(ScratchRegister, shift);
     as_drotrv(rd, rt, ScratchRegister);
 }
 
 void
 MacroAssemblerMIPS64::ma_dins(Register rt, Register rs, Imm32 pos, Imm32 size)
 {
     if (pos.value >= 0 && pos.value < 32) {
         if (pos.value + size.value > 32)
--- a/js/src/jit/mips64/Simulator-mips64.cpp
+++ b/js/src/jit/mips64/Simulator-mips64.cpp
@@ -31,17 +31,16 @@
 
 #include "mozilla/Casting.h"
 #include "mozilla/FloatingPoint.h"
 #include "mozilla/IntegerPrintfMacros.h"
 #include "mozilla/Likely.h"
 #include "mozilla/MathAlgorithms.h"
 
 #include <float.h>
-#include <limits>
 
 #include "jit/AtomicOperations.h"
 #include "jit/mips64/Assembler-mips64.h"
 #include "threading/LockGuard.h"
 #include "vm/Runtime.h"
 #include "wasm/WasmInstance.h"
 #include "wasm/WasmSignalHandlers.h"
 
@@ -1553,17 +1552,16 @@ Simulator::setFCSRBit(uint32_t cc, bool 
 bool
 Simulator::testFCSRBit(uint32_t cc)
 {
     return FCSR_ & (1 << cc);
 }
 
 // Sets the rounding error codes in FCSR based on the result of the rounding.
 // Returns true if the operation was invalid.
-template <typename T>
 bool
 Simulator::setFCSRRoundError(double original, double rounded)
 {
     bool ret = false;
 
     setFCSRBit(kFCSRInexactCauseBit, false);
     setFCSRBit(kFCSRUnderflowCauseBit, false);
     setFCSRBit(kFCSROverflowCauseBit, false);
@@ -1581,19 +1579,17 @@ Simulator::setFCSRRoundError(double orig
     }
 
     if (rounded < DBL_MIN && rounded > -DBL_MIN && rounded != 0) {
         setFCSRBit(kFCSRUnderflowFlagBit, true);
         setFCSRBit(kFCSRUnderflowCauseBit, true);
         ret = true;
     }
 
-    if ((long double)rounded > (long double)std::numeric_limits<T>::max() ||
-        (long double)rounded < (long double)std::numeric_limits<T>::min())
-    {
+    if (rounded > INT_MAX || rounded < INT_MIN) {
         setFCSRBit(kFCSROverflowFlagBit, true);
         setFCSRBit(kFCSROverflowCauseBit, true);
         // The reference is not really clear but it seems this is required:
         setFCSRBit(kFCSRInvalidOpFlagBit, true);
         setFCSRBit(kFCSRInvalidOpCauseBit, true);
         ret = true;
     }
 
@@ -2114,29 +2110,29 @@ typedef int64_t (*Prototype_General7)(in
 typedef int64_t (*Prototype_General8)(int64_t arg0, int64_t arg1, int64_t arg2, int64_t arg3,
                                       int64_t arg4, int64_t arg5, int64_t arg6, int64_t arg7);
 typedef int32_t (*Prototype_Int_GeneralGeneralGeneralInt64)(int64_t arg0, int64_t arg1, int64_t arg2,
                                                         int64_t arg3);
 typedef int32_t (*Prototype_Int_GeneralGeneralInt64Int64)(int64_t arg0, int64_t arg1, int64_t arg2,
                                                       int64_t arg3);
 typedef double (*Prototype_Double_None)();
 typedef double (*Prototype_Double_Double)(double arg0);
-typedef double (*Prototype_Double_Int)(int64_t arg0);
-typedef int64_t (*Prototype_Int_Double)(double arg0);
-typedef int64_t (*Prototype_Int_DoubleIntInt)(double arg0, int64_t arg1, int64_t arg2);
-typedef int64_t (*Prototype_Int_IntDoubleIntInt)(int64_t arg0, double arg1, int64_t arg2,
-                                                 int64_t arg3);
+typedef double (*Prototype_Double_Int)(int32_t arg0);
+typedef int32_t (*Prototype_Int_Double)(double arg0);
+typedef int32_t (*Prototype_Int_DoubleIntInt)(double arg0, int32_t arg1, int32_t arg2);
+typedef int32_t (*Prototype_Int_IntDoubleIntInt)(int32_t arg0, double arg1, int32_t arg2,
+                                                 int32_t arg3);
 typedef float (*Prototype_Float32_Float32)(float arg0);
 typedef float (*Prototype_Float32_Float32Float32)(float arg0, float arg1);
-typedef float (*Prototype_Float32_IntInt)(int64_t arg0, int64_t arg1);
-
-typedef double (*Prototype_Double_DoubleInt)(double arg0, int64_t arg1);
-typedef double (*Prototype_Double_IntDouble)(int64_t arg0, double arg1);
+typedef float (*Prototype_Float32_IntInt)(int32_t arg0, int32_t arg1);
+
+typedef double (*Prototype_Double_DoubleInt)(double arg0, int32_t arg1);
+typedef double (*Prototype_Double_IntDouble)(int32_t arg0, double arg1);
 typedef double (*Prototype_Double_DoubleDouble)(double arg0, double arg1);
-typedef int64_t (*Prototype_Int_IntDouble)(int64_t arg0, double arg1);
+typedef int32_t (*Prototype_Int_IntDouble)(int32_t arg0, double arg1);
 
 typedef double (*Prototype_Double_DoubleDoubleDouble)(double arg0, double arg1, double arg2);
 typedef double (*Prototype_Double_DoubleDoubleDoubleDouble)(double arg0, double arg1,
                                                             double arg2, double arg3);
 
 // Software interrupt instructions are used by the simulator to call into C++.
 void
 Simulator::softwareInterrupt(SimInstruction* instr)
@@ -2189,18 +2185,19 @@ Simulator::softwareInterrupt(SimInstruct
             Prototype_General2 target = reinterpret_cast<Prototype_General2>(external);
             int64_t result = target(arg0, arg1);
             setCallResult(result);
             break;
           }
           case Args_General3: {
             Prototype_General3 target = reinterpret_cast<Prototype_General3>(external);
             int64_t result = target(arg0, arg1, arg2);
-            if (external == intptr_t(&js::wasm::Instance::wake))
+            if(external == intptr_t(&js::wasm::Instance::wake)) {
                 result = int32_t(result);
+            }
             setCallResult(result);
             break;
           }
           case Args_General4: {
             Prototype_General4 target = reinterpret_cast<Prototype_General4>(external);
             int64_t result = target(arg0, arg1, arg2, arg3);
             setCallResult(result);
             break;
@@ -2236,52 +2233,46 @@ Simulator::softwareInterrupt(SimInstruct
             Prototype_Double_None target = reinterpret_cast<Prototype_Double_None>(external);
             double dresult = target();
             setCallResultDouble(dresult);
             break;
           }
           case Args_Int_Double: {
             double dval0 = getFpuRegisterDouble(12);
             Prototype_Int_Double target = reinterpret_cast<Prototype_Int_Double>(external);
-            int64_t result = target(dval0);
-            if (external == intptr_t((int32_t(*)(double))JS::ToInt32))
-                result = int32_t(result);
-            setRegister(v0, result);
+            int32_t res = target(dval0);
+            setRegister(v0, res);
             break;
           }
           case Args_Int_GeneralGeneralGeneralInt64: {
             Prototype_Int_GeneralGeneralGeneralInt64 target =
                 reinterpret_cast<Prototype_Int_GeneralGeneralGeneralInt64>(external);
-            int64_t result = target(arg0, arg1, arg2, arg3);
-            if (external == intptr_t(&js::wasm::Instance::wait_i32))
-                result = int32_t(result);
-            setRegister(v0, result);
+            int32_t res = target(arg0, arg1, arg2, arg3);
+            setRegister(v0, res);
             break;
           }
           case Args_Int_GeneralGeneralInt64Int64: {
             Prototype_Int_GeneralGeneralInt64Int64 target =
                 reinterpret_cast<Prototype_Int_GeneralGeneralInt64Int64>(external);
-            int64_t result = target(arg0, arg1, arg2, arg3);
-            if (external == intptr_t(&js::wasm::Instance::wait_i64))
-                result = int32_t(result);
-            setRegister(v0, result);
+            int32_t res = target(arg0, arg1, arg2, arg3);
+            setRegister(v0, res);
             break;
           }
           case Args_Int_DoubleIntInt: {
             double dval = getFpuRegisterDouble(12);
             Prototype_Int_DoubleIntInt target = reinterpret_cast<Prototype_Int_DoubleIntInt>(external);
-            int64_t result = target(dval, arg1, arg2);
-            setRegister(v0, result);
+            int32_t res = target(dval, int32_t(arg1), int32_t(arg2));
+            setRegister(v0, res);
             break;
           }
           case Args_Int_IntDoubleIntInt: {
             double dval = getFpuRegisterDouble(13);
             Prototype_Int_IntDoubleIntInt target = reinterpret_cast<Prototype_Int_IntDoubleIntInt>(external);
-            int64_t result = target(arg0, dval, arg2, arg3);
-            setRegister(v0, result);
+            int32_t res = target(int32_t(arg0), dval, int32_t(arg2), int32_t(arg3));
+            setRegister(v0, res);
             break;
           }
           case Args_Double_Double: {
             double dval0 = getFpuRegisterDouble(12);
             Prototype_Double_Double target = reinterpret_cast<Prototype_Double_Double>(external);
             double dresult = target(dval0);
             setCallResultDouble(dresult);
             break;
@@ -2301,52 +2292,52 @@ Simulator::softwareInterrupt(SimInstruct
             fval1 = getFpuRegisterFloat(13);
             Prototype_Float32_Float32Float32 target = reinterpret_cast<Prototype_Float32_Float32Float32>(external);
             float fresult = target(fval0, fval1);
             setCallResultFloat(fresult);
             break;
           }
           case Args_Float32_IntInt: {
             Prototype_Float32_IntInt target = reinterpret_cast<Prototype_Float32_IntInt>(external);
-            float fresult = target(arg0, arg1);
+            float fresult = target(int32_t(arg0), int32_t(arg1));
             setCallResultFloat(fresult);
             break;
           }
           case Args_Double_Int: {
             Prototype_Double_Int target = reinterpret_cast<Prototype_Double_Int>(external);
-            double dresult = target(arg0);
+            double dresult = target(int32_t(arg0));
             setCallResultDouble(dresult);
             break;
           }
           case Args_Double_DoubleInt: {
             double dval0 = getFpuRegisterDouble(12);
             Prototype_Double_DoubleInt target = reinterpret_cast<Prototype_Double_DoubleInt>(external);
-            double dresult = target(dval0, arg1);
+            double dresult = target(dval0, int32_t(arg1));
             setCallResultDouble(dresult);
             break;
           }
           case Args_Double_DoubleDouble: {
             double dval0 = getFpuRegisterDouble(12);
             double dval1 = getFpuRegisterDouble(13);
             Prototype_Double_DoubleDouble target = reinterpret_cast<Prototype_Double_DoubleDouble>(external);
             double dresult = target(dval0, dval1);
             setCallResultDouble(dresult);
             break;
           }
           case Args_Double_IntDouble: {
             double dval1 = getFpuRegisterDouble(13);
             Prototype_Double_IntDouble target = reinterpret_cast<Prototype_Double_IntDouble>(external);
-            double dresult = target(arg0, dval1);
+            double dresult = target(int32_t(arg0), dval1);
             setCallResultDouble(dresult);
             break;
           }
           case Args_Int_IntDouble: {
             double dval1 = getFpuRegisterDouble(13);
             Prototype_Int_IntDouble target = reinterpret_cast<Prototype_Int_IntDouble>(external);
-            int64_t result = target(arg0, dval1);
+            int32_t result = target(int32_t(arg0), dval1);
             setRegister(v0, result);
             break;
           }
           case Args_Double_DoubleDoubleDouble: {
             double dval0 = getFpuRegisterDouble(12);
             double dval1 = getFpuRegisterDouble(13);
             double dval2 = getFpuRegisterDouble(14);
             Prototype_Double_DoubleDoubleDouble target =
@@ -2734,17 +2725,17 @@ Simulator::configureTypeRegister(SimInst
             break;
           case ff_xor:
             alu_out = rs ^ rt;
             break;
           case ff_nor:
             alu_out = ~(rs | rt);
             break;
           case ff_slt:
-            alu_out = I64(rs) < I64(rt) ? 1 : 0;
+            alu_out = I32_CHECK(rs) < I32_CHECK(rt) ? 1 : 0;
             break;
           case ff_sltu:
             alu_out = U64(rs) < U64(rt) ? 1 : 0;
             break;
           case ff_sync:
             break;
             // Break and trap instructions.
           case ff_break:
@@ -2778,17 +2769,17 @@ Simulator::configureTypeRegister(SimInst
                 i128hilo = U32(INT_MIN);
             } else {
                 uint32_t div = I32_CHECK(rs) / I32_CHECK(rt);
                 uint32_t mod = I32_CHECK(rs) % I32_CHECK(rt);
                 i128hilo = (I64(mod) << 32) | div;
             }
             break;
           case ff_ddiv:
-            if (I64(rs) == INT64_MIN && I64(rt) == -1) {
+            if (I32_CHECK(rs) == INT_MIN && I32_CHECK(rt) == -1) {
                 i128hilo = U64(INT64_MIN);
             } else {
                 uint64_t div = rs / rt;
                 uint64_t mod = rs % rt;
                 i128hilo = (I128(mod) << 64) | div;
             }
             break;
           case ff_divu: {
@@ -3090,82 +3081,75 @@ Simulator::decodeTypeRegister(SimInstruc
                 float rounded = std::floor(fs_value + 0.5);
                 int32_t result = I32(rounded);
                 if ((result & 1) != 0 && result - fs_value == 0.5) {
                     // If the number is halfway between two integers,
                     // round to the even one.
                     result--;
                 }
                 setFpuRegisterLo(fd_reg, result);
-                if (setFCSRRoundError<int32_t>(fs_value, rounded))
+                if (setFCSRRoundError(fs_value, rounded)) {
                     setFpuRegisterLo(fd_reg, kFPUInvalidResult);
+                }
                 break;
               }
               case ff_trunc_w_fmt: { // Truncate float to word (round towards 0).
                 float rounded = truncf(fs_value);
                 int32_t result = I32(rounded);
                 setFpuRegisterLo(fd_reg, result);
-                if (setFCSRRoundError<int32_t>(fs_value, rounded))
+                if (setFCSRRoundError(fs_value, rounded)) {
                     setFpuRegisterLo(fd_reg, kFPUInvalidResult);
+                }
                 break;
               }
               case ff_floor_w_fmt: { // Round float to word towards negative infinity.
                 float rounded = std::floor(fs_value);
                 int32_t result = I32(rounded);
                 setFpuRegisterLo(fd_reg, result);
-                if (setFCSRRoundError<int32_t>(fs_value, rounded))
+                if (setFCSRRoundError(fs_value, rounded)) {
                     setFpuRegisterLo(fd_reg, kFPUInvalidResult);
+                }
                 break;
               }
               case ff_ceil_w_fmt: { // Round double to word towards positive infinity.
                 float rounded = std::ceil(fs_value);
                 int32_t result = I32(rounded);
                 setFpuRegisterLo(fd_reg, result);
-                if (setFCSRRoundError<int32_t>(fs_value, rounded))
+                if (setFCSRRoundError(fs_value, rounded)) {
                     setFpuRegisterLo(fd_reg, kFPUInvalidResult);
+                }
                 break;
               }
-              case ff_cvt_l_fmt:  // Mips64r2: Truncate float to 64-bit long-word.
-                // Rounding modes are not yet supported.
-                MOZ_ASSERT((FCSR_ & 3) == 0);
-                // In rounding mode 0 it should behave like ROUND.
-                MOZ_FALLTHROUGH;
+              case ff_cvt_l_fmt: {  // Mips64r2: Truncate float to 64-bit long-word.
+                float rounded = truncf(fs_value);
+                i64 = I64(rounded);
+                setFpuRegister(fd_reg, i64);
+                break;
+              }
               case ff_round_l_fmt: {  // Mips64r2 instruction.
                 float rounded =
                     fs_value > 0 ? std::floor(fs_value + 0.5) : std::ceil(fs_value - 0.5);
                 i64 = I64(rounded);
                 setFpuRegister(fd_reg, i64);
-                if (setFCSRRoundError<int64_t>(fs_value, rounded))
-                    setFpuRegister(fd_reg, kFPUInvalidResult64);
                 break;
               }
               case ff_trunc_l_fmt: {  // Mips64r2 instruction.
                 float rounded = truncf(fs_value);
                 i64 = I64(rounded);
                 setFpuRegister(fd_reg, i64);
-                if (setFCSRRoundError<int64_t>(fs_value, rounded))
-                    setFpuRegister(fd_reg, kFPUInvalidResult64);
                 break;
               }
-              case ff_floor_l_fmt: {  // Mips64r2 instruction.
-                float rounded = std::floor(fs_value);
-                i64 = I64(rounded);
+              case ff_floor_l_fmt:  // Mips64r2 instruction.
+                i64 = I64(std::floor(fs_value));
                 setFpuRegister(fd_reg, i64);
-                if (setFCSRRoundError<int64_t>(fs_value, rounded))
-                    setFpuRegister(fd_reg, kFPUInvalidResult64);
                 break;
-              }
-              case ff_ceil_l_fmt: {  // Mips64r2 instruction.
-                float rounded = std::ceil(fs_value);
-                i64 = I64(rounded);
+              case ff_ceil_l_fmt:  // Mips64r2 instruction.
+                i64 = I64(std::ceil(fs_value));
                 setFpuRegister(fd_reg, i64);
-                if (setFCSRRoundError<int64_t>(fs_value, rounded))
-                    setFpuRegister(fd_reg, kFPUInvalidResult64);
                 break;
-              }
               case ff_cvt_ps_s:
               case ff_c_f_fmt:
                 MOZ_CRASH();
                 break;
               case ff_movf_fmt:
                 if (testFCSRBit(fcsr_cc)) {
                   setFpuRegisterFloat(fd_reg, getFpuRegisterFloat(fs_reg));
                 }
@@ -3248,85 +3232,74 @@ Simulator::decodeTypeRegister(SimInstruc
                 double rounded = std::floor(ds_value + 0.5);
                 int32_t result = I32(rounded);
                 if ((result & 1) != 0 && result - ds_value == 0.5) {
                     // If the number is halfway between two integers,
                     // round to the even one.
                     result--;
                 }
                 setFpuRegisterLo(fd_reg, result);
-                if (setFCSRRoundError<int32_t>(ds_value, rounded))
+                if (setFCSRRoundError(ds_value, rounded))
                     setFpuRegisterLo(fd_reg, kFPUInvalidResult);
                 break;
               }
               case ff_trunc_w_fmt: { // Truncate double to word (round towards 0).
                 double rounded = trunc(ds_value);
                 int32_t result = I32(rounded);
                 setFpuRegisterLo(fd_reg, result);
-                if (setFCSRRoundError<int32_t>(ds_value, rounded))
+                if (setFCSRRoundError(ds_value, rounded))
                     setFpuRegisterLo(fd_reg, kFPUInvalidResult);
                 break;
               }
               case ff_floor_w_fmt: { // Round double to word towards negative infinity.
                 double rounded = std::floor(ds_value);
                 int32_t result = I32(rounded);
                 setFpuRegisterLo(fd_reg, result);
-                if (setFCSRRoundError<int32_t>(ds_value, rounded))
+                if (setFCSRRoundError(ds_value, rounded))
                     setFpuRegisterLo(fd_reg, kFPUInvalidResult);
                 break;
               }
               case ff_ceil_w_fmt: { // Round double to word towards positive infinity.
                 double rounded = std::ceil(ds_value);
                 int32_t result = I32(rounded);
                 setFpuRegisterLo(fd_reg, result);
-                if (setFCSRRoundError<int32_t>(ds_value, rounded))
+                if (setFCSRRoundError(ds_value, rounded))
                     setFpuRegisterLo(fd_reg, kFPUInvalidResult);
                 break;
               }
               case ff_cvt_s_fmt:  // Convert double to float (single).
                 setFpuRegisterFloat(fd_reg, static_cast<float>(ds_value));
                 break;
-              case ff_cvt_l_fmt:  // Mips64r2: Truncate double to 64-bit long-word.
-                // Rounding modes are not yet supported.
-                MOZ_ASSERT((FCSR_ & 3) == 0);
-                // In rounding mode 0 it should behave like ROUND.
-                MOZ_FALLTHROUGH;
-              case ff_round_l_fmt: {  // Mips64r2 instruction.
-                double rounded =
-                    ds_value > 0 ? std::floor(ds_value + 0.5) : std::ceil(ds_value - 0.5);
+              case ff_cvt_l_fmt: {  // Mips64r2: Truncate double to 64-bit long-word.
+                double rounded = trunc(ds_value);
                 i64 = I64(rounded);
                 setFpuRegister(fd_reg, i64);
-                if (setFCSRRoundError<int64_t>(ds_value, rounded))
-                    setFpuRegister(fd_reg, kFPUInvalidResult64);
                 break;
               }
               case ff_trunc_l_fmt: {  // Mips64r2 instruction.
                 double rounded = trunc(ds_value);
                 i64 = I64(rounded);
                 setFpuRegister(fd_reg, i64);
-                if (setFCSRRoundError<int64_t>(ds_value, rounded))
-                    setFpuRegister(fd_reg, kFPUInvalidResult64);
                 break;
               }
-              case ff_floor_l_fmt: {  // Mips64r2 instruction.
-                double rounded = std::floor(ds_value);
+              case ff_round_l_fmt: {  // Mips64r2 instruction.
+                double rounded =
+                    ds_value > 0 ? std::floor(ds_value + 0.5) : std::ceil(ds_value - 0.5);
                 i64 = I64(rounded);
                 setFpuRegister(fd_reg, i64);
-                if (setFCSRRoundError<int64_t>(ds_value, rounded))
-                    setFpuRegister(fd_reg, kFPUInvalidResult64);
                 break;
               }
-              case ff_ceil_l_fmt: {  // Mips64r2 instruction.
-                double rounded = std::ceil(ds_value);
-                i64 = I64(rounded);
+              case ff_floor_l_fmt:  // Mips64r2 instruction.
+                i64 = I64(std::floor(ds_value));
                 setFpuRegister(fd_reg, i64);
-                if (setFCSRRoundError<int64_t>(ds_value, rounded))
-                    setFpuRegister(fd_reg, kFPUInvalidResult64);
                 break;
-              }
+              case ff_ceil_l_fmt:  // Mips64r2 instruction.
+                i64 = I64(std::ceil(ds_value));
+                setFpuRegister(fd_reg, i64);
+                break;
               case ff_c_f_fmt:
                 MOZ_CRASH();
                 break;
               case ff_movz_fmt:
                 if (rt == 0) {
                   setFpuRegisterDouble(fd_reg, getFpuRegisterDouble(fs_reg));
                 }
                 break;
--- a/js/src/jit/mips64/Simulator-mips64.h
+++ b/js/src/jit/mips64/Simulator-mips64.h
@@ -70,17 +70,16 @@ const int kPCRegister = 34;
 
 // Number coprocessor registers.
 const int kNumFPURegisters = 32;
 
 // FPU (coprocessor 1) control registers. Currently only FCSR is implemented.
 const int kFCSRRegister = 31;
 const int kInvalidFPUControlRegister = -1;
 const uint32_t kFPUInvalidResult = static_cast<uint32_t>(1 << 31) - 1;
-const uint64_t kFPUInvalidResult64 = static_cast<uint64_t>(1ULL << 63) - 1;
 
 // FCSR constants.
 const uint32_t kFCSRInexactFlagBit = 2;
 const uint32_t kFCSRUnderflowFlagBit = 3;
 const uint32_t kFCSROverflowFlagBit = 4;
 const uint32_t kFCSRDivideByZeroFlagBit = 5;
 const uint32_t kFCSRInvalidOpFlagBit = 6;
 
@@ -193,17 +192,16 @@ class Simulator {
     void setFpuRegisterDouble(int fpureg, double value);
     int64_t getFpuRegister(int fpureg) const;
     int32_t getFpuRegisterLo(int fpureg) const;
     int32_t getFpuRegisterHi(int fpureg) const;
     float getFpuRegisterFloat(int fpureg) const;
     double getFpuRegisterDouble(int fpureg) const;
     void setFCSRBit(uint32_t cc, bool value);
     bool testFCSRBit(uint32_t cc);
-    template <typename T>
     bool setFCSRRoundError(double original, double rounded);
 
     // Special case of set_register and get_register to access the raw PC value.
     void set_pc(int64_t value);
     int64_t get_pc() const;
 
     template <typename T>
     T get_pc_as() const { return reinterpret_cast<T>(get_pc()); }