Bug 1516720 - Make an overbroad assertion narrower. r=jseward, a=RyanVM DEVEDITION_65_0b8_BUILD1 DEVEDITION_65_0b8_RELEASE FENNEC_65_0b8_BUILD1 FENNEC_65_0b8_RELEASE FIREFOX_65_0b8_BUILD1 FIREFOX_65_0b8_RELEASE
authorLars T Hansen <lhansen@mozilla.com>
Wed, 02 Jan 2019 11:01:27 +0100
changeset 509278 35ba72605a9aba2f4d8cb9b0d024c73395b2536e
parent 509277 2ec4c1f9e95d51e1f356151e57b1ae47224c48c7
child 509279 945390fae56e0e45d71f6f2d1c41d59fd0383940
push id1905
push userffxbld-merge
push dateMon, 21 Jan 2019 12:33:13 +0000
treeherdermozilla-release@c2fca1944d8c [default view] [failures only]
perfherder[talos] [build metrics] [platform microbench] (compared to previous push)
reviewersjseward, RyanVM
bugs1516720
milestone65.0
Bug 1516720 - Make an overbroad assertion narrower. r=jseward, a=RyanVM We use a cmpxchg loop on x86 / x64 systems to implement bitwise read-modify-write atomic operations. This means that we can use word-width operations even when we're operating on sub-wordsize data, so there's no reason to force the RMW operand into a byte-wide register - only the registers used for the memory access need be special on x86, since memory accesses must still be word-wide. Thus the assertion that asserts that the value must be in a byte register applies only to ADD and SUB (since they use XADD and require a byte register).
js/src/jit/x86-shared/MacroAssembler-x86-shared.cpp
--- a/js/src/jit/x86-shared/MacroAssembler-x86-shared.cpp
+++ b/js/src/jit/x86-shared/MacroAssembler-x86-shared.cpp
@@ -1169,21 +1169,21 @@ static void AtomicFetchOp(MacroAssembler
     masm.j(MacroAssembler::NonZero, &again);       \
   } while (0)
 
   MOZ_ASSERT_IF(op == AtomicFetchAddOp || op == AtomicFetchSubOp,
                 temp == InvalidReg);
 
   switch (Scalar::byteSize(arrayType)) {
     case 1:
-      CheckBytereg(value);
       CheckBytereg(output);
       switch (op) {
         case AtomicFetchAddOp:
         case AtomicFetchSubOp:
+          CheckBytereg(value);  // But not for the bitwise ops
           SetupValue(masm, op, value, output);
           if (access) masm.append(*access, masm.size());
           masm.lock_xaddb(output, Operand(mem));
           break;
         case AtomicFetchAndOp:
           CheckBytereg(temp);
           ATOMIC_BITOP_BODY(movb, andl, lock_cmpxchgb);
           break;