Back out 12 changesets (bug 1199719) for rebasing on top of something that's being backed out
authorPhil Ringnalda <philringnalda@gmail.com>
Thu, 10 Sep 2015 13:47:12 -0700
changeset 294474 f11cf71a5ccad575161d0208044aef25199c7823
parent 294473 54ddccf4ddc0a00f7d2c52e2a4745e635170d4ef
child 294475 91f4cc676c0a748d513a26b8689553dbf2033653
push id5245
push userraliiev@mozilla.com
push dateThu, 29 Oct 2015 11:30:51 +0000
treeherdermozilla-beta@dac831dc1bd0 [default view] [failures only]
perfherder[talos] [build metrics] [platform microbench] (compared to previous push)
bugs1199719
milestone43.0a1
backs out54ddccf4ddc0a00f7d2c52e2a4745e635170d4ef
2521189eba907c1d48f1c5f0d5d2e59d7e64e4f0
26ea83669c9a644b421b7c536a45e125e3bfa2b7
da69d8d082af861eb8280c41dab94df9b4b039e4
e5ec584b2b69b67441323978746403c45bb53423
399f2af808f36cc0c163edd099ca2cb1268028cd
a49cedf75457d76a64bf7f4e11b0f80811d6a32b
67639ac86e67440fb912d37ff88f123457b38696
03b7e2925296823b91ef42643bfad18ad94195fd
9323fe8bdd2841f982ad6d1c0eea3fcb1a97b6fe
05774944054d46c9b97818ba3aed9b79a0144587
c7b1feca53f98a4d5c8dbf3a6358c60f834245cb
first release with
nightly linux32
nightly linux64
nightly mac
nightly win32
nightly win64
last release without
nightly linux32
nightly linux64
nightly mac
nightly win32
nightly win64
Back out 12 changesets (bug 1199719) for rebasing on top of something that's being backed out Backed out changeset 54ddccf4ddc0 (bug 1199719) Backed out changeset 2521189eba90 (bug 1199719) Backed out changeset 26ea83669c9a (bug 1199719) Backed out changeset da69d8d082af (bug 1199719) Backed out changeset e5ec584b2b69 (bug 1199719) Backed out changeset 399f2af808f3 (bug 1199719) Backed out changeset a49cedf75457 (bug 1199719) Backed out changeset 67639ac86e67 (bug 1199719) Backed out changeset 03b7e2925296 (bug 1199719) Backed out changeset 9323fe8bdd28 (bug 1199719) Backed out changeset 05774944054d (bug 1199719) Backed out changeset c7b1feca53f9 (bug 1199719)
js/src/asmjs/AsmJSModule.cpp
js/src/asmjs/AsmJSValidate.cpp
js/src/frontend/Parser.cpp
js/src/jit/MacroAssembler-inl.h
js/src/jit/MacroAssembler.h
js/src/jit/arm/MacroAssembler-arm-inl.h
js/src/jit/arm/MacroAssembler-arm.cpp
js/src/jit/arm/MacroAssembler-arm.h
js/src/jit/arm64/MacroAssembler-arm64-inl.h
js/src/jit/arm64/MacroAssembler-arm64.h
js/src/jit/mips32/Assembler-mips32.cpp
js/src/jit/mips32/MacroAssembler-mips32-inl.h
js/src/jit/mips32/MacroAssembler-mips32.cpp
js/src/jit/mips32/MacroAssembler-mips32.h
js/src/jit/none/MacroAssembler-none.h
js/src/jit/x64/MacroAssembler-x64-inl.h
js/src/jit/x64/MacroAssembler-x64.h
js/src/jit/x86-shared/MacroAssembler-x86-shared-inl.h
js/src/jit/x86-shared/MacroAssembler-x86-shared.h
js/src/jit/x86/MacroAssembler-x86-inl.h
js/src/jit/x86/MacroAssembler-x86.h
--- a/js/src/asmjs/AsmJSModule.cpp
+++ b/js/src/asmjs/AsmJSModule.cpp
@@ -1433,19 +1433,17 @@ AsmJSModule::CodeRange::CodeRange(AsmJSE
 
     MOZ_ASSERT(begin_ < profilingReturn_);
     MOZ_ASSERT(profilingReturn_ < end_);
 }
 
 void
 AsmJSModule::CodeRange::updateOffsets(jit::MacroAssembler& masm)
 {
-    uint32_t entryBefore = 0;
-    uint32_t profilingJumpBefore = 0;
-    uint32_t profilingEpilogueBefore = 0;
+    uint32_t entryBefore, profilingJumpBefore, profilingEpilogueBefore;
     if (isFunction()) {
         entryBefore = entry();
         profilingJumpBefore = profilingJump();
         profilingEpilogueBefore = profilingEpilogue();
     }
 
     begin_ = masm.actualOffset(begin_);
     profilingReturn_ = masm.actualOffset(profilingReturn_);
--- a/js/src/asmjs/AsmJSValidate.cpp
+++ b/js/src/asmjs/AsmJSValidate.cpp
@@ -2694,17 +2694,17 @@ ExtractNumericNonFloatValue(ParseNode* p
     return NumberNodeValue(pn);
 }
 
 static AsmJSNumLit
 ExtractSimdValue(ModuleValidator& m, ParseNode* pn)
 {
     MOZ_ASSERT(IsSimdLiteral(m, pn));
 
-    AsmJSSimdType type = AsmJSSimdType_int32x4;
+    AsmJSSimdType type;
     JS_ALWAYS_TRUE(IsSimdTuple(m, pn, &type));
 
     ParseNode* arg = CallArgList(pn);
     switch (type) {
       case AsmJSSimdType_int32x4: {
         MOZ_ASSERT(SimdTypeToLength(type) == 4);
         int32_t val[4];
         for (size_t i = 0; i < 4; i++, arg = NextNode(arg)) {
--- a/js/src/frontend/Parser.cpp
+++ b/js/src/frontend/Parser.cpp
@@ -1451,17 +1451,17 @@ Parser<ParseHandler>::newFunction(Handle
     if (options().selfHostingMode)
         fun->setIsSelfHostedBuiltin();
     return fun;
 }
 
 static bool
 MatchOrInsertSemicolon(TokenStream& ts, TokenStream::Modifier modifier = TokenStream::None)
 {
-    TokenKind tt = TOK_EOF;
+    TokenKind tt;
     if (!ts.peekTokenSameLine(&tt, modifier))
         return false;
     if (tt != TOK_EOF && tt != TOK_EOL && tt != TOK_SEMI && tt != TOK_RC) {
         /* Advance the scanner for proper error location reporting. */
         ts.consumeKnownToken(tt, modifier);
         ts.reportError(JSMSG_SEMI_BEFORE_STMNT);
         return false;
     }
@@ -3078,19 +3078,19 @@ Parser<ParseHandler>::statements(YieldHa
         return null();
 
     Node saveBlock = pc->blockNode;
     pc->blockNode = pn;
 
     bool canHaveDirectives = pc->atBodyLevel();
     bool afterReturn = false;
     bool warnedAboutStatementsAfterReturn = false;
-    uint32_t statementBegin = 0;
+    uint32_t statementBegin;
     for (;;) {
-        TokenKind tt = TOK_EOF;
+        TokenKind tt;
         if (!tokenStream.peekToken(&tt, TokenStream::Operand)) {
             if (tokenStream.isEOF())
                 isUnexpectedEOF_ = true;
             return null();
         }
         if (tt == TOK_EOF || tt == TOK_RC)
             break;
         if (afterReturn) {
@@ -3156,17 +3156,17 @@ Parser<ParseHandler>::condition(InHandli
     }
     return pn;
 }
 
 template <typename ParseHandler>
 bool
 Parser<ParseHandler>::matchLabel(YieldHandling yieldHandling, MutableHandle<PropertyName*> label)
 {
-    TokenKind tt = TOK_EOF;
+    TokenKind tt;
     if (!tokenStream.peekTokenSameLine(&tt, TokenStream::Operand))
         return false;
 
     if (tt == TOK_NAME) {
         tokenStream.consumeKnownToken(TOK_NAME, TokenStream::Operand);
         MOZ_ASSERT_IF(tokenStream.currentName() == context->names().yield,
                       yieldHandling == YieldIsName);
         label.set(tokenStream.currentName());
@@ -5645,17 +5645,17 @@ Parser<ParseHandler>::switchStatement(Yi
         MUST_MATCH_TOKEN(TOK_COLON, JSMSG_COLON_AFTER_CASE);
 
         Node body = handler.newStatementList(pc->blockid(), pos());
         if (!body)
             return null();
 
         bool afterReturn = false;
         bool warnedAboutStatementsAfterReturn = false;
-        uint32_t statementBegin = 0;
+        uint32_t statementBegin;
         while (true) {
             if (!tokenStream.peekToken(&tt, TokenStream::Operand))
                 return null();
             if (tt == TOK_RC || tt == TOK_CASE || tt == TOK_DEFAULT)
                 break;
             if (afterReturn) {
                 TokenPos pos(0, 0);
                 if (!tokenStream.peekTokenPos(&pos, TokenStream::Operand))
@@ -5808,17 +5808,17 @@ Parser<ParseHandler>::returnStatement(Yi
     uint32_t begin = pos().begin;
 
     MOZ_ASSERT(pc->sc->isFunctionBox());
 
     // Parse an optional operand.
     //
     // This is ugly, but we don't want to require a semicolon.
     Node exprNode;
-    TokenKind tt = TOK_EOF;
+    TokenKind tt;
     if (!tokenStream.peekTokenSameLine(&tt, TokenStream::Operand))
         return null();
     TokenStream::Modifier modifier = TokenStream::Operand;
     switch (tt) {
       case TOK_EOL:
       case TOK_EOF:
       case TOK_SEMI:
       case TOK_RC:
@@ -5888,17 +5888,17 @@ Parser<ParseHandler>::yieldExpression(In
       case StarGenerator:
       {
         MOZ_ASSERT(pc->sc->isFunctionBox());
 
         pc->lastYieldOffset = begin;
 
         Node exprNode;
         ParseNodeKind kind = PNK_YIELD;
-        TokenKind tt = TOK_EOF;
+        TokenKind tt;
         if (!tokenStream.peekTokenSameLine(&tt, TokenStream::Operand))
             return null();
         switch (tt) {
           // TOK_EOL is special; it implements the [no LineTerminator here]
           // quirk in the grammar.
           case TOK_EOL:
           // The rest of these make up the complete set of tokens that can
           // appear after any of the places where AssignmentExpression is used
@@ -5957,17 +5957,17 @@ Parser<ParseHandler>::yieldExpression(In
         // We are in a legacy generator: a function that has already seen a
         // yield, or in a legacy generator comprehension.
         MOZ_ASSERT(pc->sc->isFunctionBox());
 
         pc->lastYieldOffset = begin;
 
         // Legacy generators do not require a value.
         Node exprNode;
-        TokenKind tt = TOK_EOF;
+        TokenKind tt;
         if (!tokenStream.peekTokenSameLine(&tt, TokenStream::Operand))
             return null();
         switch (tt) {
           case TOK_EOF:
           case TOK_EOL:
           case TOK_SEMI:
           case TOK_RC:
           case TOK_RB:
@@ -6088,17 +6088,17 @@ Parser<ParseHandler>::labeledStatement(Y
 template <typename ParseHandler>
 typename ParseHandler::Node
 Parser<ParseHandler>::throwStatement(YieldHandling yieldHandling)
 {
     MOZ_ASSERT(tokenStream.isCurrentTokenType(TOK_THROW));
     uint32_t begin = pos().begin;
 
     /* ECMA-262 Edition 3 says 'throw [no LineTerminator here] Expr'. */
-    TokenKind tt = TOK_EOF;
+    TokenKind tt;
     if (!tokenStream.peekTokenSameLine(&tt, TokenStream::Operand))
         return null();
     if (tt == TOK_EOF || tt == TOK_SEMI || tt == TOK_RC) {
         report(ParseError, false, null(), JSMSG_MISSING_EXPR_AFTER_THROW);
         return null();
     }
     if (tt == TOK_EOL) {
         report(ParseError, false, null(), JSMSG_LINE_BREAK_AFTER_THROW);
@@ -7064,17 +7064,17 @@ Parser<ParseHandler>::assignExpr(InHandl
       case TOK_MULASSIGN:    kind = PNK_MULASSIGN;    op = JSOP_MUL;    break;
       case TOK_DIVASSIGN:    kind = PNK_DIVASSIGN;    op = JSOP_DIV;    break;
       case TOK_MODASSIGN:    kind = PNK_MODASSIGN;    op = JSOP_MOD;    break;
       case TOK_POWASSIGN:    kind = PNK_POWASSIGN;    op = JSOP_POW;    break;
 
       case TOK_ARROW: {
         // A line terminator between ArrowParameters and the => should trigger a SyntaxError.
         tokenStream.ungetToken();
-        TokenKind next = TOK_EOF;
+        TokenKind next;
         if (!tokenStream.peekTokenSameLine(&next) || next != TOK_ARROW) {
             report(ParseError, false, null(), JSMSG_UNEXPECTED_TOKEN,
                    "expression", TokenKindToDesc(TOK_ARROW));
             return null();
         }
         tokenStream.consumeKnownToken(TOK_ARROW);
 
         bool isBlock = false;
@@ -7214,17 +7214,17 @@ Parser<ParseHandler>::reportIfNotValidSi
     if (handler.maybeNameAnyParentheses(target)) {
         // Use a special error if the target is arguments/eval.  This ensures
         // targeting these names is consistently a SyntaxError (which error numbers
         // below don't guarantee) while giving us a nicer error message.
         if (!reportIfArgumentsEvalTarget(target))
             return false;
     }
 
-    unsigned errnum = 0;
+    unsigned errnum;
     const char* extra = nullptr;
 
     switch (flavor) {
       case IncrementAssignment:
         errnum = JSMSG_BAD_OPERAND;
         extra = "increment";
         break;
 
--- a/js/src/jit/MacroAssembler-inl.h
+++ b/js/src/jit/MacroAssembler-inl.h
@@ -4,30 +4,16 @@
  * License, v. 2.0. If a copy of the MPL was not distributed with this
  * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
 
 #ifndef jit_MacroAssembler_inl_h
 #define jit_MacroAssembler_inl_h
 
 #include "jit/MacroAssembler.h"
 
-#if defined(JS_CODEGEN_X86)
-# include "jit/x86/MacroAssembler-x86-inl.h"
-#elif defined(JS_CODEGEN_X64)
-# include "jit/x64/MacroAssembler-x64-inl.h"
-#elif defined(JS_CODEGEN_ARM)
-# include "jit/arm/MacroAssembler-arm-inl.h"
-#elif defined(JS_CODEGEN_ARM64)
-# include "jit/arm64/MacroAssembler-arm64-inl.h"
-#elif defined(JS_CODEGEN_MIPS32)
-# include "jit/mips32/MacroAssembler-mips32-inl.h"
-#elif !defined(JS_CODEGEN_NONE)
-# error "Unknown architecture!"
-#endif
-
 namespace js {
 namespace jit {
 
 //{{{ check_macroassembler_style
 // ===============================================================
 // Frame manipulation functions.
 
 uint32_t
@@ -208,45 +194,16 @@ MacroAssembler::makeFrameDescriptor(Regi
 
 void
 MacroAssembler::pushStaticFrameDescriptor(FrameType type)
 {
     uint32_t descriptor = MakeFrameDescriptor(framePushed(), type);
     Push(Imm32(descriptor));
 }
 
-void
-MacroAssembler::PushCalleeToken(Register callee, bool constructing)
-{
-    if (constructing) {
-        orPtr(Imm32(CalleeToken_FunctionConstructing), callee);
-        Push(callee);
-        andPtr(Imm32(uint32_t(CalleeTokenMask)), callee);
-    } else {
-        static_assert(CalleeToken_Function == 0, "Non-constructing call requires no tagging");
-        Push(callee);
-    }
-}
-
-void
-MacroAssembler::loadFunctionFromCalleeToken(Address token, Register dest)
-{
-#ifdef DEBUG
-    Label ok;
-    loadPtr(token, dest);
-    andPtr(Imm32(uint32_t(~CalleeTokenMask)), dest);
-    branchPtr(Assembler::Equal, dest, Imm32(CalleeToken_Function), &ok);
-    branchPtr(Assembler::Equal, dest, Imm32(CalleeToken_FunctionConstructing), &ok);
-    assumeUnreachable("Unexpected CalleeToken tag");
-    bind(&ok);
-#endif
-    loadPtr(token, dest);
-    andPtr(Imm32(uint32_t(CalleeTokenMask)), dest);
-}
-
 uint32_t
 MacroAssembler::buildFakeExitFrame(Register scratch)
 {
     mozilla::DebugOnly<uint32_t> initialDepth = framePushed();
 
     pushStaticFrameDescriptor(JitFrame_IonJS);
     uint32_t retAddr = pushFakeReturnAddress(scratch);
 
@@ -293,28 +250,12 @@ bool
 MacroAssembler::hasSelfReference() const
 {
     return selfReferencePatch_.offset() != 0;
 }
 
 //}}} check_macroassembler_style
 // ===============================================================
 
-void
-MacroAssembler::branchFunctionKind(Condition cond, JSFunction::FunctionKind kind, Register fun,
-                                   Register scratch, Label* label)
-{
-    // 16-bit loads are slow and unaligned 32-bit loads may be too so
-    // perform an aligned 32-bit load and adjust the bitmask accordingly.
-    MOZ_ASSERT(JSFunction::offsetOfNargs() % sizeof(uint32_t) == 0);
-    MOZ_ASSERT(JSFunction::offsetOfFlags() == JSFunction::offsetOfNargs() + 2);
-    Address address(fun, JSFunction::offsetOfNargs());
-    int32_t mask = IMM32_16ADJ(JSFunction::FUNCTION_KIND_MASK);
-    int32_t bit = IMM32_16ADJ(kind << JSFunction::FUNCTION_KIND_SHIFT);
-    load32(address, scratch);
-    and32(Imm32(mask), scratch);
-    branch32(cond, scratch, Imm32(bit), label);
-}
-
 } // namespace jit
 } // namespace js
 
 #endif /* jit_MacroAssembler_inl_h */
--- a/js/src/jit/MacroAssembler.h
+++ b/js/src/jit/MacroAssembler.h
@@ -586,26 +586,16 @@ class MacroAssembler : public MacroAssem
 
     // The frame descriptor is the second field of all Jit frames, pushed before
     // calling the Jit function.  It is a composite value defined in JitFrames.h
     inline void makeFrameDescriptor(Register frameSizeReg, FrameType type);
 
     // Push the frame descriptor, based on the statically known framePushed.
     inline void pushStaticFrameDescriptor(FrameType type);
 
-    // Push the callee token of a JSFunction which pointer is stored in the
-    // |callee| register. The callee token is packed with a |constructing| flag
-    // which correspond to the fact that the JS function is called with "new" or
-    // not.
-    inline void PushCalleeToken(Register callee, bool constructing);
-
-    // Unpack a callee token located at the |token| address, and return the
-    // JSFunction pointer in the |dest| register.
-    inline void loadFunctionFromCalleeToken(Address token, Register dest);
-
     // This function emulates a call by pushing an exit frame on the stack,
     // except that the fake-function is inlined within the body of the caller.
     //
     // This function assumes that the current frame is an IonJS frame.
     //
     // This function returns the offset of the /fake/ return address, in order to use
     // the return address to index the safepoints, which are used to list all
     // live registers.
@@ -660,44 +650,16 @@ class MacroAssembler : public MacroAssem
     // Patch the value of PushStubCode with the pointer to the finalized code.
     void linkSelfReference(JitCode* code);
 
     // If the JitCode that created this assembler needs to transition into the VM,
     // we want to store the JitCode on the stack in order to mark it during a GC.
     // This is a reference to a patch location where the JitCode* will be written.
     CodeOffsetLabel selfReferencePatch_;
 
-  public:
-    // ===============================================================
-    // Logical instructions
-
-    inline void not32(Register reg) PER_SHARED_ARCH;
-
-    inline void and32(Register src, Register dest) PER_SHARED_ARCH;
-    inline void and32(Imm32 imm, Register dest) PER_SHARED_ARCH;
-    inline void and32(Imm32 imm, Register src, Register dest) DEFINED_ON(arm64);
-    inline void and32(Imm32 imm, const Address& dest) PER_SHARED_ARCH;
-    inline void and32(const Address& src, Register dest) PER_SHARED_ARCH;
-
-    inline void andPtr(Register src, Register dest) PER_ARCH;
-    inline void andPtr(Imm32 imm, Register dest) PER_ARCH;
-
-    inline void or32(Register src, Register dest) PER_SHARED_ARCH;
-    inline void or32(Imm32 imm, Register dest) PER_SHARED_ARCH;
-    inline void or32(Imm32 imm, const Address& dest) PER_SHARED_ARCH;
-
-    inline void orPtr(Register src, Register dest) PER_ARCH;
-    inline void orPtr(Imm32 imm, Register dest) PER_ARCH;
-
-    inline void xor32(Register src, Register dest) DEFINED_ON(x86_shared);
-    inline void xor32(Imm32 imm, Register dest) PER_SHARED_ARCH;
-
-    inline void xorPtr(Register src, Register dest) PER_ARCH;
-    inline void xorPtr(Imm32 imm, Register dest) PER_ARCH;
-
     //}}} check_macroassembler_style
   public:
 
     // Emits a test of a value against all types in a TypeSet. A scratch
     // register is required.
     template <typename Source>
     void guardTypeSet(const Source& address, const TypeSet* types, BarrierKind kind, Register scratch, Label* miss);
 
@@ -784,16 +746,31 @@ class MacroAssembler : public MacroAssem
         loadPtr(Address(obj, JSObject::offsetOfGroup()), dest);
         loadPtr(Address(dest, ObjectGroup::offsetOfProto()), dest);
     }
 
     void loadStringLength(Register str, Register dest) {
         load32(Address(str, JSString::offsetOfLength()), dest);
     }
 
+    void loadFunctionFromCalleeToken(Address token, Register dest) {
+        loadPtr(token, dest);
+        andPtr(Imm32(uint32_t(CalleeTokenMask)), dest);
+    }
+    void PushCalleeToken(Register callee, bool constructing) {
+        if (constructing) {
+            orPtr(Imm32(CalleeToken_FunctionConstructing), callee);
+            Push(callee);
+            andPtr(Imm32(uint32_t(CalleeTokenMask)), callee);
+        } else {
+            static_assert(CalleeToken_Function == 0, "Non-constructing call requires no tagging");
+            Push(callee);
+        }
+    }
+
     void loadStringChars(Register str, Register dest);
     void loadStringChar(Register str, Register index, Register output);
 
     void branchIfRope(Register str, Label* label) {
         Address flags(str, JSString::offsetOfFlags());
         static_assert(JSString::ROPE_FLAGS == 0, "Rope type flags must be 0");
         branchTest32(Assembler::Zero, flags, Imm32(JSString::TYPE_FLAGS_MASK), label);
     }
@@ -1200,18 +1177,30 @@ class MacroAssembler : public MacroAssem
     }
 
     void branchTestObjectIsProxy(bool proxy, Register object, Register scratch, Label* label)
     {
         loadObjClass(object, scratch);
         branchTestClassIsProxy(proxy, scratch, label);
     }
 
-    inline void branchFunctionKind(Condition cond, JSFunction::FunctionKind kind, Register fun,
-                                   Register scratch, Label* label);
+    void branchFunctionKind(Condition cond, JSFunction::FunctionKind kind, Register fun,
+                            Register scratch, Label* label)
+    {
+        // 16-bit loads are slow and unaligned 32-bit loads may be too so
+        // perform an aligned 32-bit load and adjust the bitmask accordingly.
+        MOZ_ASSERT(JSFunction::offsetOfNargs() % sizeof(uint32_t) == 0);
+        MOZ_ASSERT(JSFunction::offsetOfFlags() == JSFunction::offsetOfNargs() + 2);
+        Address address(fun, JSFunction::offsetOfNargs());
+        int32_t mask = IMM32_16ADJ(JSFunction::FUNCTION_KIND_MASK);
+        int32_t bit = IMM32_16ADJ(kind << JSFunction::FUNCTION_KIND_SHIFT);
+        load32(address, scratch);
+        and32(Imm32(mask), scratch);
+        branch32(cond, scratch, Imm32(bit), label);
+    }
 
   public:
 #ifndef JS_CODEGEN_ARM64
     // StackPointer manipulation functions.
     // On ARM64, the StackPointer is implemented as two synchronized registers.
     // Code shared across platforms must use these functions to be valid.
     template <typename T>
     void addToStackPtr(T t) { addPtr(t, getStackPointer()); }
deleted file mode 100644
--- a/js/src/jit/arm/MacroAssembler-arm-inl.h
+++ /dev/null
@@ -1,151 +0,0 @@
-/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
- * vim: set ts=8 sts=4 et sw=4 tw=99:
- * This Source Code Form is subject to the terms of the Mozilla Public
- * License, v. 2.0. If a copy of the MPL was not distributed with this
- * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
-
-#ifndef jit_arm_MacroAssembler_arm_inl_h
-#define jit_arm_MacroAssembler_arm_inl_h
-
-#include "jit/arm/MacroAssembler-arm.h"
-
-namespace js {
-namespace jit {
-
-//{{{ check_macroassembler_style
-// ===============================================================
-// Logical instructions
-
-void
-MacroAssembler::not32(Register reg)
-{
-    ma_mvn(reg, reg);
-}
-
-void
-MacroAssembler::and32(Register src, Register dest)
-{
-    ma_and(src, dest, SetCC);
-}
-
-void
-MacroAssembler::and32(Imm32 imm, Register dest)
-{
-    ma_and(imm, dest, SetCC);
-}
-
-void
-MacroAssembler::and32(Imm32 imm, const Address& dest)
-{
-    ScratchRegisterScope scratch(*this);
-    load32(dest, scratch);
-    ma_and(imm, scratch);
-    store32(scratch, dest);
-}
-
-void
-MacroAssembler::and32(const Address& src, Register dest)
-{
-    ScratchRegisterScope scratch(*this);
-    load32(src, scratch);
-    ma_and(scratch, dest, SetCC);
-}
-
-void
-MacroAssembler::andPtr(Register src, Register dest)
-{
-    ma_and(src, dest);
-}
-
-void
-MacroAssembler::andPtr(Imm32 imm, Register dest)
-{
-    ma_and(imm, dest);
-}
-
-void
-MacroAssembler::or32(Register src, Register dest)
-{
-    ma_orr(src, dest);
-}
-
-void
-MacroAssembler::or32(Imm32 imm, Register dest)
-{
-    ma_orr(imm, dest);
-}
-
-void
-MacroAssembler::or32(Imm32 imm, const Address& dest)
-{
-    ScratchRegisterScope scratch(*this);
-    load32(dest, scratch);
-    ma_orr(imm, scratch);
-    store32(scratch, dest);
-}
-
-void
-MacroAssembler::orPtr(Register src, Register dest)
-{
-    ma_orr(src, dest);
-}
-
-void
-MacroAssembler::orPtr(Imm32 imm, Register dest)
-{
-    ma_orr(imm, dest);
-}
-
-void
-MacroAssembler::xor32(Imm32 imm, Register dest)
-{
-    ma_eor(imm, dest, SetCC);
-}
-
-void
-MacroAssembler::xorPtr(Register src, Register dest)
-{
-    ma_eor(src, dest);
-}
-
-void
-MacroAssembler::xorPtr(Imm32 imm, Register dest)
-{
-    ma_eor(imm, dest);
-}
-
-//}}} check_macroassembler_style
-// ===============================================================
-
-void
-MacroAssemblerARMCompat::branchTest64(Condition cond, Register64 lhs, Register64 rhs, Register temp, Label* label)
-{
-    if (cond == Assembler::Zero) {
-        MOZ_ASSERT(lhs.low == rhs.low);
-        MOZ_ASSERT(lhs.high == rhs.high);
-        mov(lhs.low, ScratchRegister);
-        asMasm().or32(lhs.high, ScratchRegister);
-        branchTestPtr(cond, ScratchRegister, ScratchRegister, label);
-    } else {
-        MOZ_CRASH("Unsupported condition");
-    }
-}
-
-void
-MacroAssemblerARMCompat::and64(Imm64 imm, Register64 dest)
-{
-    asMasm().and32(Imm32(imm.value & 0xFFFFFFFFL), dest.low);
-    asMasm().and32(Imm32((imm.value >> 32) & 0xFFFFFFFFL), dest.high);
-}
-
-void
-MacroAssemblerARMCompat::or64(Register64 src, Register64 dest)
-{
-    asMasm().or32(src.low, dest.low);
-    asMasm().or32(src.high, dest.high);
-}
-
-} // namespace jit
-} // namespace js
-
-#endif /* jit_arm_MacroAssembler_arm_inl_h */
--- a/js/src/jit/arm/MacroAssembler-arm.cpp
+++ b/js/src/jit/arm/MacroAssembler-arm.cpp
@@ -1921,16 +1921,22 @@ MacroAssemblerARMCompat::add32(Register 
 
 void
 MacroAssemblerARMCompat::add32(Imm32 imm, Register dest)
 {
     ma_add(imm, dest, SetCC);
 }
 
 void
+MacroAssemblerARMCompat::xor32(Imm32 imm, Register dest)
+{
+    ma_eor(imm, dest, SetCC);
+}
+
+void
 MacroAssemblerARMCompat::add32(Imm32 imm, const Address& dest)
 {
     ScratchRegisterScope scratch(asMasm());
     load32(dest, scratch);
     ma_add(imm, scratch, SetCC);
     store32(scratch, dest);
 }
 
@@ -1942,30 +1948,122 @@ MacroAssemblerARMCompat::sub32(Imm32 imm
 
 void
 MacroAssemblerARMCompat::sub32(Register src, Register dest)
 {
     ma_sub(src, dest, SetCC);
 }
 
 void
+MacroAssemblerARMCompat::and32(Register src, Register dest)
+{
+    ma_and(src, dest, SetCC);
+}
+
+void
+MacroAssemblerARMCompat::and32(Imm32 imm, Register dest)
+{
+    ma_and(imm, dest, SetCC);
+}
+
+void
+MacroAssemblerARMCompat::and32(const Address& src, Register dest)
+{
+    ScratchRegisterScope scratch(asMasm());
+    load32(src, scratch);
+    ma_and(scratch, dest, SetCC);
+}
+
+void
 MacroAssemblerARMCompat::addPtr(Register src, Register dest)
 {
     ma_add(src, dest);
 }
 
 void
 MacroAssemblerARMCompat::addPtr(const Address& src, Register dest)
 {
     ScratchRegisterScope scratch(asMasm());
     load32(src, scratch);
     ma_add(scratch, dest, SetCC);
 }
 
 void
+MacroAssemblerARMCompat::not32(Register reg)
+{
+    ma_mvn(reg, reg);
+}
+
+void
+MacroAssemblerARMCompat::and32(Imm32 imm, const Address& dest)
+{
+    ScratchRegisterScope scratch(asMasm());
+    load32(dest, scratch);
+    ma_and(imm, scratch);
+    store32(scratch, dest);
+}
+
+void
+MacroAssemblerARMCompat::or32(Imm32 imm, const Address& dest)
+{
+    ScratchRegisterScope scratch(asMasm());
+    load32(dest, scratch);
+    ma_orr(imm, scratch);
+    store32(scratch, dest);
+}
+
+void
+MacroAssemblerARMCompat::or32(Imm32 imm, Register dest)
+{
+    ma_orr(imm, dest);
+}
+
+void
+MacroAssemblerARMCompat::or32(Register src, Register dest)
+{
+    ma_orr(src, dest);
+}
+
+void
+MacroAssemblerARMCompat::xorPtr(Imm32 imm, Register dest)
+{
+    ma_eor(imm, dest);
+}
+
+void
+MacroAssemblerARMCompat::xorPtr(Register src, Register dest)
+{
+    ma_eor(src, dest);
+}
+
+void
+MacroAssemblerARMCompat::orPtr(Imm32 imm, Register dest)
+{
+    ma_orr(imm, dest);
+}
+
+void
+MacroAssemblerARMCompat::orPtr(Register src, Register dest)
+{
+    ma_orr(src, dest);
+}
+
+void
+MacroAssemblerARMCompat::andPtr(Imm32 imm, Register dest)
+{
+    ma_and(imm, dest);
+}
+
+void
+MacroAssemblerARMCompat::andPtr(Register src, Register dest)
+{
+    ma_and(src, dest);
+}
+
+void
 MacroAssemblerARMCompat::move32(Imm32 imm, Register dest)
 {
     ma_mov(imm, dest);
 }
 
 void
 MacroAssemblerARMCompat::move32(Register src, Register dest) {
     ma_mov(src, dest);
--- a/js/src/jit/arm/MacroAssembler-arm.h
+++ b/js/src/jit/arm/MacroAssembler-arm.h
@@ -982,17 +982,27 @@ class MacroAssemblerARMCompat : public M
     }
     void branchPtr(Condition cond, Register lhs, Imm32 imm, Label* label) {
         branch32(cond, lhs, imm, label);
     }
     void decBranchPtr(Condition cond, Register lhs, Imm32 imm, Label* label) {
         subPtr(imm, lhs);
         branch32(cond, lhs, Imm32(0), label);
     }
-    inline void branchTest64(Condition cond, Register64 lhs, Register64 rhs, Register temp, Label* label);
+    void branchTest64(Condition cond, Register64 lhs, Register64 rhs, Register temp, Label* label) {
+        if (cond == Assembler::Zero) {
+            MOZ_ASSERT(lhs.low == rhs.low);
+            MOZ_ASSERT(lhs.high == rhs.high);
+            mov(lhs.low, ScratchRegister);
+            or32(lhs.high, ScratchRegister);
+            branchTestPtr(cond, ScratchRegister, ScratchRegister, label);
+        } else {
+            MOZ_CRASH("Unsupported condition");
+        }
+    }
     void moveValue(const Value& val, Register type, Register data);
 
     CodeOffsetJump jumpWithPatch(RepatchLabel* label, Condition cond = Always,
                                  Label* documentation = nullptr);
     CodeOffsetJump backedgeJump(RepatchLabel* label, Label* documentation) {
         return jumpWithPatch(label, Always, documentation);
     }
     template <typename T>
@@ -1196,25 +1206,46 @@ class MacroAssemblerARMCompat : public M
         add32(src, dest);
         j(cond, label);
     }
     template <typename T>
     void branchSub32(Condition cond, T src, Register dest, Label* label) {
         sub32(src, dest);
         j(cond, label);
     }
+    void xor32(Imm32 imm, Register dest);
 
-    inline void and64(Imm64 imm, Register64 dest);
-    inline void or64(Register64 src, Register64 dest);
+    void and32(Register src, Register dest);
+    void and32(Imm32 imm, Register dest);
+    void and32(Imm32 imm, const Address& dest);
+    void and32(const Address& src, Register dest);
+    void and64(Imm64 imm, Register64 dest) {
+        and32(Imm32(imm.value & 0xFFFFFFFFL), dest.low);
+        and32(Imm32((imm.value >> 32) & 0xFFFFFFFFL), dest.high);
+    }
+    void or32(Register src, Register dest);
+    void or32(Imm32 imm, Register dest);
+    void or32(Imm32 imm, const Address& dest);
+    void xorPtr(Imm32 imm, Register dest);
+    void xorPtr(Register src, Register dest);
+    void orPtr(Imm32 imm, Register dest);
+    void orPtr(Register src, Register dest);
+    void or64(Register64 src, Register64 dest) {
+        or32(src.low, dest.low);
+        or32(src.high, dest.high);
+    }
+    void andPtr(Imm32 imm, Register dest);
+    void andPtr(Register src, Register dest);
     void addPtr(Register src, Register dest);
     void addPtr(const Address& src, Register dest);
     void add64(Imm32 imm, Register64 dest) {
         ma_add(imm, dest.low, SetCC);
         ma_adc(Imm32(0), dest.high, LeaveCC);
     }
+    void not32(Register reg);
 
     void move32(Imm32 imm, Register dest);
     void move32(Register src, Register dest);
 
     void movePtr(Register src, Register dest);
     void movePtr(ImmWord imm, Register dest);
     void movePtr(ImmPtr imm, Register dest);
     void movePtr(AsmJSImmPtr imm, Register dest);
deleted file mode 100644
--- a/js/src/jit/arm64/MacroAssembler-arm64-inl.h
+++ /dev/null
@@ -1,165 +0,0 @@
-/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
- * vim: set ts=8 sts=4 et sw=4 tw=99:
- * This Source Code Form is subject to the terms of the Mozilla Public
- * License, v. 2.0. If a copy of the MPL was not distributed with this
- * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
-
-#ifndef jit_arm64_MacroAssembler_arm64_inl_h
-#define jit_arm64_MacroAssembler_arm64_inl_h
-
-#include "jit/arm64/MacroAssembler-arm64.h"
-
-namespace js {
-namespace jit {
-
-//{{{ check_macroassembler_style
-// ===============================================================
-// Logical instructions
-
-void
-MacroAssembler::not32(Register reg)
-{
-    Orn(ARMRegister(reg, 32), vixl::wzr, ARMRegister(reg, 32));
-}
-
-void
-MacroAssembler::and32(Register src, Register dest)
-{
-    And(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(ARMRegister(src, 32)));
-}
-
-void
-MacroAssembler::and32(Imm32 imm, Register dest)
-{
-    And(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(imm.value));
-}
-
-void
-MacroAssembler::and32(Imm32 imm, Register src, Register dest)
-{
-    And(ARMRegister(dest, 32), ARMRegister(src, 32), Operand(imm.value));
-}
-
-void
-MacroAssembler::and32(Imm32 imm, const Address& dest)
-{
-    vixl::UseScratchRegisterScope temps(this);
-    const ARMRegister scratch32 = temps.AcquireW();
-    MOZ_ASSERT(scratch32.asUnsized() != dest.base);
-    load32(dest, scratch32.asUnsized());
-    And(scratch32, scratch32, Operand(imm.value));
-    store32(scratch32.asUnsized(), dest);
-}
-
-void
-MacroAssembler::and32(const Address& src, Register dest)
-{
-    vixl::UseScratchRegisterScope temps(this);
-    const ARMRegister scratch32 = temps.AcquireW();
-    MOZ_ASSERT(scratch32.asUnsized() != src.base);
-    load32(src, scratch32.asUnsized());
-    And(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(scratch32));
-}
-
-void
-MacroAssembler::andPtr(Register src, Register dest)
-{
-    And(ARMRegister(dest, 64), ARMRegister(dest, 64), Operand(ARMRegister(src, 64)));
-}
-
-void
-MacroAssembler::andPtr(Imm32 imm, Register dest)
-{
-    And(ARMRegister(dest, 64), ARMRegister(dest, 64), Operand(imm.value));
-}
-
-void
-MacroAssembler::or32(Imm32 imm, Register dest)
-{
-    Orr(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(imm.value));
-}
-
-void
-MacroAssembler::or32(Register src, Register dest)
-{
-    Orr(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(ARMRegister(src, 32)));
-}
-
-void
-MacroAssembler::or32(Imm32 imm, const Address& dest)
-{
-    vixl::UseScratchRegisterScope temps(this);
-    const ARMRegister scratch32 = temps.AcquireW();
-    MOZ_ASSERT(scratch32.asUnsized() != dest.base);
-    load32(dest, scratch32.asUnsized());
-    Orr(scratch32, scratch32, Operand(imm.value));
-    store32(scratch32.asUnsized(), dest);
-}
-
-void
-MacroAssembler::orPtr(Register src, Register dest)
-{
-    Orr(ARMRegister(dest, 64), ARMRegister(dest, 64), Operand(ARMRegister(src, 64)));
-}
-
-void
-MacroAssembler::orPtr(Imm32 imm, Register dest)
-{
-    Orr(ARMRegister(dest, 64), ARMRegister(dest, 64), Operand(imm.value));
-}
-
-void
-MacroAssembler::xor32(Imm32 imm, Register dest)
-{
-    Eor(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(imm.value));
-}
-
-void
-MacroAssembler::xorPtr(Register src, Register dest)
-{
-    Eor(ARMRegister(dest, 64), ARMRegister(dest, 64), Operand(ARMRegister(src, 64)));
-}
-
-void
-MacroAssembler::xorPtr(Imm32 imm, Register dest)
-{
-    Eor(ARMRegister(dest, 64), ARMRegister(dest, 64), Operand(imm.value));
-}
-
-//}}} check_macroassembler_style
-// ===============================================================
-
-void
-MacroAssemblerCompat::and64(Imm64 imm, Register64 dest)
-{
-    vixl::UseScratchRegisterScope temps(this);
-    const Register scratch = temps.AcquireX().asUnsized();
-    mov(ImmWord(imm.value), scratch);
-    asMasm().andPtr(scratch, dest.reg);
-}
-
-void
-MacroAssemblerCompat::or64(Register64 src, Register64 dest)
-{
-    asMasm().orPtr(src.reg, dest.reg);
-}
-
-template <typename T>
-void
-MacroAssemblerCompat::andToStackPtr(T t)
-{
-    asMasm().andPtr(t, getStackPointer());
-    syncStackPtr();
-}
-
-template <typename T>
-void
-MacroAssemblerCompat::andStackPtrTo(T t)
-{
-    asMasm().andPtr(getStackPointer(), t);
-}
-
-} // namespace jit
-} // namespace js
-
-#endif /* jit_arm64_MacroAssembler_arm64_inl_h */
--- a/js/src/jit/arm64/MacroAssembler-arm64.h
+++ b/js/src/jit/arm64/MacroAssembler-arm64.h
@@ -809,16 +809,19 @@ class MacroAssemblerCompat : public vixl
     }
 
     // Move a pointer using a literal pool, so that the pointer
     // may be easily patched or traced.
     // Returns the BufferOffset of the load instruction emitted.
     BufferOffset movePatchablePtr(ImmWord ptr, Register dest);
     BufferOffset movePatchablePtr(ImmPtr ptr, Register dest);
 
+    void not32(Register reg) {
+        Orn(ARMRegister(reg, 32), vixl::wzr, ARMRegister(reg, 32));
+    }
     void neg32(Register reg) {
         Negs(ARMRegister(reg, 32), Operand(ARMRegister(reg, 32)));
     }
 
     void loadPtr(AsmJSAbsoluteAddress address, Register dest) {
         vixl::UseScratchRegisterScope temps(this);
         const ARMRegister scratch = temps.AcquireX();
         movePtr(AsmJSImmPtr(address.kind()), scratch.asUnsized());
@@ -1037,18 +1040,20 @@ class MacroAssemblerCompat : public vixl
     template <typename T>
     void addStackPtrTo(T t) { addPtr(getStackPointer(), t); }
 
     template <typename T>
     void subFromStackPtr(T t) { subPtr(t, getStackPointer()); syncStackPtr(); }
     template <typename T>
     void subStackPtrFrom(T t) { subPtr(getStackPointer(), t); }
 
-    template <typename T> void andToStackPtr(T t);
-    template <typename T> void andStackPtrTo(T t);
+    template <typename T>
+    void andToStackPtr(T t) { andPtr(t, getStackPointer()); syncStackPtr(); }
+    template <typename T>
+    void andStackPtrTo(T t) { andPtr(getStackPointer(), t); }
 
     template <typename T>
     void moveToStackPtr(T t) { movePtr(t, getStackPointer()); syncStackPtr(); }
     template <typename T>
     void moveStackPtrTo(T t) { movePtr(getStackPointer(), t); }
 
     template <typename T>
     void loadStackPtr(T t) { loadPtr(t, getStackPointer()); syncStackPtr(); }
@@ -1083,18 +1088,89 @@ class MacroAssemblerCompat : public vixl
         Asr(ARMRegister(dest, 64), ARMRegister(dest, 64), imm.value);
     }
     void lshiftPtr(Imm32 imm, Register dest) {
         Lsl(ARMRegister(dest, 64), ARMRegister(dest, 64), imm.value);
     }
     void lshift64(Imm32 imm, Register64 dest) {
         lshiftPtr(imm, dest.reg);
     }
-    inline void and64(Imm64 imm, Register64 dest);
-    inline void or64(Register64 src, Register64 dest);
+    void xorPtr(Imm32 imm, Register dest) {
+        Eor(ARMRegister(dest, 64), ARMRegister(dest, 64), Operand(imm.value));
+    }
+    void xor32(Imm32 imm, Register dest) {
+        Eor(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(imm.value));
+    }
+
+    void xorPtr(Register src, Register dest) {
+        Eor(ARMRegister(dest, 64), ARMRegister(dest, 64), Operand(ARMRegister(src, 64)));
+    }
+    void orPtr(ImmWord imm, Register dest) {
+        Orr(ARMRegister(dest, 64), ARMRegister(dest, 64), Operand(imm.value));
+    }
+    void orPtr(Imm32 imm, Register dest) {
+        Orr(ARMRegister(dest, 64), ARMRegister(dest, 64), Operand(imm.value));
+    }
+    void orPtr(Register src, Register dest) {
+        Orr(ARMRegister(dest, 64), ARMRegister(dest, 64), Operand(ARMRegister(src, 64)));
+    }
+    void or32(Imm32 imm, Register dest) {
+        Orr(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(imm.value));
+    }
+    void or32(Register src, Register dest) {
+        Orr(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(ARMRegister(src, 32)));
+    }
+    void or32(Imm32 imm, const Address& dest) {
+        vixl::UseScratchRegisterScope temps(this);
+        const ARMRegister scratch32 = temps.AcquireW();
+        MOZ_ASSERT(scratch32.asUnsized() != dest.base);
+        load32(dest, scratch32.asUnsized());
+        Orr(scratch32, scratch32, Operand(imm.value));
+        store32(scratch32.asUnsized(), dest);
+    }
+    void or64(Register64 src, Register64 dest) {
+        orPtr(src.reg, dest.reg);
+    }
+    void andPtr(Imm32 imm, Register dest) {
+        And(ARMRegister(dest, 64), ARMRegister(dest, 64), Operand(imm.value));
+    }
+    void andPtr(Register src, Register dest) {
+        And(ARMRegister(dest, 64), ARMRegister(dest, 64), Operand(ARMRegister(src, 64)));
+    }
+    void and32(Imm32 imm, Register dest) {
+        And(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(imm.value));
+    }
+    void and32(Imm32 imm, Register src, Register dest) {
+        And(ARMRegister(dest, 32), ARMRegister(src, 32), Operand(imm.value));
+    }
+
+    void and32(Register src, Register dest) {
+        And(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(ARMRegister(src, 32)));
+    }
+    void and32(Imm32 mask, Address dest) {
+        vixl::UseScratchRegisterScope temps(this);
+        const ARMRegister scratch32 = temps.AcquireW();
+        MOZ_ASSERT(scratch32.asUnsized() != dest.base);
+        load32(dest, scratch32.asUnsized());
+        And(scratch32, scratch32, Operand(mask.value));
+        store32(scratch32.asUnsized(), dest);
+    }
+    void and32(Address src, Register dest) {
+        vixl::UseScratchRegisterScope temps(this);
+        const ARMRegister scratch32 = temps.AcquireW();
+        MOZ_ASSERT(scratch32.asUnsized() != src.base);
+        load32(src, scratch32.asUnsized());
+        And(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(scratch32));
+    }
+    void and64(Imm64 imm, Register64 dest) {
+        vixl::UseScratchRegisterScope temps(this);
+        const Register scratch = temps.AcquireX().asUnsized();
+        mov(ImmWord(imm.value), scratch);
+        andPtr(scratch, dest.reg);
+    }
 
     void testPtr(Register lhs, Register rhs) {
         Tst(ARMRegister(lhs, 64), Operand(ARMRegister(rhs, 64)));
     }
     void test32(Register lhs, Register rhs) {
         Tst(ARMRegister(lhs, 32), Operand(ARMRegister(rhs, 32)));
     }
     void test32(const Address& addr, Imm32 imm) {
--- a/js/src/jit/mips32/Assembler-mips32.cpp
+++ b/js/src/jit/mips32/Assembler-mips32.cpp
@@ -555,17 +555,17 @@ Assembler::WriteInstStatic(uint32_t x, u
     MOZ_ASSERT(dest != nullptr);
     *dest = x;
 }
 
 BufferOffset
 Assembler::haltingAlign(int alignment)
 {
     // TODO: Implement a proper halting align.
-    return nopAlign(alignment);
+    nopAlign(alignment);
 }
 
 BufferOffset
 Assembler::nopAlign(int alignment)
 {
     BufferOffset ret;
     MOZ_ASSERT(m_buffer.isAligned(4));
     if (alignment == 8) {
deleted file mode 100644
--- a/js/src/jit/mips32/MacroAssembler-mips32-inl.h
+++ /dev/null
@@ -1,134 +0,0 @@
-/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
- * vim: set ts=8 sts=4 et sw=4 tw=99:
- * This Source Code Form is subject to the terms of the Mozilla Public
- * License, v. 2.0. If a copy of the MPL was not distributed with this
- * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
-
-#ifndef jit_mips32_MacroAssembler_mips32_inl_h
-#define jit_mips32_MacroAssembler_mips32_inl_h
-
-#include "jit/mips32/MacroAssembler-mips32.h"
-
-namespace js {
-namespace jit {
-
-//{{{ check_macroassembler_style
-// ===============================================================
-// Logical instructions
-
-void
-MacroAssembler::not32(Register reg)
-{
-    ma_not(reg, reg);
-}
-
-void
-MacroAssembler::and32(Register src, Register dest)
-{
-    ma_and(dest, dest, src);
-}
-
-void
-MacroAssembler::and32(Imm32 imm, Register dest)
-{
-    ma_and(dest, imm);
-}
-
-void
-MacroAssembler::and32(Imm32 imm, const Address& dest)
-{
-    load32(dest, SecondScratchReg);
-    ma_and(SecondScratchReg, imm);
-    store32(SecondScratchReg, dest);
-}
-
-void
-MacroAssembler::and32(const Address& src, Register dest)
-{
-    load32(src, SecondScratchReg);
-    ma_and(dest, SecondScratchReg);
-}
-
-void
-MacroAssembler::andPtr(Register src, Register dest)
-{
-    ma_and(dest, src);
-}
-
-void
-MacroAssembler::andPtr(Imm32 imm, Register dest)
-{
-    ma_and(dest, imm);
-}
-
-void
-MacroAssembler::or32(Register src, Register dest)
-{
-    ma_or(dest, src);
-}
-
-void
-MacroAssembler::or32(Imm32 imm, Register dest)
-{
-    ma_or(dest, imm);
-}
-
-void
-MacroAssembler::or32(Imm32 imm, const Address& dest)
-{
-    load32(dest, SecondScratchReg);
-    ma_or(SecondScratchReg, imm);
-    store32(SecondScratchReg, dest);
-}
-
-void
-MacroAssembler::orPtr(Register src, Register dest)
-{
-    ma_or(dest, src);
-}
-
-void
-MacroAssembler::orPtr(Imm32 imm, Register dest)
-{
-    ma_or(dest, imm);
-}
-
-void
-MacroAssembler::xor32(Imm32 imm, Register dest)
-{
-    ma_xor(dest, imm);
-}
-
-void
-MacroAssembler::xorPtr(Register src, Register dest)
-{
-    ma_xor(dest, src);
-}
-
-void
-MacroAssembler::xorPtr(Imm32 imm, Register dest)
-{
-    ma_xor(dest, imm);
-}
-
-//}}} check_macroassembler_style
-// ===============================================================
-
-void
-MacroAssemblerMIPSCompat::and64(Imm64 imm, Register64 dest)
-{
-    asMasm().and32(Imm32(imm.value & LOW_32_MASK), dest.low);
-    asMasm().and32(Imm32((imm.value >> 32) & LOW_32_MASK), dest.high);
-}
-
-void
-MacroAssemblerMIPSCompat::or64(Register64 src, Register64 dest)
-{
-    asMasm().or32(src.low, dest.low);
-    asMasm().or32(src.high, dest.high);
-}
-
-} // namespace jit
-} // namespace js
-
-#endif /* jit_mips32_MacroAssembler_mips32_inl_h */
--- a/js/src/jit/mips32/MacroAssembler-mips32.cpp
+++ b/js/src/jit/mips32/MacroAssembler-mips32.cpp
@@ -1619,16 +1619,113 @@ MacroAssemblerMIPSCompat::addPtr(const A
 
 void
 MacroAssemblerMIPSCompat::subPtr(Register src, Register dest)
 {
     ma_subu(dest, dest, src);
 }
 
 void
+MacroAssemblerMIPSCompat::not32(Register reg)
+{
+    ma_not(reg, reg);
+}
+
+// Logical operations
+void
+MacroAssemblerMIPSCompat::and32(Register src, Register dest)
+{
+    ma_and(dest, dest, src);
+}
+
+void
+MacroAssemblerMIPSCompat::and32(Imm32 imm, Register dest)
+{
+    ma_and(dest, imm);
+}
+
+void
+MacroAssemblerMIPSCompat::and32(Imm32 imm, const Address& dest)
+{
+    load32(dest, SecondScratchReg);
+    ma_and(SecondScratchReg, imm);
+    store32(SecondScratchReg, dest);
+}
+
+void
+MacroAssemblerMIPSCompat::and32(const Address& src, Register dest)
+{
+    load32(src, SecondScratchReg);
+    ma_and(dest, SecondScratchReg);
+}
+
+void
+MacroAssemblerMIPSCompat::or32(Imm32 imm, Register dest)
+{
+    ma_or(dest, imm);
+}
+
+
+void
+MacroAssemblerMIPSCompat::or32(Imm32 imm, const Address& dest)
+{
+    load32(dest, SecondScratchReg);
+    ma_or(SecondScratchReg, imm);
+    store32(SecondScratchReg, dest);
+}
+
+void
+MacroAssemblerMIPSCompat::or32(Register src, Register dest)
+{
+    ma_or(dest, src);
+}
+
+void
+MacroAssemblerMIPSCompat::xor32(Imm32 imm, Register dest)
+{
+    ma_xor(dest, imm);
+}
+
+void
+MacroAssemblerMIPSCompat::xorPtr(Imm32 imm, Register dest)
+{
+    ma_xor(dest, imm);
+}
+
+void
+MacroAssemblerMIPSCompat::xorPtr(Register src, Register dest)
+{
+    ma_xor(dest, src);
+}
+
+void
+MacroAssemblerMIPSCompat::orPtr(Imm32 imm, Register dest)
+{
+    ma_or(dest, imm);
+}
+
+void
+MacroAssemblerMIPSCompat::orPtr(Register src, Register dest)
+{
+    ma_or(dest, src);
+}
+
+void
+MacroAssemblerMIPSCompat::andPtr(Imm32 imm, Register dest)
+{
+    ma_and(dest, imm);
+}
+
+void
+MacroAssemblerMIPSCompat::andPtr(Register src, Register dest)
+{
+    ma_and(dest, src);
+}
+
+void
 MacroAssemblerMIPSCompat::move32(Imm32 imm, Register dest)
 {
     ma_li(dest, imm);
 }
 
 void
 MacroAssemblerMIPSCompat::move32(Register src, Register dest)
 {
@@ -3035,17 +3132,17 @@ MacroAssemblerMIPSCompat::checkStackAlig
 #endif
 }
 
 void
 MacroAssemblerMIPSCompat::alignStackPointer()
 {
     movePtr(StackPointer, SecondScratchReg);
     subPtr(Imm32(sizeof(uintptr_t)), StackPointer);
-    asMasm().andPtr(Imm32(~(ABIStackAlignment - 1)), StackPointer);
+    andPtr(Imm32(~(ABIStackAlignment - 1)), StackPointer);
     storePtr(SecondScratchReg, Address(StackPointer, 0));
 }
 
 void
 MacroAssemblerMIPSCompat::restoreStackPointer()
 {
     loadPtr(Address(StackPointer, 0), StackPointer);
 }
--- a/js/src/jit/mips32/MacroAssembler-mips32.h
+++ b/js/src/jit/mips32/MacroAssembler-mips32.h
@@ -1146,21 +1146,42 @@ public:
             sub32(src, dest);
             ma_b(dest, dest, overflow, cond);
             break;
           default:
             MOZ_CRASH("NYI");
         }
     }
 
-    inline void and64(Imm64 imm, Register64 dest);
-    inline void or64(Register64 src, Register64 dest);
+    void and32(Register src, Register dest);
+    void and32(Imm32 imm, Register dest);
+    void and32(Imm32 imm, const Address& dest);
+    void and32(const Address& src, Register dest);
+    void and64(Imm64 imm, Register64 dest) {
+        and32(Imm32(imm.value & LOW_32_MASK), dest.low);
+        and32(Imm32((imm.value >> 32) & LOW_32_MASK), dest.high);
+    }
+    void or32(Imm32 imm, Register dest);
+    void or32(Imm32 imm, const Address& dest);
+    void or32(Register src, Register dest);
+    void or64(Register64 src, Register64 dest) {
+        or32(src.low, dest.low);
+        or32(src.high, dest.high);
+    }
+    void xor32(Imm32 imm, Register dest);
+    void xorPtr(Imm32 imm, Register dest);
+    void xorPtr(Register src, Register dest);
+    void orPtr(Imm32 imm, Register dest);
+    void orPtr(Register src, Register dest);
+    void andPtr(Imm32 imm, Register dest);
+    void andPtr(Register src, Register dest);
     void addPtr(Register src, Register dest);
     void subPtr(Register src, Register dest);
     void addPtr(const Address& src, Register dest);
+    void not32(Register reg);
 
     void move32(Imm32 imm, Register dest);
     void move32(Register src, Register dest);
     void move64(Register64 src, Register64 dest) {
         move32(src.low, dest.low);
         move32(src.high, dest.high);
     }
 
--- a/js/src/jit/none/MacroAssembler-none.h
+++ b/js/src/jit/none/MacroAssembler-none.h
@@ -420,16 +420,23 @@ class MacroAssemblerNone : public Assemb
 
     template <typename T> void loadUnboxedValue(T, MIRType, AnyRegister) { MOZ_CRASH(); }
     template <typename T> void storeUnboxedValue(ConstantOrRegister, MIRType, T, MIRType) { MOZ_CRASH(); }
     template <typename T> void storeUnboxedPayload(ValueOperand value, T, size_t) { MOZ_CRASH(); }
 
     void rshiftPtr(Imm32, Register) { MOZ_CRASH(); }
     void rshiftPtrArithmetic(Imm32, Register) { MOZ_CRASH(); }
     void lshiftPtr(Imm32, Register) { MOZ_CRASH(); }
+    template <typename T, typename S> void xorPtr(T, S) { MOZ_CRASH(); }
+    template <typename T, typename S> void xor32(T, S) { MOZ_CRASH(); }
+    template <typename T, typename S> void orPtr(T, S) { MOZ_CRASH(); }
+    template <typename T, typename S> void or32(T, S) { MOZ_CRASH(); }
+    template <typename T, typename S> void andPtr(T, S) { MOZ_CRASH(); }
+    template <typename T, typename S> void and32(T, S) { MOZ_CRASH(); }
+    template <typename T> void not32(T) { MOZ_CRASH(); }
     void convertUInt32ToDouble(Register, FloatRegister) { MOZ_CRASH(); }
     void convertUInt32ToFloat32(Register, FloatRegister) { MOZ_CRASH(); }
     void inc64(AbsoluteAddress) { MOZ_CRASH(); }
     void incrementInt32Value(Address) { MOZ_CRASH(); }
     void ensureDouble(ValueOperand, FloatRegister, Label*) { MOZ_CRASH(); }
     void handleFailureWithHandlerTail(void*) { MOZ_CRASH(); }
 
     void branchPtrInNurseryRange(Condition, Register, Register, Label*) { MOZ_CRASH(); }
deleted file mode 100644
--- a/js/src/jit/x64/MacroAssembler-x64-inl.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
- * vim: set ts=8 sts=4 et sw=4 tw=99:
- * This Source Code Form is subject to the terms of the Mozilla Public
- * License, v. 2.0. If a copy of the MPL was not distributed with this
- * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
-
-#ifndef jit_x64_MacroAssembler_x64_inl_h
-#define jit_x64_MacroAssembler_x64_inl_h
-
-#include "jit/x64/MacroAssembler-x64.h"
-
-#include "jit/x86-shared/MacroAssembler-x86-shared-inl.h"
-
-namespace js {
-namespace jit {
-
-//{{{ check_macroassembler_style
-// ===============================================================
-
-void
-MacroAssembler::andPtr(Register src, Register dest)
-{
-    andq(src, dest);
-}
-
-void
-MacroAssembler::andPtr(Imm32 imm, Register dest)
-{
-    andq(imm, dest);
-}
-
-void
-MacroAssembler::orPtr(Register src, Register dest)
-{
-    orq(src, dest);
-}
-
-void
-MacroAssembler::orPtr(Imm32 imm, Register dest)
-{
-    orq(imm, dest);
-}
-
-void
-MacroAssembler::xorPtr(Register src, Register dest)
-{
-    xorq(src, dest);
-}
-
-void
-MacroAssembler::xorPtr(Imm32 imm, Register dest)
-{
-    xorq(imm, dest);
-}
-
-//}}} check_macroassembler_style
-// ===============================================================
-
-} // namespace jit
-} // namespace js
-
-#endif /* jit_x64_MacroAssembler_x64_inl_h */
--- a/js/src/jit/x64/MacroAssembler-x64.h
+++ b/js/src/jit/x64/MacroAssembler-x64.h
@@ -867,19 +867,37 @@ class MacroAssemblerX64 : public MacroAs
         shrq(imm, dest.reg);
     }
     void lshiftPtr(Imm32 imm, Register dest) {
         shlq(imm, dest);
     }
     void lshift64(Imm32 imm, Register64 dest) {
         shlq(imm, dest.reg);
     }
+    void xorPtr(Imm32 imm, Register dest) {
+        xorq(imm, dest);
+    }
+    void xorPtr(Register src, Register dest) {
+        xorq(src, dest);
+    }
+    void orPtr(Imm32 imm, Register dest) {
+        orq(imm, dest);
+    }
+    void orPtr(Register src, Register dest) {
+        orq(src, dest);
+    }
     void or64(Register64 src, Register64 dest) {
         orq(src.reg, dest.reg);
     }
+    void andPtr(Imm32 imm, Register dest) {
+        andq(imm, dest);
+    }
+    void andPtr(Register src, Register dest) {
+        andq(src, dest);
+    }
     void and64(Imm64 imm, Register64 dest) {
         movq(ImmWord(uintptr_t(imm.value)), ScratchReg);
         andq(ScratchReg, dest.reg);
     }
 
     void splitTag(Register src, Register dest) {
         if (src != dest)
             movq(src, dest);
deleted file mode 100644
--- a/js/src/jit/x86-shared/MacroAssembler-x86-shared-inl.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
- * vim: set ts=8 sts=4 et sw=4 tw=99:
- * This Source Code Form is subject to the terms of the Mozilla Public
- * License, v. 2.0. If a copy of the MPL was not distributed with this
- * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
-
-#ifndef jit_x86_shared_MacroAssembler_x86_shared_inl_h
-#define jit_x86_shared_MacroAssembler_x86_shared_inl_h
-
-#include "jit/x86-shared/MacroAssembler-x86-shared.h"
-
-namespace js {
-namespace jit {
-
-//{{{ check_macroassembler_style
-// ===============================================================
-// Logical instructions
-
-void
-MacroAssembler::not32(Register reg)
-{
-    notl(reg);
-}
-
-void
-MacroAssembler::and32(Register src, Register dest)
-{
-    andl(src, dest);
-}
-
-void
-MacroAssembler::and32(Imm32 imm, Register dest)
-{
-    andl(imm, dest);
-}
-
-void
-MacroAssembler::and32(Imm32 imm, const Address& dest)
-{
-    andl(imm, Operand(dest));
-}
-
-void
-MacroAssembler::and32(const Address& src, Register dest)
-{
-    andl(Operand(src), dest);
-}
-
-void
-MacroAssembler::or32(Register src, Register dest)
-{
-    orl(src, dest);
-}
-
-void
-MacroAssembler::or32(Imm32 imm, Register dest)
-{
-    orl(imm, dest);
-}
-
-void
-MacroAssembler::or32(Imm32 imm, const Address& dest)
-{
-    orl(imm, Operand(dest));
-}
-
-void
-MacroAssembler::xor32(Register src, Register dest)
-{
-    xorl(src, dest);
-}
-
-void
-MacroAssembler::xor32(Imm32 imm, Register dest)
-{
-    xorl(imm, dest);
-}
-
-//}}} check_macroassembler_style
-// ===============================================================
-
-} // namespace jit
-} // namespace js
-
-#endif /* jit_x86_shared_MacroAssembler_x86_shared_inl_h */
--- a/js/src/jit/x86-shared/MacroAssembler-x86-shared.h
+++ b/js/src/jit/x86-shared/MacroAssembler-x86-shared.h
@@ -118,16 +118,37 @@ class MacroAssemblerX86Shared : public A
         movl(imm, dest);
     }
     void move32(Register src, Register dest) {
         movl(src, dest);
     }
     void move32(Register src, const Operand& dest) {
         movl(src, dest);
     }
+    void and32(Register src, Register dest) {
+        andl(src, dest);
+    }
+    void and32(const Address& src, Register dest) {
+        andl(Operand(src), dest);
+    }
+    void and32(Imm32 imm, Register dest) {
+        andl(imm, dest);
+    }
+    void and32(Imm32 imm, const Address& dest) {
+        andl(imm, Operand(dest));
+    }
+    void or32(Register src, Register dest) {
+        orl(src, dest);
+    }
+    void or32(Imm32 imm, Register dest) {
+        orl(imm, dest);
+    }
+    void or32(Imm32 imm, const Address& dest) {
+        orl(imm, Operand(dest));
+    }
     void neg32(Register reg) {
         negl(reg);
     }
     void test32(Register lhs, Register rhs) {
         testl(rhs, lhs);
     }
     void test32(const Address& addr, Imm32 imm) {
         testl(imm, Operand(addr));
@@ -185,16 +206,25 @@ class MacroAssemblerX86Shared : public A
         add32(src, dest);
         j(cond, label);
     }
     template <typename T>
     void branchSub32(Condition cond, T src, Register dest, Label* label) {
         sub32(src, dest);
         j(cond, label);
     }
+    void xor32(Imm32 imm, Register dest) {
+        xorl(imm, dest);
+    }
+    void xor32(Register src, Register dest) {
+        xorl(src, dest);
+    }
+    void not32(Register reg) {
+        notl(reg);
+    }
     void atomic_inc32(const Operand& addr) {
         lock_incl(addr);
     }
     void atomic_dec32(const Operand& addr) {
         lock_decl(addr);
     }
 
     template <typename T>
deleted file mode 100644
--- a/js/src/jit/x86/MacroAssembler-x86-inl.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
- * vim: set ts=8 sts=4 et sw=4 tw=99:
- * This Source Code Form is subject to the terms of the Mozilla Public
- * License, v. 2.0. If a copy of the MPL was not distributed with this
- * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
-
-#ifndef jit_x86_MacroAssembler_x86_inl_h
-#define jit_x86_MacroAssembler_x86_inl_h
-
-#include "jit/x86/MacroAssembler-x86.h"
-
-#include "jit/x86-shared/MacroAssembler-x86-shared-inl.h"
-
-namespace js {
-namespace jit {
-
-//{{{ check_macroassembler_style
-// ===============================================================
-
-void
-MacroAssembler::andPtr(Register src, Register dest)
-{
-    andl(src, dest);
-}
-
-void
-MacroAssembler::andPtr(Imm32 imm, Register dest)
-{
-    andl(imm, dest);
-}
-
-void
-MacroAssembler::orPtr(Register src, Register dest)
-{
-    orl(src, dest);
-}
-
-void
-MacroAssembler::orPtr(Imm32 imm, Register dest)
-{
-    orl(imm, dest);
-}
-
-void
-MacroAssembler::xorPtr(Register src, Register dest)
-{
-    xorl(src, dest);
-}
-
-void
-MacroAssembler::xorPtr(Imm32 imm, Register dest)
-{
-    xorl(imm, dest);
-}
-
-//}}} check_macroassembler_style
-// ===============================================================
-
-} // namespace jit
-} // namespace js
-
-#endif /* jit_x86_MacroAssembler_x86_inl_h */
--- a/js/src/jit/x86/MacroAssembler-x86.h
+++ b/js/src/jit/x86/MacroAssembler-x86.h
@@ -1134,20 +1134,38 @@ class MacroAssemblerX86 : public MacroAs
     }
     void lshiftPtr(Imm32 imm, Register dest) {
         shll(imm, dest);
     }
     void lshift64(Imm32 imm, Register64 dest) {
         shldl(imm, dest.low, dest.high);
         shll(imm, dest.low);
     }
+    void xorPtr(Imm32 imm, Register dest) {
+        xorl(imm, dest);
+    }
+    void xorPtr(Register src, Register dest) {
+        xorl(src, dest);
+    }
+    void orPtr(Imm32 imm, Register dest) {
+        orl(imm, dest);
+    }
+    void orPtr(Register src, Register dest) {
+        orl(src, dest);
+    }
     void or64(Register64 src, Register64 dest) {
         orl(src.low, dest.low);
         orl(src.high, dest.high);
     }
+    void andPtr(Imm32 imm, Register dest) {
+        andl(imm, dest);
+    }
+    void andPtr(Register src, Register dest) {
+        andl(src, dest);
+    }
     void and64(Imm64 imm, Register64 dest) {
         andl(Imm32(imm.value & 0xFFFFFFFFL), dest.low);
         andl(Imm32((imm.value >> 32) & 0xFFFFFFFFL), dest.high);
     }
 
     void loadInstructionPointerAfterCall(Register dest) {
         movl(Operand(StackPointer, 0x0), dest);
     }