--- a/js/src/jit/Registers.h
+++ b/js/src/jit/Registers.h
@@ -31,22 +31,16 @@ namespace jit {
 
 struct Register {
     typedef Registers Codes;
     typedef Codes::Encoding Encoding;
     typedef Codes::Code Code;
     typedef Codes::SetType SetType;
 
     Codes::Encoding reg_;
-    MOZ_CONSTEXPR Register()
-        : reg_(Encoding(0))
-    { }
-    MOZ_CONSTEXPR Register(Encoding r)
-        : reg_(r)
-    { }
     static Register FromCode(Code i) {
         MOZ_ASSERT(i < Registers::Total);
         Register r = { Encoding(i) };
         return r;
     }
     static Register FromName(const char* name) {
         Code code = Registers::FromName(name);
         Register r = { Encoding(code) };

--- a/js/src/jit/Snapshots.cpp
+++ b/js/src/jit/Snapshots.cpp
@@ -293,17 +293,17 @@ RValueAllocation::readPayload(CompactBuf
         break;
       case PAYLOAD_INDEX:
         p->index = reader.readUnsigned();
         break;
       case PAYLOAD_STACK_OFFSET:
         p->stackOffset = reader.readSigned();
         break;
       case PAYLOAD_GPR:
-        p->gpr.data = reader.readByte();
+        p->gpr = Register::FromCode(reader.readByte());
         break;
       case PAYLOAD_FPU:
         p->fpu.data = reader.readByte();
         break;
       case PAYLOAD_PACKED_TAG:
         p->type = JSValueType(*mode & PACKED_TAG_MASK);
         *mode = *mode & ~PACKED_TAG_MASK;
         break;

--- a/js/src/jit/Snapshots.h
+++ b/js/src/jit/Snapshots.h
@@ -116,34 +116,20 @@ class RValueAllocation
             return data;
         }
         const char* name() const {
             FloatRegister tmp = FloatRegister::FromCode(data);
             return tmp.name();
         }
     };
 
-    struct RegisterBits {
-        uint32_t data;
-        bool operator == (const RegisterBits& other) const {
-            return data == other.data;
-        }
-        uint32_t code() const {
-            return data;
-        }
-        const char* name() const {
-            Register tmp = Register::FromCode(data);
-            return tmp.name();
-        }
-    };
-
     union Payload {
         uint32_t index;
         int32_t stackOffset;
-        RegisterBits gpr;
+        Register gpr;
         FloatRegisterBits fpu;
         JSValueType type;
     };
 
     Payload arg1_;
     Payload arg2_;
 
     static Payload payloadOfIndex(uint32_t index) {
@@ -153,19 +139,17 @@ class RValueAllocation
     }
     static Payload payloadOfStackOffset(int32_t offset) {
         Payload p;
         p.stackOffset = offset;
         return p;
     }
     static Payload payloadOfRegister(Register reg) {
         Payload p;
-        RegisterBits b;
-        b.data = reg.code();
-        p.gpr = b;
+        p.gpr = reg;
         return p;
     }
     static Payload payloadOfFloatRegister(FloatRegister reg) {
         Payload p;
         FloatRegisterBits b;
         b.data = reg.code();
         p.fpu = b;
         return p;
@@ -321,18 +305,17 @@ class RValueAllocation
         return arg1_.index;
     }
     int32_t stackOffset() const {
         MOZ_ASSERT(layoutFromMode(mode()).type1 == PAYLOAD_STACK_OFFSET);
         return arg1_.stackOffset;
     }
     Register reg() const {
         MOZ_ASSERT(layoutFromMode(mode()).type1 == PAYLOAD_GPR);
-        RegisterBits b = arg1_.gpr;
-        return Register::FromCode(b.data);
+        return arg1_.gpr;
     }
     FloatRegister fpuReg() const {
         MOZ_ASSERT(layoutFromMode(mode()).type1 == PAYLOAD_FPU);
         FloatRegisterBits b = arg1_.fpu;
         return FloatRegister::FromCode(b.data);
     }
     JSValueType knownType() const {
         MOZ_ASSERT(layoutFromMode(mode()).type1 == PAYLOAD_PACKED_TAG);
@@ -344,18 +327,17 @@ class RValueAllocation
         return arg2_.index;
     }
     int32_t stackOffset2() const {
         MOZ_ASSERT(layoutFromMode(mode()).type2 == PAYLOAD_STACK_OFFSET);
         return arg2_.stackOffset;
     }
     Register reg2() const {
         MOZ_ASSERT(layoutFromMode(mode()).type2 == PAYLOAD_GPR);
-        RegisterBits b = arg2_.gpr;
-        return Register::FromCode(b.data);
+        return arg2_.gpr;
     }
 
   public:
     void dump(GenericPrinter& out) const;
 
   public:
     bool operator==(const RValueAllocation& rhs) const {
         if (mode_ != rhs.mode_)

--- a/js/src/jit/x64/Assembler-x64.h
+++ b/js/src/jit/x64/Assembler-x64.h
@@ -101,19 +101,21 @@ static MOZ_CONSTEXPR_VAR Register CallTe
 
 // Different argument registers for WIN64
 #if defined(_WIN64)
 static MOZ_CONSTEXPR_VAR Register IntArgReg0 = rcx;
 static MOZ_CONSTEXPR_VAR Register IntArgReg1 = rdx;
 static MOZ_CONSTEXPR_VAR Register IntArgReg2 = r8;
 static MOZ_CONSTEXPR_VAR Register IntArgReg3 = r9;
 static MOZ_CONSTEXPR_VAR uint32_t NumIntArgRegs = 4;
-static MOZ_CONSTEXPR_VAR Register IntArgRegs[NumIntArgRegs] = { rcx, rdx, r8, r9 };
+// Use "const" instead of MOZ_CONSTEXPR_VAR here to work around a bug
+// of VS2015 Update 1. See bug 1229604.
+static const Register IntArgRegs[NumIntArgRegs] = { rcx, rdx, r8, r9 };
 
-static MOZ_CONSTEXPR_VAR Register CallTempNonArgRegs[] = { rax, rdi, rbx, rsi };
+static const Register CallTempNonArgRegs[] = { rax, rdi, rbx, rsi };
 static const uint32_t NumCallTempNonArgRegs =
     mozilla::ArrayLength(CallTempNonArgRegs);
 
 static MOZ_CONSTEXPR_VAR FloatRegister FloatArgReg0 = xmm0;
 static MOZ_CONSTEXPR_VAR FloatRegister FloatArgReg1 = xmm1;
 static MOZ_CONSTEXPR_VAR FloatRegister FloatArgReg2 = xmm2;
 static MOZ_CONSTEXPR_VAR FloatRegister FloatArgReg3 = xmm3;
 static const uint32_t NumFloatArgRegs = 4;
@@ -121,19 +123,21 @@ static MOZ_CONSTEXPR_VAR FloatRegister F
 #else
 static MOZ_CONSTEXPR_VAR Register IntArgReg0 = rdi;
 static MOZ_CONSTEXPR_VAR Register IntArgReg1 = rsi;
 static MOZ_CONSTEXPR_VAR Register IntArgReg2 = rdx;
 static MOZ_CONSTEXPR_VAR Register IntArgReg3 = rcx;
 static MOZ_CONSTEXPR_VAR Register IntArgReg4 = r8;
 static MOZ_CONSTEXPR_VAR Register IntArgReg5 = r9;
 static MOZ_CONSTEXPR_VAR uint32_t NumIntArgRegs = 6;
-static MOZ_CONSTEXPR_VAR Register IntArgRegs[NumIntArgRegs] = { rdi, rsi, rdx, rcx, r8, r9 };
+static const Register IntArgRegs[NumIntArgRegs] = { rdi, rsi, rdx, rcx, r8, r9 };
 
-static MOZ_CONSTEXPR_VAR Register CallTempNonArgRegs[] = { rax, rbx };
+// Use "const" instead of MOZ_CONSTEXPR_VAR here to work around a bug
+// of VS2015 Update 1. See bug 1229604.
+static const Register CallTempNonArgRegs[] = { rax, rbx };
 static const uint32_t NumCallTempNonArgRegs =
     mozilla::ArrayLength(CallTempNonArgRegs);
 
 static MOZ_CONSTEXPR_VAR FloatRegister FloatArgReg0 = xmm0;
 static MOZ_CONSTEXPR_VAR FloatRegister FloatArgReg1 = xmm1;
 static MOZ_CONSTEXPR_VAR FloatRegister FloatArgReg2 = xmm2;
 static MOZ_CONSTEXPR_VAR FloatRegister FloatArgReg3 = xmm3;
 static MOZ_CONSTEXPR_VAR FloatRegister FloatArgReg4 = xmm4;

--- a/js/src/jit/x86/Assembler-x86.h
+++ b/js/src/jit/x86/Assembler-x86.h
@@ -56,17 +56,19 @@ static MOZ_CONSTEXPR_VAR Register Argume
 static MOZ_CONSTEXPR_VAR Register CallTempReg0 = edi;
 static MOZ_CONSTEXPR_VAR Register CallTempReg1 = eax;
 static MOZ_CONSTEXPR_VAR Register CallTempReg2 = ebx;
 static MOZ_CONSTEXPR_VAR Register CallTempReg3 = ecx;
 static MOZ_CONSTEXPR_VAR Register CallTempReg4 = esi;
 static MOZ_CONSTEXPR_VAR Register CallTempReg5 = edx;
 
 // We have no arg regs, so our NonArgRegs are just our CallTempReg*
-static MOZ_CONSTEXPR_VAR Register CallTempNonArgRegs[] = { edi, eax, ebx, ecx, esi, edx };
+// Use "const" instead of MOZ_CONSTEXPR_VAR here to work around a bug
+// of VS2015 Update 1. See bug 1229604.
+static const Register CallTempNonArgRegs[] = { edi, eax, ebx, ecx, esi, edx };
 static const uint32_t NumCallTempNonArgRegs =
     mozilla::ArrayLength(CallTempNonArgRegs);
 
 class ABIArgGenerator
 {
     uint32_t stackOffset_;
     ABIArg current_;