Bug 1199719 part 1 - Move MacroAssembler::and32 into the generic macro assembler. r=h4writer
☠☠ backed out by f11cf71a5cca ☠ ☠
authorNicolas B. Pierron <nicolas.b.pierron@mozilla.com>
Thu, 10 Sep 2015 22:36:10 +0200
changeset 294466 67639ac86e67440fb912d37ff88f123457b38696
parent 294465 03b7e2925296823b91ef42643bfad18ad94195fd
child 294467 a49cedf75457d76a64bf7f4e11b0f80811d6a32b
push id5245
push userraliiev@mozilla.com
push dateThu, 29 Oct 2015 11:30:51 +0000
treeherdermozilla-beta@dac831dc1bd0 [default view] [failures only]
perfherder[talos] [build metrics] [platform microbench] (compared to previous push)
reviewersh4writer
bugs1199719
milestone43.0a1
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nightly linux64
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Bug 1199719 part 1 - Move MacroAssembler::and32 into the generic macro assembler. r=h4writer
js/src/jit/MacroAssembler-inl.h
js/src/jit/MacroAssembler.h
js/src/jit/arm/MacroAssembler-arm-inl.h
js/src/jit/arm/MacroAssembler-arm.cpp
js/src/jit/arm/MacroAssembler-arm.h
js/src/jit/arm64/MacroAssembler-arm64-inl.h
js/src/jit/arm64/MacroAssembler-arm64.h
js/src/jit/mips32/MacroAssembler-mips32-inl.h
js/src/jit/mips32/MacroAssembler-mips32.cpp
js/src/jit/mips32/MacroAssembler-mips32.h
js/src/jit/none/MacroAssembler-none.h
js/src/jit/x86-shared/MacroAssembler-x86-shared-inl.h
js/src/jit/x86-shared/MacroAssembler-x86-shared.h
--- a/js/src/jit/MacroAssembler-inl.h
+++ b/js/src/jit/MacroAssembler-inl.h
@@ -264,12 +264,28 @@ bool
 MacroAssembler::hasSelfReference() const
 {
     return selfReferencePatch_.offset() != 0;
 }
 
 //}}} check_macroassembler_style
 // ===============================================================
 
+void
+MacroAssembler::branchFunctionKind(Condition cond, JSFunction::FunctionKind kind, Register fun,
+                                   Register scratch, Label* label)
+{
+    // 16-bit loads are slow and unaligned 32-bit loads may be too so
+    // perform an aligned 32-bit load and adjust the bitmask accordingly.
+    MOZ_ASSERT(JSFunction::offsetOfNargs() % sizeof(uint32_t) == 0);
+    MOZ_ASSERT(JSFunction::offsetOfFlags() == JSFunction::offsetOfNargs() + 2);
+    Address address(fun, JSFunction::offsetOfNargs());
+    int32_t mask = IMM32_16ADJ(JSFunction::FUNCTION_KIND_MASK);
+    int32_t bit = IMM32_16ADJ(kind << JSFunction::FUNCTION_KIND_SHIFT);
+    load32(address, scratch);
+    and32(Imm32(mask), scratch);
+    branch32(cond, scratch, Imm32(bit), label);
+}
+
 } // namespace jit
 } // namespace js
 
 #endif /* jit_MacroAssembler_inl_h */
--- a/js/src/jit/MacroAssembler.h
+++ b/js/src/jit/MacroAssembler.h
@@ -650,16 +650,26 @@ class MacroAssembler : public MacroAssem
     // Patch the value of PushStubCode with the pointer to the finalized code.
     void linkSelfReference(JitCode* code);
 
     // If the JitCode that created this assembler needs to transition into the VM,
     // we want to store the JitCode on the stack in order to mark it during a GC.
     // This is a reference to a patch location where the JitCode* will be written.
     CodeOffsetLabel selfReferencePatch_;
 
+  public:
+    // ===============================================================
+    // Logical instructions
+
+    inline void and32(Register src, Register dest) PER_SHARED_ARCH;
+    inline void and32(Imm32 imm, Register dest) PER_SHARED_ARCH;
+    inline void and32(Imm32 imm, Register src, Register dest) DEFINED_ON(arm64);
+    inline void and32(Imm32 imm, const Address& dest) PER_SHARED_ARCH;
+    inline void and32(const Address& src, Register dest) PER_SHARED_ARCH;
+
     //}}} check_macroassembler_style
   public:
 
     // Emits a test of a value against all types in a TypeSet. A scratch
     // register is required.
     template <typename Source>
     void guardTypeSet(const Source& address, const TypeSet* types, BarrierKind kind, Register scratch, Label* miss);
 
@@ -1177,30 +1187,18 @@ class MacroAssembler : public MacroAssem
     }
 
     void branchTestObjectIsProxy(bool proxy, Register object, Register scratch, Label* label)
     {
         loadObjClass(object, scratch);
         branchTestClassIsProxy(proxy, scratch, label);
     }
 
-    void branchFunctionKind(Condition cond, JSFunction::FunctionKind kind, Register fun,
-                            Register scratch, Label* label)
-    {
-        // 16-bit loads are slow and unaligned 32-bit loads may be too so
-        // perform an aligned 32-bit load and adjust the bitmask accordingly.
-        MOZ_ASSERT(JSFunction::offsetOfNargs() % sizeof(uint32_t) == 0);
-        MOZ_ASSERT(JSFunction::offsetOfFlags() == JSFunction::offsetOfNargs() + 2);
-        Address address(fun, JSFunction::offsetOfNargs());
-        int32_t mask = IMM32_16ADJ(JSFunction::FUNCTION_KIND_MASK);
-        int32_t bit = IMM32_16ADJ(kind << JSFunction::FUNCTION_KIND_SHIFT);
-        load32(address, scratch);
-        and32(Imm32(mask), scratch);
-        branch32(cond, scratch, Imm32(bit), label);
-    }
+    inline void branchFunctionKind(Condition cond, JSFunction::FunctionKind kind, Register fun,
+                                   Register scratch, Label* label);
 
   public:
 #ifndef JS_CODEGEN_ARM64
     // StackPointer manipulation functions.
     // On ARM64, the StackPointer is implemented as two synchronized registers.
     // Code shared across platforms must use these functions to be valid.
     template <typename T>
     void addToStackPtr(T t) { addPtr(t, getStackPointer()); }
--- a/js/src/jit/arm/MacroAssembler-arm-inl.h
+++ b/js/src/jit/arm/MacroAssembler-arm-inl.h
@@ -9,17 +9,53 @@
 
 #include "jit/arm/MacroAssembler-arm.h"
 
 namespace js {
 namespace jit {
 
 //{{{ check_macroassembler_style
 // ===============================================================
+// Logical instructions
 
+void
+MacroAssembler::and32(Register src, Register dest)
+{
+    ma_and(src, dest, SetCC);
+}
+
+void
+MacroAssembler::and32(Imm32 imm, Register dest)
+{
+    ma_and(imm, dest, SetCC);
+}
+
+void
+MacroAssembler::and32(Imm32 imm, const Address& dest)
+{
+    ScratchRegisterScope scratch(*this);
+    load32(dest, scratch);
+    ma_and(imm, scratch);
+    store32(scratch, dest);
+}
+
+void
+MacroAssembler::and32(const Address& src, Register dest)
+{
+    ScratchRegisterScope scratch(*this);
+    load32(src, scratch);
+    ma_and(scratch, dest, SetCC);
+}
 
 //}}} check_macroassembler_style
 // ===============================================================
 
+void
+MacroAssemblerARMCompat::and64(Imm64 imm, Register64 dest)
+{
+    asMasm().and32(Imm32(imm.value & 0xFFFFFFFFL), dest.low);
+    asMasm().and32(Imm32((imm.value >> 32) & 0xFFFFFFFFL), dest.high);
+}
+
 } // namespace jit
 } // namespace js
 
 #endif /* jit_arm_MacroAssembler_arm_inl_h */
--- a/js/src/jit/arm/MacroAssembler-arm.cpp
+++ b/js/src/jit/arm/MacroAssembler-arm.cpp
@@ -1948,36 +1948,16 @@ MacroAssemblerARMCompat::sub32(Imm32 imm
 
 void
 MacroAssemblerARMCompat::sub32(Register src, Register dest)
 {
     ma_sub(src, dest, SetCC);
 }
 
 void
-MacroAssemblerARMCompat::and32(Register src, Register dest)
-{
-    ma_and(src, dest, SetCC);
-}
-
-void
-MacroAssemblerARMCompat::and32(Imm32 imm, Register dest)
-{
-    ma_and(imm, dest, SetCC);
-}
-
-void
-MacroAssemblerARMCompat::and32(const Address& src, Register dest)
-{
-    ScratchRegisterScope scratch(asMasm());
-    load32(src, scratch);
-    ma_and(scratch, dest, SetCC);
-}
-
-void
 MacroAssemblerARMCompat::addPtr(Register src, Register dest)
 {
     ma_add(src, dest);
 }
 
 void
 MacroAssemblerARMCompat::addPtr(const Address& src, Register dest)
 {
@@ -1988,25 +1968,16 @@ MacroAssemblerARMCompat::addPtr(const Ad
 
 void
 MacroAssemblerARMCompat::not32(Register reg)
 {
     ma_mvn(reg, reg);
 }
 
 void
-MacroAssemblerARMCompat::and32(Imm32 imm, const Address& dest)
-{
-    ScratchRegisterScope scratch(asMasm());
-    load32(dest, scratch);
-    ma_and(imm, scratch);
-    store32(scratch, dest);
-}
-
-void
 MacroAssemblerARMCompat::or32(Imm32 imm, const Address& dest)
 {
     ScratchRegisterScope scratch(asMasm());
     load32(dest, scratch);
     ma_orr(imm, scratch);
     store32(scratch, dest);
 }
 
--- a/js/src/jit/arm/MacroAssembler-arm.h
+++ b/js/src/jit/arm/MacroAssembler-arm.h
@@ -1208,24 +1208,17 @@ class MacroAssemblerARMCompat : public M
     }
     template <typename T>
     void branchSub32(Condition cond, T src, Register dest, Label* label) {
         sub32(src, dest);
         j(cond, label);
     }
     void xor32(Imm32 imm, Register dest);
 
-    void and32(Register src, Register dest);
-    void and32(Imm32 imm, Register dest);
-    void and32(Imm32 imm, const Address& dest);
-    void and32(const Address& src, Register dest);
-    void and64(Imm64 imm, Register64 dest) {
-        and32(Imm32(imm.value & 0xFFFFFFFFL), dest.low);
-        and32(Imm32((imm.value >> 32) & 0xFFFFFFFFL), dest.high);
-    }
+    inline void and64(Imm64 imm, Register64 dest);
     void or32(Register src, Register dest);
     void or32(Imm32 imm, Register dest);
     void or32(Imm32 imm, const Address& dest);
     void xorPtr(Imm32 imm, Register dest);
     void xorPtr(Register src, Register dest);
     void orPtr(Imm32 imm, Register dest);
     void orPtr(Register src, Register dest);
     void or64(Register64 src, Register64 dest) {
--- a/js/src/jit/arm64/MacroAssembler-arm64-inl.h
+++ b/js/src/jit/arm64/MacroAssembler-arm64-inl.h
@@ -9,17 +9,56 @@
 
 #include "jit/arm64/MacroAssembler-arm64.h"
 
 namespace js {
 namespace jit {
 
 //{{{ check_macroassembler_style
 // ===============================================================
+// Logical instructions
 
+void
+MacroAssembler::and32(Register src, Register dest)
+{
+    And(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(ARMRegister(src, 32)));
+}
+
+void
+MacroAssembler::and32(Imm32 imm, Register dest)
+{
+    And(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(imm.value));
+}
+
+void
+MacroAssembler::and32(Imm32 imm, Register src, Register dest)
+{
+    And(ARMRegister(dest, 32), ARMRegister(src, 32), Operand(imm.value));
+}
+
+void
+MacroAssembler::and32(Imm32 imm, const Address& dest)
+{
+    vixl::UseScratchRegisterScope temps(this);
+    const ARMRegister scratch32 = temps.AcquireW();
+    MOZ_ASSERT(scratch32.asUnsized() != dest.base);
+    load32(dest, scratch32.asUnsized());
+    And(scratch32, scratch32, Operand(imm.value));
+    store32(scratch32.asUnsized(), dest);
+}
+
+void
+MacroAssembler::and32(const Address& src, Register dest)
+{
+    vixl::UseScratchRegisterScope temps(this);
+    const ARMRegister scratch32 = temps.AcquireW();
+    MOZ_ASSERT(scratch32.asUnsized() != src.base);
+    load32(src, scratch32.asUnsized());
+    And(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(scratch32));
+}
 
 //}}} check_macroassembler_style
 // ===============================================================
 
 } // namespace jit
 } // namespace js
 
 #endif /* jit_arm64_MacroAssembler_arm64_inl_h */
--- a/js/src/jit/arm64/MacroAssembler-arm64.h
+++ b/js/src/jit/arm64/MacroAssembler-arm64.h
@@ -1130,41 +1130,16 @@ class MacroAssemblerCompat : public vixl
         orPtr(src.reg, dest.reg);
     }
     void andPtr(Imm32 imm, Register dest) {
         And(ARMRegister(dest, 64), ARMRegister(dest, 64), Operand(imm.value));
     }
     void andPtr(Register src, Register dest) {
         And(ARMRegister(dest, 64), ARMRegister(dest, 64), Operand(ARMRegister(src, 64)));
     }
-    void and32(Imm32 imm, Register dest) {
-        And(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(imm.value));
-    }
-    void and32(Imm32 imm, Register src, Register dest) {
-        And(ARMRegister(dest, 32), ARMRegister(src, 32), Operand(imm.value));
-    }
-
-    void and32(Register src, Register dest) {
-        And(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(ARMRegister(src, 32)));
-    }
-    void and32(Imm32 mask, Address dest) {
-        vixl::UseScratchRegisterScope temps(this);
-        const ARMRegister scratch32 = temps.AcquireW();
-        MOZ_ASSERT(scratch32.asUnsized() != dest.base);
-        load32(dest, scratch32.asUnsized());
-        And(scratch32, scratch32, Operand(mask.value));
-        store32(scratch32.asUnsized(), dest);
-    }
-    void and32(Address src, Register dest) {
-        vixl::UseScratchRegisterScope temps(this);
-        const ARMRegister scratch32 = temps.AcquireW();
-        MOZ_ASSERT(scratch32.asUnsized() != src.base);
-        load32(src, scratch32.asUnsized());
-        And(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(scratch32));
-    }
     void and64(Imm64 imm, Register64 dest) {
         vixl::UseScratchRegisterScope temps(this);
         const Register scratch = temps.AcquireX().asUnsized();
         mov(ImmWord(imm.value), scratch);
         andPtr(scratch, dest.reg);
     }
 
     void testPtr(Register lhs, Register rhs) {
--- a/js/src/jit/mips32/MacroAssembler-mips32-inl.h
+++ b/js/src/jit/mips32/MacroAssembler-mips32-inl.h
@@ -9,17 +9,51 @@
 
 #include "jit/mips32/MacroAssembler-mips32.h"
 
 namespace js {
 namespace jit {
 
 //{{{ check_macroassembler_style
 // ===============================================================
+// Logical instructions
 
+void
+MacroAssembler::and32(Register src, Register dest)
+{
+    ma_and(dest, dest, src);
+}
+
+void
+MacroAssembler::and32(Imm32 imm, Register dest)
+{
+    ma_and(dest, imm);
+}
+
+void
+MacroAssembler::and32(Imm32 imm, const Address& dest)
+{
+    load32(dest, SecondScratchReg);
+    ma_and(SecondScratchReg, imm);
+    store32(SecondScratchReg, dest);
+}
+
+void
+MacroAssembler::and32(const Address& src, Register dest)
+{
+    load32(src, SecondScratchReg);
+    ma_and(dest, SecondScratchReg);
+}
 
 //}}} check_macroassembler_style
 // ===============================================================
 
+void
+MacroAssemblerMIPSCompat::and64(Imm64 imm, Register64 dest)
+{
+    asMasm().and32(Imm32(imm.value & LOW_32_MASK), dest.low);
+    asMasm().and32(Imm32((imm.value >> 32) & LOW_32_MASK), dest.high);
+}
+
 } // namespace jit
 } // namespace js
 
 #endif /* jit_mips32_MacroAssembler_mips32_inl_h */
--- a/js/src/jit/mips32/MacroAssembler-mips32.cpp
+++ b/js/src/jit/mips32/MacroAssembler-mips32.cpp
@@ -1626,43 +1626,16 @@ MacroAssemblerMIPSCompat::subPtr(Registe
 void
 MacroAssemblerMIPSCompat::not32(Register reg)
 {
     ma_not(reg, reg);
 }
 
 // Logical operations
 void
-MacroAssemblerMIPSCompat::and32(Register src, Register dest)
-{
-    ma_and(dest, dest, src);
-}
-
-void
-MacroAssemblerMIPSCompat::and32(Imm32 imm, Register dest)
-{
-    ma_and(dest, imm);
-}
-
-void
-MacroAssemblerMIPSCompat::and32(Imm32 imm, const Address& dest)
-{
-    load32(dest, SecondScratchReg);
-    ma_and(SecondScratchReg, imm);
-    store32(SecondScratchReg, dest);
-}
-
-void
-MacroAssemblerMIPSCompat::and32(const Address& src, Register dest)
-{
-    load32(src, SecondScratchReg);
-    ma_and(dest, SecondScratchReg);
-}
-
-void
 MacroAssemblerMIPSCompat::or32(Imm32 imm, Register dest)
 {
     ma_or(dest, imm);
 }
 
 
 void
 MacroAssemblerMIPSCompat::or32(Imm32 imm, const Address& dest)
--- a/js/src/jit/mips32/MacroAssembler-mips32.h
+++ b/js/src/jit/mips32/MacroAssembler-mips32.h
@@ -1146,24 +1146,17 @@ public:
             sub32(src, dest);
             ma_b(dest, dest, overflow, cond);
             break;
           default:
             MOZ_CRASH("NYI");
         }
     }
 
-    void and32(Register src, Register dest);
-    void and32(Imm32 imm, Register dest);
-    void and32(Imm32 imm, const Address& dest);
-    void and32(const Address& src, Register dest);
-    void and64(Imm64 imm, Register64 dest) {
-        and32(Imm32(imm.value & LOW_32_MASK), dest.low);
-        and32(Imm32((imm.value >> 32) & LOW_32_MASK), dest.high);
-    }
+    inline void and64(Imm64 imm, Register64 dest);
     void or32(Imm32 imm, Register dest);
     void or32(Imm32 imm, const Address& dest);
     void or32(Register src, Register dest);
     void or64(Register64 src, Register64 dest) {
         or32(src.low, dest.low);
         or32(src.high, dest.high);
     }
     void xor32(Imm32 imm, Register dest);
--- a/js/src/jit/none/MacroAssembler-none.h
+++ b/js/src/jit/none/MacroAssembler-none.h
@@ -425,17 +425,16 @@ class MacroAssemblerNone : public Assemb
     void rshiftPtr(Imm32, Register) { MOZ_CRASH(); }
     void rshiftPtrArithmetic(Imm32, Register) { MOZ_CRASH(); }
     void lshiftPtr(Imm32, Register) { MOZ_CRASH(); }
     template <typename T, typename S> void xorPtr(T, S) { MOZ_CRASH(); }
     template <typename T, typename S> void xor32(T, S) { MOZ_CRASH(); }
     template <typename T, typename S> void orPtr(T, S) { MOZ_CRASH(); }
     template <typename T, typename S> void or32(T, S) { MOZ_CRASH(); }
     template <typename T, typename S> void andPtr(T, S) { MOZ_CRASH(); }
-    template <typename T, typename S> void and32(T, S) { MOZ_CRASH(); }
     template <typename T> void not32(T) { MOZ_CRASH(); }
     void convertUInt32ToDouble(Register, FloatRegister) { MOZ_CRASH(); }
     void convertUInt32ToFloat32(Register, FloatRegister) { MOZ_CRASH(); }
     void inc64(AbsoluteAddress) { MOZ_CRASH(); }
     void incrementInt32Value(Address) { MOZ_CRASH(); }
     void ensureDouble(ValueOperand, FloatRegister, Label*) { MOZ_CRASH(); }
     void handleFailureWithHandlerTail(void*) { MOZ_CRASH(); }
 
--- a/js/src/jit/x86-shared/MacroAssembler-x86-shared-inl.h
+++ b/js/src/jit/x86-shared/MacroAssembler-x86-shared-inl.h
@@ -9,17 +9,41 @@
 
 #include "jit/x86-shared/MacroAssembler-x86-shared.h"
 
 namespace js {
 namespace jit {
 
 //{{{ check_macroassembler_style
 // ===============================================================
+// Logical instructions
 
+void
+MacroAssembler::and32(Register src, Register dest)
+{
+    andl(src, dest);
+}
+
+void
+MacroAssembler::and32(Imm32 imm, Register dest)
+{
+    andl(imm, dest);
+}
+
+void
+MacroAssembler::and32(Imm32 imm, const Address& dest)
+{
+    andl(imm, Operand(dest));
+}
+
+void
+MacroAssembler::and32(const Address& src, Register dest)
+{
+    andl(Operand(src), dest);
+}
 
 //}}} check_macroassembler_style
 // ===============================================================
 
 } // namespace jit
 } // namespace js
 
 #endif /* jit_x86_shared_MacroAssembler_x86_shared_inl_h */
--- a/js/src/jit/x86-shared/MacroAssembler-x86-shared.h
+++ b/js/src/jit/x86-shared/MacroAssembler-x86-shared.h
@@ -118,28 +118,16 @@ class MacroAssemblerX86Shared : public A
         movl(imm, dest);
     }
     void move32(Register src, Register dest) {
         movl(src, dest);
     }
     void move32(Register src, const Operand& dest) {
         movl(src, dest);
     }
-    void and32(Register src, Register dest) {
-        andl(src, dest);
-    }
-    void and32(const Address& src, Register dest) {
-        andl(Operand(src), dest);
-    }
-    void and32(Imm32 imm, Register dest) {
-        andl(imm, dest);
-    }
-    void and32(Imm32 imm, const Address& dest) {
-        andl(imm, Operand(dest));
-    }
     void or32(Register src, Register dest) {
         orl(src, dest);
     }
     void or32(Imm32 imm, Register dest) {
         orl(imm, dest);
     }
     void or32(Imm32 imm, const Address& dest) {
         orl(imm, Operand(dest));