Bug 821268 - Move NaNCond to the assembler. r=djvj
authorJan de Mooij <jdemooij@mozilla.com>
Fri, 14 Dec 2012 09:51:11 +0100
changeset 125146 6002b73474a7085819aa342277c86249d524b893
parent 125145 fe5784e9e50bb6eddfa7afda5b4d3e854638ea88
child 125147 b1fb4089fa9bce285d6cdbc3c57272cabcada21e
push id2151
push userlsblakk@mozilla.com
push dateTue, 19 Feb 2013 18:06:57 +0000
treeherdermozilla-beta@4952e88741ec [default view] [failures only]
perfherder[talos] [build metrics] [platform microbench] (compared to previous push)
reviewersdjvj
bugs821268
milestone20.0a1
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Bug 821268 - Move NaNCond to the assembler. r=djvj
js/src/ion/shared/Assembler-x86-shared.h
js/src/ion/shared/CodeGenerator-x86-shared.cpp
js/src/ion/shared/CodeGenerator-x86-shared.h
--- a/js/src/ion/shared/Assembler-x86-shared.h
+++ b/js/src/ion/shared/Assembler-x86-shared.h
@@ -93,16 +93,46 @@ class AssemblerX86Shared
         DoubleEqualOrUnordered = Equal,
         DoubleNotEqualOrUnordered = NotEqual | DoubleConditionBitSpecial,
         DoubleGreaterThanOrUnordered = Below | DoubleConditionBitInvert,
         DoubleGreaterThanOrEqualOrUnordered = BelowOrEqual | DoubleConditionBitInvert,
         DoubleLessThanOrUnordered = Below,
         DoubleLessThanOrEqualOrUnordered = BelowOrEqual
     };
 
+    enum NaNCond {
+        NaN_Unexpected,
+        NaN_IsTrue,
+        NaN_IsFalse
+    };
+
+    static inline NaNCond NaNCondFromDoubleCondition(DoubleCondition cond) {
+        switch (cond) {
+          case DoubleOrdered:
+          case DoubleEqual:
+          case DoubleNotEqual:
+          case DoubleGreaterThan:
+          case DoubleGreaterThanOrEqual:
+          case DoubleLessThan:
+          case DoubleLessThanOrEqual:
+            return NaN_IsFalse;
+          case DoubleUnordered:
+          case DoubleEqualOrUnordered:
+          case DoubleNotEqualOrUnordered:
+          case DoubleGreaterThanOrUnordered:
+          case DoubleGreaterThanOrEqualOrUnordered:
+          case DoubleLessThanOrUnordered:
+          case DoubleLessThanOrEqualOrUnordered:
+            return NaN_IsTrue;
+        }
+
+        JS_NOT_REACHED("Unknown double condition");
+        return NaN_Unexpected;
+    }
+
     static void staticAsserts() {
         // DoubleConditionBits should not interfere with x86 condition codes.
         JS_STATIC_ASSERT(!((Equal | NotEqual | Above | AboveOrEqual | Below |
                             BelowOrEqual | Parity | NoParity) & DoubleConditionBits));
     }
 
     AssemblerX86Shared()
       : dataBytesNeeded_(0),
--- a/js/src/ion/shared/CodeGenerator-x86-shared.cpp
+++ b/js/src/ion/shared/CodeGenerator-x86-shared.cpp
@@ -83,52 +83,26 @@ CodeGeneratorX86Shared::generateEpilogue
 }
 
 bool
 OutOfLineBailout::accept(CodeGeneratorX86Shared *codegen)
 {
     return codegen->visitOutOfLineBailout(this);
 }
 
-static inline NaNCond
-NaNCondFromDoubleCondition(Assembler::DoubleCondition cond)
-{
-    switch (cond) {
-      case Assembler::DoubleOrdered:
-      case Assembler::DoubleEqual:
-      case Assembler::DoubleNotEqual:
-      case Assembler::DoubleGreaterThan:
-      case Assembler::DoubleGreaterThanOrEqual:
-      case Assembler::DoubleLessThan:
-      case Assembler::DoubleLessThanOrEqual:
-        return NaN_IsFalse;
-      case Assembler::DoubleUnordered:
-      case Assembler::DoubleEqualOrUnordered:
-      case Assembler::DoubleNotEqualOrUnordered:
-      case Assembler::DoubleGreaterThanOrUnordered:
-      case Assembler::DoubleGreaterThanOrEqualOrUnordered:
-      case Assembler::DoubleLessThanOrUnordered:
-      case Assembler::DoubleLessThanOrEqualOrUnordered:
-        return NaN_IsTrue;
-    }
-
-    JS_NOT_REACHED("Unknown double condition");
-    return NaN_Unexpected;
-}
-
 void
 CodeGeneratorX86Shared::emitBranch(Assembler::Condition cond, MBasicBlock *mirTrue,
-                                   MBasicBlock *mirFalse, NaNCond ifNaN)
+                                   MBasicBlock *mirFalse, Assembler::NaNCond ifNaN)
 {
     LBlock *ifTrue = mirTrue->lir();
     LBlock *ifFalse = mirFalse->lir();
 
-    if (ifNaN == NaN_IsFalse)
+    if (ifNaN == Assembler::NaN_IsFalse)
         masm.j(Assembler::Parity, ifFalse->label());
-    else if (ifNaN == NaN_IsTrue)
+    else if (ifNaN == Assembler::NaN_IsTrue)
         masm.j(Assembler::Parity, ifTrue->label());
 
     if (isNextBlock(ifFalse)) {
         masm.j(cond, ifTrue->label());
     } else {
         masm.j(Assembler::InvertCondition(cond), ifFalse->label());
         if (!isNextBlock(ifTrue))
             masm.jmp(ifTrue->label());
@@ -163,42 +137,43 @@ CodeGeneratorX86Shared::visitTestDAndBra
     // enough to determine which branch to take.
     masm.xorpd(ScratchFloatReg, ScratchFloatReg);
     masm.ucomisd(ToFloatRegister(opd), ScratchFloatReg);
     emitBranch(Assembler::NotEqual, test->ifTrue(), test->ifFalse());
     return true;
 }
 
 void
-CodeGeneratorX86Shared::emitSet(Assembler::Condition cond, const Register &dest, NaNCond ifNaN)
+CodeGeneratorX86Shared::emitSet(Assembler::Condition cond, const Register &dest,
+                                Assembler::NaNCond ifNaN)
 {
     if (GeneralRegisterSet(Registers::SingleByteRegs).has(dest)) {
         // If the register we're defining is a single byte register,
         // take advantage of the setCC instruction
         masm.setCC(cond, dest);
         masm.movzxbl(dest, dest);
 
-        if (ifNaN != NaN_Unexpected) {
+        if (ifNaN != Assembler::NaN_Unexpected) {
             Label noNaN;
             masm.j(Assembler::NoParity, &noNaN);
-            if (ifNaN == NaN_IsTrue)
+            if (ifNaN == Assembler::NaN_IsTrue)
                 masm.movl(Imm32(1), dest);
             else
                 masm.xorl(dest, dest);
             masm.bind(&noNaN);
         }
     } else {
         Label end;
         Label ifFalse;
 
-        if (ifNaN == NaN_IsFalse)
+        if (ifNaN == Assembler::NaN_IsFalse)
             masm.j(Assembler::Parity, &ifFalse);
         masm.movl(Imm32(1), dest);
         masm.j(cond, &end);
-        if (ifNaN == NaN_IsTrue)
+        if (ifNaN == Assembler::NaN_IsTrue)
             masm.j(Assembler::Parity, &end);
         masm.bind(&ifFalse);
         masm.xorl(dest, dest);
 
         masm.bind(&end);
     }
 }
 
@@ -239,17 +214,17 @@ bool
 CodeGeneratorX86Shared::visitCompareD(LCompareD *comp)
 {
     FloatRegister lhs = ToFloatRegister(comp->left());
     FloatRegister rhs = ToFloatRegister(comp->right());
 
     Assembler::DoubleCondition cond = JSOpToDoubleCondition(comp->mir()->jsop());
     masm.compareDouble(cond, lhs, rhs);
     emitSet(Assembler::ConditionFromDoubleCondition(cond), ToRegister(comp->output()),
-            NaNCondFromDoubleCondition(cond));
+            Assembler::NaNCondFromDoubleCondition(cond));
     return true;
 }
 
 bool
 CodeGeneratorX86Shared::visitNotI(LNotI *ins)
 {
     masm.cmpl(ToRegister(ins->input()), Imm32(0));
     emitSet(Assembler::Equal, ToRegister(ins->output()));
@@ -258,30 +233,30 @@ CodeGeneratorX86Shared::visitNotI(LNotI 
 
 bool
 CodeGeneratorX86Shared::visitNotD(LNotD *ins)
 {
     FloatRegister opd = ToFloatRegister(ins->input());
 
     masm.xorpd(ScratchFloatReg, ScratchFloatReg);
     masm.compareDouble(Assembler::DoubleEqualOrUnordered, opd, ScratchFloatReg);
-    emitSet(Assembler::Equal, ToRegister(ins->output()), NaN_IsTrue);
+    emitSet(Assembler::Equal, ToRegister(ins->output()), Assembler::NaN_IsTrue);
     return true;
 }
 
 bool
 CodeGeneratorX86Shared::visitCompareDAndBranch(LCompareDAndBranch *comp)
 {
     FloatRegister lhs = ToFloatRegister(comp->left());
     FloatRegister rhs = ToFloatRegister(comp->right());
 
     Assembler::DoubleCondition cond = JSOpToDoubleCondition(comp->mir()->jsop());
     masm.compareDouble(cond, lhs, rhs);
     emitBranch(Assembler::ConditionFromDoubleCondition(cond), comp->ifTrue(), comp->ifFalse(),
-               NaNCondFromDoubleCondition(cond));
+               Assembler::NaNCondFromDoubleCondition(cond));
     return true;
 }
 
 bool
 CodeGeneratorX86Shared::generateOutOfLineCode()
 {
     if (!CodeGeneratorShared::generateOutOfLineCode())
         return false;
--- a/js/src/ion/shared/CodeGenerator-x86-shared.h
+++ b/js/src/ion/shared/CodeGenerator-x86-shared.h
@@ -13,22 +13,16 @@
 namespace js {
 namespace ion {
 
 class OutOfLineBailout;
 class OutOfLineUndoALUOperation;
 class MulNegativeZeroCheck;
 class OutOfLineTruncate;
 
-enum NaNCond {
-    NaN_Unexpected,
-    NaN_IsTrue,
-    NaN_IsFalse
-};
-
 class CodeGeneratorX86Shared : public CodeGeneratorShared
 {
     friend class MoveResolverX86;
 
     CodeGeneratorX86Shared *thisFromCtor() {
         return this;
     }
 
@@ -67,23 +61,24 @@ class CodeGeneratorX86Shared : public Co
 
     void emitDoubleToInt32(const FloatRegister &src, const Register &dest, Label *fail, bool negativeZeroCheck = true);
 
     Operand createArrayElementOperand(Register elements, const LAllocation *index);
 
     void emitCompare(MIRType type, const LAllocation *left, const LAllocation *right);
 
     // Emits a conditional set.
-    void emitSet(Assembler::Condition cond, const Register &dest, NaNCond ifNaN = NaN_Unexpected);
+    void emitSet(Assembler::Condition cond, const Register &dest,
+                 Assembler::NaNCond ifNaN = Assembler::NaN_Unexpected);
     void emitSet(Assembler::DoubleCondition cond, const Register &dest);
 
     // Emits a branch that directs control flow to the true block if |cond| is
     // true, and the false block if |cond| is false.
     void emitBranch(Assembler::Condition cond, MBasicBlock *ifTrue, MBasicBlock *ifFalse,
-                    NaNCond ifNaN = NaN_Unexpected);
+                    Assembler::NaNCond ifNaN = Assembler::NaN_Unexpected);
     void emitBranch(Assembler::DoubleCondition cond, MBasicBlock *ifTrue, MBasicBlock *ifFalse);
 
     bool emitTableSwitchDispatch(MTableSwitch *mir, const Register &index, const Register &base);
 
   public:
     CodeGeneratorX86Shared(MIRGenerator *gen, LIRGraph *graph);
 
   public: