searching for reviewer(sstangl)
2e7f918e6874a712a7f9ff07d30f24521a32193a: Bug 1546446 - Carry the pool-free size to the finishPool function. r=sstangl, a=jcristau
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Tue, 28 May 2019 14:32:19 +0000 - rev 533577
Push 11362 by jcristau@mozilla.com at Mon, 03 Jun 2019 16:05:27 +0000
Bug 1546446 - Carry the pool-free size to the finishPool function. r=sstangl, a=jcristau Differential Revision: https://phabricator.services.mozilla.com/D28816
9c775e06b5f7102562075e8c5d7a33e21c7ef0ca: Bug 1545537 - Disable some jit-tests on android due to harness issues. r=sstangl
Ted Campbell <tcampbell@mozilla.com> - Wed, 01 May 2019 22:08:40 +0000 - rev 531037
Push 11265 by ffxbld-merge at Mon, 13 May 2019 10:53:39 +0000
Bug 1545537 - Disable some jit-tests on android due to harness issues. r=sstangl Disable certain jit-tests until Bug 1532654 is fixed. Differential Revision: https://phabricator.services.mozilla.com/D28843
16aee8bebc477f1aa17f68bd43d3e1f1a2e7bc6a: Bug 1545537 - Add 'android' as a jsshell buildConfiguration property. r=sstangl
Ted Campbell <tcampbell@mozilla.com> - Wed, 01 May 2019 22:06:53 +0000 - rev 531036
Push 11265 by ffxbld-merge at Mon, 13 May 2019 10:53:39 +0000
Bug 1545537 - Add 'android' as a jsshell buildConfiguration property. r=sstangl Differential Revision: https://phabricator.services.mozilla.com/D28842
ae2f7d5c145e23057a3ada819d57231f4687fa73: Bug 1521158 - Invalidate ARM64 caches by increments of at most 32 bytes instead of increments of cache lines. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Thu, 25 Apr 2019 16:39:14 +0000 - rev 530151
Push 11265 by ffxbld-merge at Mon, 13 May 2019 10:53:39 +0000
Bug 1521158 - Invalidate ARM64 caches by increments of at most 32 bytes instead of increments of cache lines. r=sstangl Differential Revision: https://phabricator.services.mozilla.com/D28827
aadb254e2a5afd89e42f12315f84d1199b36346e: Bug 1441436 - ARM64 Simulator: Add D&I cache coherency checks. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Mon, 15 Apr 2019 21:11:40 +0000 - rev 529020
Push 11265 by ffxbld-merge at Mon, 13 May 2019 10:53:39 +0000
Bug 1441436 - ARM64 Simulator: Add D&I cache coherency checks. r=sstangl Differential Revision: https://phabricator.services.mozilla.com/D19970
e55ace0633daf9eb7bd5f260300fdbd770834bb3: Bug 1534840 part 3 - Prevent ARM from generating nops within jump tables. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Tue, 16 Apr 2019 13:56:58 +0000 - rev 528489
Push 11265 by ffxbld-merge at Mon, 13 May 2019 10:53:39 +0000
Bug 1534840 part 3 - Prevent ARM from generating nops within jump tables. r=sstangl Depends on D26522 Differential Revision: https://phabricator.services.mozilla.com/D26523
e024cb135284b83edb799f6f8cf84a4f054d7e35: Bug 1534840 part 2 - Prevent ARM64 from generating constant pools within jump tables. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Tue, 16 Apr 2019 13:56:50 +0000 - rev 528488
Push 11265 by ffxbld-merge at Mon, 13 May 2019 10:53:39 +0000
Bug 1534840 part 2 - Prevent ARM64 from generating constant pools within jump tables. r=sstangl Depends on D26521 Differential Revision: https://phabricator.services.mozilla.com/D26522
4f54d68ba18e0e74beac705ae76c7f9b7263f994: Bug 1534840 part 1 - Add an assertion to check that we can generate contiguous jump tables. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Tue, 16 Apr 2019 13:56:48 +0000 - rev 528487
Push 11265 by ffxbld-merge at Mon, 13 May 2019 10:53:39 +0000
Bug 1534840 part 1 - Add an assertion to check that we can generate contiguous jump tables. r=sstangl Depends on D26520 Differential Revision: https://phabricator.services.mozilla.com/D26521
639d0d388b9628477625b2d6d7930ffd20e6f65c: Bug 1534840 part 0 - Clarify table case generation in CodeGenerator::visitOutOfLineSwitch. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Tue, 16 Apr 2019 13:56:46 +0000 - rev 528486
Push 11265 by ffxbld-merge at Mon, 13 May 2019 10:53:39 +0000
Bug 1534840 part 0 - Clarify table case generation in CodeGenerator::visitOutOfLineSwitch. r=sstangl Differential Revision: https://phabricator.services.mozilla.com/D26520
b23278bf5294b13d8228fb93515c4ee973ec5b7f: Bug 1534492 - Prevent RegAlloc from allocating an argument register for a temp used in passAbiArg base operand. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Thu, 04 Apr 2019 13:33:34 +0000 - rev 526807
Push 11265 by ffxbld-merge at Mon, 13 May 2019 10:53:39 +0000
Bug 1534492 - Prevent RegAlloc from allocating an argument register for a temp used in passAbiArg base operand. r=sstangl Differential Revision: https://phabricator.services.mozilla.com/D25944
1db2227119d0d7784485d489ec680c20e3f24600: Bug 1541463 - Enable MacroAssembler spew when --enable-jitspew is provided. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Wed, 03 Apr 2019 16:47:49 +0000 - rev 526781
Push 11265 by ffxbld-merge at Mon, 13 May 2019 10:53:39 +0000
Bug 1541463 - Enable MacroAssembler spew when --enable-jitspew is provided. r=sstangl Differential Revision: https://phabricator.services.mozilla.com/D25945
1778699fa005874daead175293e374af9c7a092d: Bug 1534492 - Prevent RegAlloc from allocating an argument register for a temp used in passAbiArg base operand. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Wed, 03 Apr 2019 16:46:48 +0000 - rev 526780
Push 11265 by ffxbld-merge at Mon, 13 May 2019 10:53:39 +0000
Bug 1534492 - Prevent RegAlloc from allocating an argument register for a temp used in passAbiArg base operand. r=sstangl Differential Revision: https://phabricator.services.mozilla.com/D25944
16044e8bda4b4e0e654b5b8c7c43bd9ad1d8e3da: Bug 1530351 - GenerateProfilerExit frame use 64-bits math to remove the rectifier frame size. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Tue, 02 Apr 2019 15:44:58 +0000 - rev 526430
Push 11265 by ffxbld-merge at Mon, 13 May 2019 10:53:39 +0000
Bug 1530351 - GenerateProfilerExit frame use 64-bits math to remove the rectifier frame size. r=sstangl Differential Revision: https://phabricator.services.mozilla.com/D25755
d77a06489c3e80ac21c4ab75fb2e8af4236d95d7: Bug 1529559 - ARM64: PatchJump change the branching schema if the target is out of range. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Tue, 19 Mar 2019 18:23:52 +0000 - rev 523894
Push 11265 by ffxbld-merge at Mon, 13 May 2019 10:53:39 +0000
Bug 1529559 - ARM64: PatchJump change the branching schema if the target is out of range. r=sstangl Differential Revision: https://phabricator.services.mozilla.com/D23361
fab87214b264dcf281db22bf4e4d1a696a5f1d49: Bug 1521158 - Invalidate ARM64 caches by increments of at most 32 bytes instead of increments of cache lines. r=sstangl a=pascalc
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Thu, 25 Apr 2019 16:39:14 +0000 - rev 523450
Push 11202 by apavel@mozilla.com at Wed, 01 May 2019 15:21:44 +0000
Bug 1521158 - Invalidate ARM64 caches by increments of at most 32 bytes instead of increments of cache lines. r=sstangl a=pascalc Differential Revision: https://phabricator.services.mozilla.com/D28827
8d7c9a41c240c3577063cd4f34ef8c2647c54dd4: Bug 1534492 - Prevent RegAlloc from allocating an argument register for a temp used in passAbiArg base operand. r=sstangl a=pascalc
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Thu, 04 Apr 2019 13:33:34 +0000 - rev 523075
Push 11048 by opoprus@mozilla.com at Tue, 09 Apr 2019 15:08:22 +0000
Bug 1534492 - Prevent RegAlloc from allocating an argument register for a temp used in passAbiArg base operand. r=sstangl a=pascalc Differential Revision: https://phabricator.services.mozilla.com/D25944
0c6cb165ba726b0987fbe1df7ffc65c714b4e562: Bug 1530351 - GenerateProfilerExit frame use 64-bits math to remove the rectifier frame size. r=sstangl a=pascalc
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Tue, 02 Apr 2019 15:44:58 +0000 - rev 523074
Push 11048 by opoprus@mozilla.com at Tue, 09 Apr 2019 15:08:22 +0000
Bug 1530351 - GenerateProfilerExit frame use 64-bits math to remove the rectifier frame size. r=sstangl a=pascalc Differential Revision: https://phabricator.services.mozilla.com/D25755
a4c5f31c23abcfd6bf67cd6ed9cda4caa0aa9175: Bug 1529559 - ARM64: PatchJump change the branching schema if the target is out of range. r=sstangl a=pascalc
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Tue, 19 Mar 2019 18:23:52 +0000 - rev 522902
Push 10986 by dvarga@mozilla.com at Wed, 03 Apr 2019 13:48:07 +0000
Bug 1529559 - ARM64: PatchJump change the branching schema if the target is out of range. r=sstangl a=pascalc Differential Revision: https://phabricator.services.mozilla.com/D23361
425b8e0eb6d60a2b78a79f8948774d2202155122: Bug 1534810 - ARM64: LMulI should copy registers when multiplying by 1. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Thu, 14 Mar 2019 21:48:08 +0000 - rev 522036
Push 10871 by cbrindusan@mozilla.com at Mon, 18 Mar 2019 15:49:32 +0000
Bug 1534810 - ARM64: LMulI should copy registers when multiplying by 1. r=sstangl Differential Revision: https://phabricator.services.mozilla.com/D23553
e4bda8b288b31ebcf537a1764c6f166cee5c3fb5: Bug 1528597 - ARM64: Fix CodeGenerator::visiShiftI Ursh case doing more than other architecture and baseline. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Fri, 01 Mar 2019 16:14:42 +0000 - rev 519842
Push 10862 by ffxbld-merge at Mon, 11 Mar 2019 13:01:11 +0000
Bug 1528597 - ARM64: Fix CodeGenerator::visiShiftI Ursh case doing more than other architecture and baseline. r=sstangl Differential Revision: https://phabricator.services.mozilla.com/D21385
08c00f2c0eaba54e7f99aa5b0024338187464e7e: Bug 1528399 - ARM64: EnterJIT should align on 16 bytes instead of 256. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Wed, 27 Feb 2019 16:49:10 +0000 - rev 519354
Push 10862 by ffxbld-merge at Mon, 11 Mar 2019 13:01:11 +0000
Bug 1528399 - ARM64: EnterJIT should align on 16 bytes instead of 256. r=sstangl Differential Revision: https://phabricator.services.mozilla.com/D20174
4c7b508eb10d6743cc53c0b798a62569aa492cf5: Bug 1526959 - ARM64 Simulator: Clobber volatile registers on VM function calls. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Fri, 15 Feb 2019 14:29:43 +0000 - rev 517317
Push 10862 by ffxbld-merge at Mon, 11 Mar 2019 13:01:11 +0000
Bug 1526959 - ARM64 Simulator: Clobber volatile registers on VM function calls. r=sstangl Differential Revision: https://phabricator.services.mozilla.com/D19363
ce68e72b6fb617b54e0116116a563d20deb301e4: Bug 1522300 - ARM64: Restore the Pseudo stack pointer before asserting that it has the correct alignment. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Tue, 12 Feb 2019 19:49:34 +0000 - rev 516762
Push 10862 by ffxbld-merge at Mon, 11 Mar 2019 13:01:11 +0000
Bug 1522300 - ARM64: Restore the Pseudo stack pointer before asserting that it has the correct alignment. r=sstangl Differential Revision: https://phabricator.services.mozilla.com/D19543
d7989f40291e2d1551e4e86c611e9b5cde008da5: Bug 1522298 - ARM64: Ensure that the emulated stack pointer is restored when returning from WASM. r=bbouvier,sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Mon, 11 Feb 2019 13:07:15 +0000 - rev 516359
Push 10862 by ffxbld-merge at Mon, 11 Mar 2019 13:01:11 +0000
Bug 1522298 - ARM64: Ensure that the emulated stack pointer is restored when returning from WASM. r=bbouvier,sstangl Differential Revision: https://phabricator.services.mozilla.com/D19185
6785ac75ef2642643090a6279c52c6c2f710f1d3: Bug 1522276 - IonMonkey ARM64: Add generic UDiv implementation. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Thu, 31 Jan 2019 10:47:54 +0000 - rev 514105
Push 10862 by ffxbld-merge at Mon, 11 Mar 2019 13:01:11 +0000
Bug 1522276 - IonMonkey ARM64: Add generic UDiv implementation. r=sstangl Differential Revision: https://phabricator.services.mozilla.com/D17929
7e275859021304429a08ed48ec3700b10f4283df: Bug 1481097 - vixl: Remove vixl assembler workaround for gcc 4.8.2 bug. r=sstangl
Chris Peterson <cpeterson@mozilla.com> - Wed, 30 Jan 2019 22:42:01 +0000 - rev 514037
Push 10862 by ffxbld-merge at Mon, 11 Mar 2019 13:01:11 +0000
Bug 1481097 - vixl: Remove vixl assembler workaround for gcc 4.8.2 bug. r=sstangl This gcc 4.8.2 workaround (from bug 1219050) is no longer needed because Firefox currently requires gcc 6.1 or later (as of bug 1444274). Differential Revision: https://phabricator.services.mozilla.com/D5506
614a820c5bb1a05d12b6198c29b5ee2b6ed85b1a: Bug 1522268 - ARM64: MoveOP::Int32 should load 32 bits values after breaking cycles. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Mon, 28 Jan 2019 21:38:41 +0000 - rev 513730
Push 10862 by ffxbld-merge at Mon, 11 Mar 2019 13:01:11 +0000
Bug 1522268 - ARM64: MoveOP::Int32 should load 32 bits values after breaking cycles. r=sstangl Differential Revision: https://phabricator.services.mozilla.com/D17841
611a26ed535b152e907eea2bd573fb3ae413e737: Bug 1522284 - ARM64: record when JitCode is storing nursery pointers. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Fri, 25 Jan 2019 23:28:23 +0000 - rev 513472
Push 10862 by ffxbld-merge at Mon, 11 Mar 2019 13:01:11 +0000
Bug 1522284 - ARM64: record when JitCode is storing nursery pointers. r=sstangl Differential Revision: https://phabricator.services.mozilla.com/D17655
9c28047982f2ef9cae4e87301b8148230af7e17f: Bug 1521092 - ARM64: pop(FloatRegister) use ARMFPRegister instead of the register code. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Wed, 23 Jan 2019 19:35:00 +0100 - rev 512556
Push 10566 by archaeopteryx@coole-files.de at Mon, 28 Jan 2019 12:41:12 +0000
Bug 1521092 - ARM64: pop(FloatRegister) use ARMFPRegister instead of the register code. r=sstangl
35d94075e745d86bea017e573d11388b810f0ee8: Bug 1521092 - Codegen Spew: Output the name of the CacheIR functions. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Wed, 23 Jan 2019 19:33:10 +0100 - rev 512555
Push 10566 by archaeopteryx@coole-files.de at Mon, 28 Jan 2019 12:41:12 +0000
Bug 1521092 - Codegen Spew: Output the name of the CacheIR functions. r=sstangl
88420eeebda0c49c945ef719128208f33b5f0d6c: Bug 1520827 - Ensure contiguous jump tables. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Thu, 17 Jan 2019 19:22:22 +0100 - rev 512554
Push 10566 by archaeopteryx@coole-files.de at Mon, 28 Jan 2019 12:41:12 +0000
Bug 1520827 - Ensure contiguous jump tables. r=sstangl
68c3af3df20efad7faab88f7852b5842fb97f5f8: Bug 1518565 - Flush the instruction cache when patching OSIPoints. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Thu, 10 Jan 2019 19:42:11 +0100 - rev 511306
Push 10547 by ffxbld-merge at Mon, 21 Jan 2019 13:03:58 +0000
Bug 1518565 - Flush the instruction cache when patching OSIPoints. r=sstangl
6362baa5cb54a12724396665790d982c84516c90: Bug 1519401 - ARM64: Fix CodeGenerator::LBitAndAndBranch to use the condition flag of the MIR. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Tue, 15 Jan 2019 15:12:30 +0100 - rev 511110
Push 10547 by ffxbld-merge at Mon, 21 Jan 2019 13:03:58 +0000
Bug 1519401 - ARM64: Fix CodeGenerator::LBitAndAndBranch to use the condition flag of the MIR. r=sstangl
9429979e423ce7358a453d717175771aef609ee8: Bug 1517553 - ARM64 JIT: Change JSVAL_TAG comparisons to require only 2 instructions and 1 register. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Mon, 07 Jan 2019 16:58:02 +0100 - rev 510270
Push 10547 by ffxbld-merge at Mon, 21 Jan 2019 13:03:58 +0000
Bug 1517553 - ARM64 JIT: Change JSVAL_TAG comparisons to require only 2 instructions and 1 register. r=sstangl
d949e9cf60ab5852a24d43f737279709c9a257b5: Bug 1518181 - IonAssemblerBufferWithConstantPools skip no-pool constraints after running out-of-memory. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Mon, 07 Jan 2019 19:14:56 +0100 - rev 510013
Push 10547 by ffxbld-merge at Mon, 21 Jan 2019 13:03:58 +0000
Bug 1518181 - IonAssemblerBufferWithConstantPools skip no-pool constraints after running out-of-memory. r=sstangl When running out-of-memory, we are no longer allowed to read the content of the MacroAssembler buffer, as such we can safely ignore the soundness of the enterNoPool and leaveNoPool scopes if we ran out of memory.
86afdee4cff987a8de0a1e97005ede4f9fba011c: Bug 1451385 - ARM64: Update the last profiling frame after a JSOP_RESUME return opcode. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Thu, 27 Dec 2018 18:44:24 +0100 - rev 509643
Push 10547 by ffxbld-merge at Mon, 21 Jan 2019 13:03:58 +0000
Bug 1451385 - ARM64: Update the last profiling frame after a JSOP_RESUME return opcode. r=sstangl
3487b5f2f426760ebc402e42755dcb164644f022: Bug 1515963 - Add vixl::GdbDisassembleInstruction. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Fri, 21 Dec 2018 17:50:47 +0100 - rev 509113
Push 10547 by ffxbld-merge at Mon, 21 Jan 2019 13:03:58 +0000
Bug 1515963 - Add vixl::GdbDisassembleInstruction. r=sstangl This add a simple function made to be called from gdb, which uses the vixl decoder to output in a static buffer the string corresponding to a single instruction. This is useful when breaking at vixl::Simulator::ExecuteInstruction function, as follow: (gdb) b vixl::Simulator::ExecuteInstruction Breakpoint 1 at 0x...: file ../jit/arm64/vixl/MozSimulator-vixl.cpp. (gdb) command 1 > call vixl::GdbDisassembleInstruction(this->pc_) > end
89834b056ca0e1969845185d0d007a695b03c503: Bug 1515704 - ARM64: Generate code for LPowHalfD. r=sstangl
Nicolas B. Pierron <nicolas.b.pierron@nbp.name> - Thu, 20 Dec 2018 18:53:41 +0100 - rev 509112
Push 10547 by ffxbld-merge at Mon, 21 Jan 2019 13:03:58 +0000
Bug 1515704 - ARM64: Generate code for LPowHalfD. r=sstangl
dac051017e70948d01ed9070802af9b227ddcb76: Bug 1505690 - Replace JSScript::vtuneMethodId_ with a HashMap. r=sstangl
Jan de Mooij <jdemooij@mozilla.com> - Tue, 20 Nov 2018 10:40:40 +0000 - rev 503627
Push 10290 by ffxbld-merge at Mon, 03 Dec 2018 16:23:23 +0000
Bug 1505690 - Replace JSScript::vtuneMethodId_ with a HashMap. r=sstangl MOZ_VTUNE is defined on Nightly (because of --enable-profiling). With the HashMap we only have some memory/perf overhead when we're actually using VTune's JIT code profiler. Differential Revision: https://phabricator.services.mozilla.com/D11292
24f10efb4ce15935103f61a360969af89503a41d: Bug 1446307 - Compute toggled call size properly; fix constant pool header. r=sstangl
Lars T Hansen <lhansen@mozilla.com> - Fri, 02 Nov 2018 13:42:00 -0400 - rev 500734
Push 10290 by ffxbld-merge at Mon, 03 Dec 2018 16:23:23 +0000
Bug 1446307 - Compute toggled call size properly; fix constant pool header. r=sstangl ToggledCallSize() on ARM64 did not properly account for all the possible places where a constant pool could be found; also, it can be updated to use better abstractions. WritePoolHeader() on ARM64 did not generate a correct header because it used sizeof(Instructions), which is meaningless on this platform, as Instruction has no data fields. Use kInstructionSize instead, that's what it's for, and everyone else uses it.
c5c10f26e38c40810997b409829e0cdbb84cfcd3: Bug 1501269: Make EnsureIAndDCacheCoherency work on aarch64-windows. r=sstangl
David Major <dmajor@mozilla.com> - Tue, 30 Oct 2018 17:29:40 -0400 - rev 500091
Push 10290 by ffxbld-merge at Mon, 03 Dec 2018 16:23:23 +0000
Bug 1501269: Make EnsureIAndDCacheCoherency work on aarch64-windows. r=sstangl Differential Revision: https://phabricator.services.mozilla.com/D9724
57e435f97c303a4e04f9d74e5eafbe89cc6acab5: Bug 1501301: Fix the argv loop in aarch64 generateEnterJIT r=sstangl
David Major <dmajor@mozilla.com> - Tue, 23 Oct 2018 19:41:49 +0000 - rev 499076
Push 10290 by ffxbld-merge at Mon, 03 Dec 2018 16:23:23 +0000
Bug 1501301: Fix the argv loop in aarch64 generateEnterJIT r=sstangl The code was looping one too many times. Differential Revision: https://phabricator.services.mozilla.com/D9530
2ab5c5c5752842820bc063a02bba2baf121ec943: Bug 1480594 - undefine a few macros for aarch64 windows's benefit; r=sstangl
Nathan Froyd <froydnj@mozilla.com> - Tue, 18 Sep 2018 15:13:24 -0400 - rev 492890
Push 9984 by ffxbld-merge at Mon, 15 Oct 2018 21:07:35 +0000
Bug 1480594 - undefine a few macros for aarch64 windows's benefit; r=sstangl Various assembler methods don't play nicely with Windows headers and their constant macro definitions, so we have to #undef a few things along the way.
019ed2fbfc31ee084b056e4b73a9ac1badec6ef1: Bug 1458382 - Repeat GCC bug workaround in another place. r=sstangl
Philip Chimento <philip.chimento@gmail.com> - Fri, 27 Jul 2018 12:31:30 -0400 - rev 484712
Push 9719 by ffxbld-merge at Fri, 24 Aug 2018 17:49:46 +0000
Bug 1458382 - Repeat GCC bug workaround in another place. r=sstangl
e17f5abb81144da115cfc6cefdff93f610913e8c: Bug 1472268: Update in-tree VTune integration SDK. r=sstangl
Bas Schouten <bschouten@mozilla.com> - Sun, 01 Jul 2018 23:45:38 +0200 - rev 479711
Push 9719 by ffxbld-merge at Fri, 24 Aug 2018 17:49:46 +0000
Bug 1472268: Update in-tree VTune integration SDK. r=sstangl MozReview-Commit-ID: 9yRZFboc51U
b1ca612ffb07f244735f83df37947652de43a6bf: Bug 1458382 - Repeat GCC bug workaround in another place. r=sstangl a=lizzard
Philip Chimento <philip.chimento@gmail.com> - Fri, 27 Jul 2018 12:31:30 -0400 - rev 478267
Push 9597 by archaeopteryx@coole-files.de at Mon, 06 Aug 2018 16:10:28 +0000
Bug 1458382 - Repeat GCC bug workaround in another place. r=sstangl a=lizzard
236c11a47aa76a80072cef75cbd4971a55419413: Bug 1451292 - Better payload for arm64 breakpoint instruction. r=sstangl
Lars T Hansen <lhansen@mozilla.com> - Wed, 04 Apr 2018 15:48:48 +0200 - rev 465429
Push 9165 by asasaki@mozilla.com at Thu, 26 Apr 2018 21:04:54 +0000
Bug 1451292 - Better payload for arm64 breakpoint instruction. r=sstangl At least some non-zero payloads confuse GDB and make it iloop on the breakpoint instruction rather than break to the command line as it should. There seems to be no reason not to use a zero payload.
903a79a1efff18fc7cc50db09a3fe5d768adc9a8: Bug 1445907 - Save x28 before clobbering it in the regex compiler. r=sstangl
Lars T Hansen <lhansen@mozilla.com> - Mon, 19 Mar 2018 09:58:06 +0100 - rev 463235
Push 9165 by asasaki@mozilla.com at Thu, 26 Apr 2018 21:04:54 +0000
Bug 1445907 - Save x28 before clobbering it in the regex compiler. r=sstangl
1aa685a4d83836790713bc1a03d4217d6d5d44f1: Bug 1442583 - Properly initialize ARM64 icache flushing machinery. r=sstangl
Lars T Hansen <lhansen@mozilla.com> - Mon, 05 Mar 2018 09:55:28 +0100 - rev 461413
Push 9165 by asasaki@mozilla.com at Thu, 26 Apr 2018 21:04:54 +0000
Bug 1442583 - Properly initialize ARM64 icache flushing machinery. r=sstangl
800abe66894d6b07b24bccecbf6a65e2261076f6: Bug 1375074 - Save and restore non-volatile x28 on ARM64 for generated unboxed object constructor. r=sstangl
Lars T Hansen <lhansen@mozilla.com> - Wed, 28 Feb 2018 13:57:52 +0100 - rev 461412
Push 9165 by asasaki@mozilla.com at Thu, 26 Apr 2018 21:04:54 +0000
Bug 1375074 - Save and restore non-volatile x28 on ARM64 for generated unboxed object constructor. r=sstangl