Bug 1115748 - SpiderMonkey: Use named enums intead of typedefs for anonymous enums r=jandem
authorDan Gohman <sunfish@mozilla.com>
Sun, 28 Dec 2014 07:04:12 -0800
changeset 238176 c7fd289fa6fa0a713e9ceb2e5fe045e4f0c1b42b
parent 238175 13a2592c2e2a96e2f742770c02aec933c5aff789
child 238177 0ea34b180725246de813cc4f9846628980973e81
push id7472
push userraliiev@mozilla.com
push dateMon, 12 Jan 2015 20:36:27 +0000
treeherdermozilla-aurora@300ca104f8fb [default view] [failures only]
perfherder[talos] [build metrics] [platform microbench] (compared to previous push)
reviewersjandem
bugs1115748
milestone37.0a1
Bug 1115748 - SpiderMonkey: Use named enums intead of typedefs for anonymous enums r=jandem
js/src/jit/shared/BaseAssembler-x86-shared.h
--- a/js/src/jit/shared/BaseAssembler-x86-shared.h
+++ b/js/src/jit/shared/BaseAssembler-x86-shared.h
@@ -41,17 +41,17 @@ namespace js {
 namespace jit {
 
 inline bool CAN_SIGN_EXTEND_8_32(int32_t value) { return value == (int32_t)(signed char)value; }
 inline bool CAN_ZERO_EXTEND_8_32(int32_t value) { return value == (int32_t)(unsigned char)value; }
 inline bool CAN_ZERO_EXTEND_8H_32(int32_t value) { return value == (value & 0xff00); }
 inline bool CAN_ZERO_EXTEND_32_64(int32_t value) { return value >= 0; }
 
 namespace X86Registers {
-    typedef enum {
+    enum RegisterID {
         eax,
         ecx,
         edx,
         ebx,
         esp,
         ebp,
         esi,
         edi
@@ -62,19 +62,19 @@ namespace X86Registers {
         r10,
         r11,
         r12,
         r13,
         r14,
         r15
 #endif
         ,invalid_reg
-    } RegisterID;
-
-    typedef enum {
+    };
+
+    enum XMMRegisterID {
         xmm0,
         xmm1,
         xmm2,
         xmm3,
         xmm4,
         xmm5,
         xmm6,
         xmm7
@@ -84,17 +84,17 @@ namespace X86Registers {
         xmm10,
         xmm11,
         xmm12,
         xmm13,
         xmm14,
         xmm15
 #endif
        ,invalid_xmm
-    } XMMRegisterID;
+    };
 
     static const char* nameFPReg(XMMRegisterID fpreg)
     {
         static const char* const xmmnames[16]
           = { "%xmm0", "%xmm1", "%xmm2", "%xmm3",
               "%xmm4", "%xmm5", "%xmm6", "%xmm7",
               "%xmm8", "%xmm9", "%xmm10", "%xmm11",
               "%xmm12", "%xmm13", "%xmm14", "%xmm15" };
@@ -185,17 +185,17 @@ ByteRegRequiresRex(int reg)
 }
 
 class X86Assembler : public GenericAssembler {
 public:
     typedef X86Registers::RegisterID RegisterID;
     typedef X86Registers::XMMRegisterID XMMRegisterID;
     typedef XMMRegisterID FPRegisterID;
 
-    typedef enum {
+    enum Condition {
         ConditionO,
         ConditionNO,
         ConditionB,
         ConditionAE,
         ConditionE,
         ConditionNE,
         ConditionBE,
         ConditionA,
@@ -205,50 +205,50 @@ public:
         ConditionNP,
         ConditionL,
         ConditionGE,
         ConditionLE,
         ConditionG,
 
         ConditionC  = ConditionB,
         ConditionNC = ConditionAE
-    } Condition;
+    };
 
     // Conditions for CMP instructions (CMPSS, CMPSD, CMPPS, CMPPD, etc).
-    typedef enum {
+    enum ConditionCmp {
         ConditionCmp_EQ    = 0x0,
         ConditionCmp_LT    = 0x1,
         ConditionCmp_LE    = 0x2,
         ConditionCmp_UNORD = 0x3,
         ConditionCmp_NEQ   = 0x4,
         ConditionCmp_NLT   = 0x5,
         ConditionCmp_NLE   = 0x6,
         ConditionCmp_ORD   = 0x7,
-    } ConditionCmp;
+    };
 
     static const char* nameCC(Condition cc)
     {
         static const char* const names[16]
           = { "o ", "no", "b ", "ae", "e ", "ne", "be", "a ",
               "s ", "ns", "p ", "np", "l ", "ge", "le", "g " };
         int ix = (int)cc;
         MOZ_ASSERT(ix >= 0 && size_t(ix) < mozilla::ArrayLength(names));
         return names[ix];
     }
 
     // Rounding modes for ROUNDSD.
-    typedef enum {
+    enum RoundingMode {
         RoundToNearest = 0x0,
         RoundDown      = 0x1,
         RoundUp        = 0x2,
         RoundToZero    = 0x3
-    } RoundingMode;
+    };
 
 private:
-    typedef enum {
+    enum OneByteOpcodeID {
         OP_ADD_EbGb                     = 0x00,
         OP_ADD_EvGv                     = 0x01,
         OP_ADD_GvEv                     = 0x03,
         OP_ADD_EAXIv                    = 0x05,
         OP_OR_EbGb                      = 0x08,
         OP_OR_EvGv                      = 0x09,
         OP_OR_GvEv                      = 0x0B,
         OP_OR_EAXIv                     = 0x0D,
@@ -323,19 +323,19 @@ private:
         PRE_LOCK                        = 0xF0,
         PRE_SSE_F2                      = 0xF2,
         PRE_SSE_F3                      = 0xF3,
         OP_HLT                          = 0xF4,
         OP_GROUP3_EbIb                  = 0xF6,
         OP_GROUP3_Ev                    = 0xF7,
         OP_GROUP3_EvIz                  = 0xF7, // OP_GROUP3_Ev has an immediate, when instruction is a test.
         OP_GROUP5_Ev                    = 0xFF
-    } OneByteOpcodeID;
-
-    typedef enum {
+    };
+
+    enum TwoByteOpcodeID {
         OP2_UD2             = 0x0B,
         OP2_MOVSD_VsdWsd    = 0x10,
         OP2_MOVPS_VpsWps    = 0x10,
         OP2_MOVSD_WsdVsd    = 0x11,
         OP2_MOVPS_WpsVps    = 0x11,
         OP2_MOVHLPS_VqUq    = 0x12,
         OP2_MOVSLDUP_VpsWps = 0x12,
         OP2_UNPCKLPS_VsdWsd = 0x14,
@@ -413,61 +413,61 @@ private:
         OP2_PANDNDQ_VdqWdq  = 0xDF,
         OP2_PSRAD_VdqWdq    = 0xE2,
         OP2_PORDQ_VdqWdq    = 0xEB,
         OP2_PXORDQ_VdqWdq   = 0xEF,
         OP2_PSLLD_VdqWdq    = 0xF2,
         OP2_PMULUDQ_VdqWdq  = 0xF4,
         OP2_PSUBD_VdqWdq    = 0xFA,
         OP2_PADDD_VdqWdq    = 0xFE
-    } TwoByteOpcodeID;
-
-    typedef enum {
+    };
+
+    enum ThreeByteOpcodeID {
         OP3_ROUNDSS_VsdWsd  = 0x0A,
         OP3_ROUNDSD_VsdWsd  = 0x0B,
         OP3_BLENDVPS_VdqWdq = 0x14,
         OP3_PEXTRD_EdVdqIb  = 0x16,
         OP3_BLENDPS_VpsWpsIb = 0x0C,
         OP3_PTEST_VdVd      = 0x17,
         OP3_INSERTPS_VpsUps = 0x21,
         OP3_PINSRD_VdqEdIb  = 0x22,
         OP3_PMULLD_VdqWdq   = 0x40,
         OP3_VBLENDVPS_VdqWdq = 0x4A
-    } ThreeByteOpcodeID;
-
-    typedef enum {
+    };
+
+    enum ThreeByteEscape {
         ESCAPE_BLENDVPS     = 0x38,
         ESCAPE_PMULLD       = 0x38,
         ESCAPE_PTEST        = 0x38,
         ESCAPE_PINSRD       = 0x3A,
         ESCAPE_PEXTRD       = 0x3A,
         ESCAPE_ROUNDSD      = 0x3A,
         ESCAPE_INSERTPS     = 0x3A,
         ESCAPE_BLENDPS      = 0x3A,
         ESCAPE_VBLENDVPS    = 0x3A
-    } ThreeByteEscape;
-
-    typedef enum {
+    };
+
+    enum VexOperandType {
         VEX_PS = 0,
         VEX_PD = 1,
         VEX_SS = 2,
         VEX_SD = 3
-    } VexOperandType;
+    };
 
     TwoByteOpcodeID jccRel32(Condition cond)
     {
         return (TwoByteOpcodeID)(OP2_JCC_rel32 + cond);
     }
 
     TwoByteOpcodeID setccOpcode(Condition cond)
     {
         return (TwoByteOpcodeID)(OP_SETCC + cond);
     }
 
-    typedef enum {
+    enum GroupOpcodeID {
         GROUP1_OP_ADD = 0,
         GROUP1_OP_OR  = 1,
         GROUP1_OP_ADC = 2,
         GROUP1_OP_AND = 4,
         GROUP1_OP_SUB = 5,
         GROUP1_OP_XOR = 6,
         GROUP1_OP_CMP = 7,
 
@@ -490,17 +490,17 @@ private:
         GROUP5_OP_JMPN  = 4,
         GROUP5_OP_PUSH  = 6,
 
         FPU6_OP_FLD     = 0,
         FPU6_OP_FISTTP  = 1,
         FPU6_OP_FSTP    = 3,
 
         GROUP11_MOV = 0
-    } GroupOpcodeID;
+    };
 
     class X86InstructionFormatter;
 public:
     X86Assembler()
       : useVEX_(true)
     { }
 
     void disableVEX() { useVEX_ = false; }