Adjust VMFrame assertions to fix the ARM build. [bug 655260] [r=bhackett]
authorJacob Bramley <Jacob.Bramley@arm.com>
Wed, 11 May 2011 15:16:22 +0100
changeset 75030 07270a0cbc869c7de9a04e6ccbe10f5eb04b9630
parent 75029 e96dad5f95fdbdc9ecbcd3ba63bcfefd77e788c4
child 75031 5e9fa1b150aab88ef9e81502c133d0853bd17a66
push id2
push userbsmedberg@mozilla.com
push dateFri, 19 Aug 2011 14:38:13 +0000
reviewersbhackett
bugs655260
milestone6.0a1
Adjust VMFrame assertions to fix the ARM build. [bug 655260] [r=bhackett]
js/src/methodjit/BaseAssembler.h
js/src/methodjit/MethodJIT.cpp
js/src/methodjit/MethodJIT.h
--- a/js/src/methodjit/BaseAssembler.h
+++ b/js/src/methodjit/BaseAssembler.h
@@ -172,18 +172,18 @@ class Assembler : public ValueAssembler
     }
 
     /* Register pair storing returned type/data for calls. */
 #if defined(JS_CPU_X86) || defined(JS_CPU_X64)
 static const JSC::MacroAssembler::RegisterID JSReturnReg_Type  = JSC::X86Registers::edi;
 static const JSC::MacroAssembler::RegisterID JSReturnReg_Data  = JSC::X86Registers::esi;
 static const JSC::MacroAssembler::RegisterID JSParamReg_Argc   = JSC::X86Registers::ecx;
 #elif defined(JS_CPU_ARM)
-static const JSC::MacroAssembler::RegisterID JSReturnReg_Type  = JSC::ARMRegisters::r4;
-static const JSC::MacroAssembler::RegisterID JSReturnReg_Data  = JSC::ARMRegisters::r5;
+static const JSC::MacroAssembler::RegisterID JSReturnReg_Type  = JSC::ARMRegisters::r5;
+static const JSC::MacroAssembler::RegisterID JSReturnReg_Data  = JSC::ARMRegisters::r4;
 static const JSC::MacroAssembler::RegisterID JSParamReg_Argc   = JSC::ARMRegisters::r1;
 #elif defined(JS_CPU_SPARC)
 static const JSC::MacroAssembler::RegisterID JSReturnReg_Type = JSC::SparcRegisters::l2;
 static const JSC::MacroAssembler::RegisterID JSReturnReg_Data = JSC::SparcRegisters::l3;
 static const JSC::MacroAssembler::RegisterID JSParamReg_Argc  = JSC::SparcRegisters::i2;
 #endif
 
     size_t distanceOf(Label l) {
--- a/js/src/methodjit/MethodJIT.cpp
+++ b/js/src/methodjit/MethodJIT.cpp
@@ -466,28 +466,28 @@ asm (
 SYMBOL_STRING(JaegerInterpolineScripted) ":"        "\n"
     "movl 0x10(%ebp), %ebp"                         "\n" /* load prev. :XXX: STATIC_ASSERT this */
     "movl  %ebp, 0x1C(%esp)"                        "\n"
     "jmp " SYMBOL_STRING_RELOC(JaegerInterpoline)   "\n"
 );
 
 # elif defined(JS_CPU_ARM)
 
-JS_STATIC_ASSERT(sizeof(VMFrame) == 80);
-JS_STATIC_ASSERT(offsetof(VMFrame, savedLR) ==          (4*19));
+JS_STATIC_ASSERT(sizeof(VMFrame) == 88);
+JS_STATIC_ASSERT(offsetof(VMFrame, savedLR) ==          (4*21));
 JS_STATIC_ASSERT(offsetof(VMFrame, entryfp) ==          (4*10));
 JS_STATIC_ASSERT(offsetof(VMFrame, stackLimit) ==       (4*9));
 JS_STATIC_ASSERT(offsetof(VMFrame, cx) ==               (4*8));
 JS_STATIC_ASSERT(VMFrame::offsetOfFp ==                 (4*7));
-JS_STATIC_ASSERT(offsetof(VMFrame, scratch) ==          (4*4));
-JS_STATIC_ASSERT(offsetof(VMFrame, previous) ==         (4*3));
+JS_STATIC_ASSERT(offsetof(VMFrame, scratch) ==          (4*3));
+JS_STATIC_ASSERT(offsetof(VMFrame, previous) ==         (4*2));
 
 JS_STATIC_ASSERT(JSFrameReg == JSC::ARMRegisters::r11);
-JS_STATIC_ASSERT(JSReturnReg_Data == JSC::ARMRegisters::r1);
-JS_STATIC_ASSERT(JSReturnReg_Type == JSC::ARMRegisters::r2);
+JS_STATIC_ASSERT(JSReturnReg_Type == JSC::ARMRegisters::r5);
+JS_STATIC_ASSERT(JSReturnReg_Data == JSC::ARMRegisters::r4);
 
 #ifdef MOZ_THUMB2
 #define FUNCTION_HEADER_EXTRA \
   ".align 2\n" \
   ".thumb\n" \
   ".thumb_func\n"
 #else
 #define FUNCTION_HEADER_EXTRA
@@ -501,41 +501,46 @@ SYMBOL_STRING(JaegerTrampoline) ":"     
     /*
      * On entry to JaegerTrampoline:
      *         r0 = cx
      *         r1 = fp
      *         r2 = code
      *         r3 = stackLimit
      *
      * The VMFrame for ARM looks like this:
-     *  [ lr        ]   \
-     *  [ r11       ]   |
-     *  [ r10       ]   |
-     *  [ r9        ]   | Callee-saved registers.                             
-     *  [ r8        ]   | VFP registers d8-d15 may be required here too, but  
-     *  [ r7        ]   | unconditionally preserving them might be expensive
-     *  [ r6        ]   | considering that we might not use them anyway.
-     *  [ r5        ]   |
-     *  [ r4        ]   /
-     *  [ entryfp   ]
-     *  [ stkLimit  ]
-     *  [ cx        ]
-     *  [ regs.fp   ]
-     *  [ regs.pc   ]
-     *  [ regs.sp   ]
-     *  [ scratch   ]
-     *  [ previous  ]
-     *  [ inlined   ]
-     *  [ args.ptr2 ]
-     *  [ args.ptr  ]
+     *  [ lr           ]   \
+     *  [ r11          ]   |
+     *  [ r10          ]   |
+     *  [ r9           ]   | Callee-saved registers.
+     *  [ r8           ]   | VFP registers d8-d15 may be required here too, but
+     *  [ r7           ]   | unconditionally preserving them might be expensive
+     *  [ r6           ]   | considering that we might not use them anyway.
+     *  [ r5           ]   |
+     *  [ r4           ]   /
+     *  [ stubRejoin   ]
+     *  [ entryncode   ]
+     *  [ entryfp      ]
+     *  [ stkLimit     ]
+     *  [ cx           ]
+     *  [ regs.fp      ]
+     *  [ regs.inlined ]
+     *  [ regs.pc      ]
+     *  [ regs.sp      ]
+     *  [ scratch      ]
+     *  [ previous     ]
+     *  [ args.ptr2    ]  [ dynamicArgc ]  (union)
+     *  [ args.ptr     ]  [ lazyArgsObj ]  (union)
      */
     
     /* Push callee-saved registers. */
 "   push    {r4-r11,lr}"                        "\n"
     /* Push interesting VMFrame content. */
+"   mov     ip, #0"                             "\n"    
+"   push    {ip}"                               "\n"    /* stubRejoin */
+"   push    {r1}"                               "\n"    /* entryncode */
 "   push    {r1}"                               "\n"    /* entryfp */
 "   push    {r3}"                               "\n"    /* stackLimit */
 "   push    {r0}"                               "\n"    /* cx */
 "   push    {r1}"                               "\n"    /* regs.fp */
     /* Remaining fields are set elsewhere, but we need to leave space for them. */
 "   sub     sp, sp, #(4*7)"                     "\n"
 
     /* Preserve 'code' (r2) in an arbitrary callee-saved register. */
@@ -552,25 +557,24 @@ SYMBOL_STRING(JaegerTrampoline) ":"     
 "   bx     r4"                                  "\n"
 );
 
 asm (
 ".text\n"
 FUNCTION_HEADER_EXTRA
 ".globl " SYMBOL_STRING(JaegerTrampolineReturn)   "\n"
 SYMBOL_STRING(JaegerTrampolineReturn) ":"         "\n"
-"   str r5, [r11, #24]"                    "\n" /* fp->rval data */
-"   str r4, [r11, #28]"                    "\n" /* fp->rval type */
+"   strd    r4, r5, [r11, #24]"             "\n" /* fp->rval type,data */
 
     /* Tidy up. */
-"   mov     r0, sp"                             "\n"
+"   mov     r0, sp"                         "\n"
 "   blx  " SYMBOL_STRING_VMFRAME(PopActiveVMFrame) "\n"
 
     /* Skip past the parameters we pushed (such as cx and the like). */
-"   add     sp, sp, #(4*7 + 4*4)"               "\n"
+"   add     sp, sp, #(4*7 + 4*6)"           "\n"
 
     /* Set a 'true' return value to indicate successful completion. */
 "   mov     r0, #1"                         "\n"
 "   pop     {r4-r11,pc}"                    "\n"
 );
 
 asm (
 ".text\n"
@@ -585,19 +589,19 @@ SYMBOL_STRING(JaegerThrowpoline) ":"    
     
     /* If js_InternalThrow found a scripted handler, jump to it. Otherwise, tidy
      * up and return. */
 "   cmp     r0, #0"                         "\n"
 "   it      ne"                             "\n"
 "   bxne    r0"                             "\n"
 
     /* Tidy up, then return '0' to represent an unhandled exception. */
-"   mov     r0, sp"                             "\n"
+"   mov     r0, sp"                         "\n"
 "   blx  " SYMBOL_STRING_VMFRAME(PopActiveVMFrame) "\n"
-"   add     sp, sp, #(4*7 + 4*4)"               "\n"
+"   add     sp, sp, #(4*7 + 4*6)"           "\n"
 "   mov     r0, #0"                         "\n"
 "   pop     {r4-r11,pc}"                    "\n"
 );
 
 asm (
 ".text\n"
 FUNCTION_HEADER_EXTRA
 ".globl " SYMBOL_STRING(JaegerStubVeneer)   "\n"
--- a/js/src/methodjit/MethodJIT.h
+++ b/js/src/methodjit/MethodJIT.h
@@ -110,17 +110,17 @@ struct VMFrame
     void         *scratch;
     FrameRegs    regs;
     JSContext    *cx;
     Value        *stackLimit;
     StackFrame   *entryfp;
     void         *entryncode;
     JSRejoinState stubRejoin;  /* How to rejoin if inside a call from an IC stub. */
 
-#if JS_BITS_PER_WORD == 32
+#if defined(JS_CPU_X86)
     void         *unused0, *unused1;  /* For 16 byte alignment */
 #endif
 
 #if defined(JS_CPU_X86)
     void *savedEBX;
     void *savedEDI;
     void *savedESI;
     void *savedEBP;