--- a/js/src/jit/MacroAssembler.h
+++ b/js/src/jit/MacroAssembler.h
@@ -741,22 +741,23 @@ class MacroAssembler : public MacroAssem
     inline void addPtr(Imm32 imm, Register dest) PER_ARCH;
     inline void addPtr(Imm32 imm, Register src, Register dest) DEFINED_ON(arm64);
     inline void addPtr(ImmWord imm, Register dest) PER_ARCH;
     inline void addPtr(ImmPtr imm, Register dest);
     inline void addPtr(Imm32 imm, const Address& dest) DEFINED_ON(mips_shared, arm, arm64, x86, x64);
     inline void addPtr(Imm32 imm, const AbsoluteAddress& dest) DEFINED_ON(x86, x64);
     inline void addPtr(const Address& src, Register dest) DEFINED_ON(mips_shared, arm, arm64, x86, x64);
 
+    inline void add64(Register64 src, Register64 dest) PER_ARCH;
+    inline void add64(Imm32 imm, Register64 dest) PER_ARCH;
+
     inline void sub32(const Address& src, Register dest) PER_SHARED_ARCH;
     inline void sub32(Register src, Register dest) PER_SHARED_ARCH;
     inline void sub32(Imm32 imm, Register dest) PER_SHARED_ARCH;
 
-    inline void add64(Register64 src, Register64 dest) PER_ARCH;
-
     // ===============================================================
     // Shift functions
 
     inline void lshiftPtr(Imm32 imm, Register dest) PER_ARCH;
 
     inline void lshift64(Imm32 imm, Register64 dest) PER_ARCH;
 
     inline void rshiftPtr(Imm32 imm, Register dest) PER_ARCH;

--- a/js/src/jit/arm/MacroAssembler-arm-inl.h
+++ b/js/src/jit/arm/MacroAssembler-arm-inl.h
@@ -197,16 +197,23 @@ MacroAssembler::addPtr(const Address& sr
 void
 MacroAssembler::add64(Register64 src, Register64 dest)
 {
     ma_add(src.low, dest.low, SetCC);
     ma_adc(src.high, dest.high);
 }
 
 void
+MacroAssembler::add64(Imm32 imm, Register64 dest)
+{
+    ma_add(imm, dest.low, SetCC);
+    ma_adc(Imm32(0), dest.high, LeaveCC);
+}
+
+void
 MacroAssembler::sub32(Register src, Register dest)
 {
     ma_sub(src, dest, SetCC);
 }
 
 void
 MacroAssembler::sub32(Imm32 imm, Register dest)
 {

--- a/js/src/jit/arm/MacroAssembler-arm.h
+++ b/js/src/jit/arm/MacroAssembler-arm.h
@@ -1187,20 +1187,16 @@ class MacroAssemblerARMCompat : public M
   public:
     template <typename T> inline void branchAdd32(Condition cond, T src, Register dest, Label* label);
     template <typename T>
     void branchSub32(Condition cond, T src, Register dest, Label* label) {
         ma_sub(src, dest, SetCC);
         j(cond, label);
     }
 
-    void add64(Imm32 imm, Register64 dest) {
-        ma_add(imm, dest.low, SetCC);
-        ma_adc(Imm32(0), dest.high, LeaveCC);
-    }
     void not32(Register reg);
 
     void move32(Imm32 imm, Register dest);
     void move32(Register src, Register dest);
 
     void movePtr(Register src, Register dest);
     void movePtr(ImmWord imm, Register dest);
     void movePtr(ImmPtr imm, Register dest);

--- a/js/src/jit/arm64/MacroAssembler-arm64-inl.h
+++ b/js/src/jit/arm64/MacroAssembler-arm64-inl.h
@@ -229,16 +229,22 @@ MacroAssembler::addPtr(const Address& sr
 
 void
 MacroAssembler::add64(Register64 src, Register64 dest)
 {
     addPtr(src.reg, dest.reg);
 }
 
 void
+MacroAssembler::add64(Imm32 imm, Register64 dest)
+{
+    Add(ARMRegister(dest.reg, 64), ARMRegister(dest.reg, 64), Operand(imm.value));
+}
+
+void
 MacroAssembler::sub32(Imm32 imm, Register dest)
 {
     Sub(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(imm.value));
 }
 
 void
 MacroAssembler::sub32(Register src, Register dest)
 {

--- a/js/src/jit/arm64/MacroAssembler-arm64.h
+++ b/js/src/jit/arm64/MacroAssembler-arm64.h
@@ -1336,19 +1336,16 @@ class MacroAssemblerCompat : public vixl
         vixl::UseScratchRegisterScope temps(this);
         const ARMRegister scratch32 = temps.AcquireW();
         MOZ_ASSERT(scratch32.asUnsized() != dest.base);
 
         Ldr(scratch32, MemOperand(ARMRegister(dest.base, 64), dest.offset));
         Adds(scratch32, scratch32, Operand(imm.value));
         Str(scratch32, MemOperand(ARMRegister(dest.base, 64), dest.offset));
     }
-    void add64(Imm32 imm, Register64 dest) {
-        Add(ARMRegister(dest.reg, 64), ARMRegister(dest.reg, 64), Operand(imm.value));
-    }
 
     void subs32(Imm32 imm, Register dest) {
         Subs(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(imm.value));
     }
     void subs32(Register src, Register dest) {
         Subs(ARMRegister(dest, 32), ARMRegister(dest, 32), Operand(ARMRegister(src, 32)));
     }
 

--- a/js/src/jit/mips32/MacroAssembler-mips32-inl.h
+++ b/js/src/jit/mips32/MacroAssembler-mips32-inl.h
@@ -100,16 +100,24 @@ void
 MacroAssembler::add64(Register64 src, Register64 dest)
 {
     as_addu(dest.low, dest.low, src.low);
     as_sltu(ScratchRegister, dest.low, src.low);
     as_addu(dest.high, dest.high, src.high);
     as_addu(dest.high, dest.high, ScratchRegister);
 }
 
+void
+MacroAssembler::add64(Imm32 imm, Register64 dest)
+{
+    as_addiu(dest.low, dest.low, imm.value);
+    as_sltiu(ScratchRegister, dest.low, imm.value);
+    as_addu(dest.high, dest.high, ScratchRegister);
+}
+
 // ===============================================================
 // Shift functions
 
 void
 MacroAssembler::lshiftPtr(Imm32 imm, Register dest)
 {
     ma_sll(dest, dest, imm);
 }

--- a/js/src/jit/mips32/MacroAssembler-mips32.h
+++ b/js/src/jit/mips32/MacroAssembler-mips32.h
@@ -1056,22 +1056,16 @@ class MacroAssemblerMIPSCompat : public 
                                         Register temp, Register valueTemp, Register offsetTemp, Register maskTemp,
                                         AnyRegister output);
 
     template<typename T>
     void atomicExchangeToTypedIntArray(Scalar::Type arrayType, const T& mem, Register value,
                                        Register temp, Register valueTemp, Register offsetTemp, Register maskTemp,
                                        AnyRegister output);
 
-    void add64(Imm32 imm, Register64 dest) {
-        as_addiu(dest.low, dest.low, imm.value);
-        as_sltiu(ScratchRegister, dest.low, imm.value);
-        as_addu(dest.high, dest.high, ScratchRegister);
-    }
-
     inline void incrementInt32Value(const Address& addr);
 
     template <typename T>
     void branchAdd32(Condition cond, T src, Register dest, Label* overflow) {
         switch (cond) {
           case Overflow:
             ma_addTestOverflow(dest, dest, src, overflow);
             break;

--- a/js/src/jit/mips64/MacroAssembler-mips64-inl.h
+++ b/js/src/jit/mips64/MacroAssembler-mips64-inl.h
@@ -96,16 +96,22 @@ MacroAssembler::addPtr(ImmWord imm, Regi
 }
 
 void
 MacroAssembler::add64(Register64 src, Register64 dest)
 {
     addPtr(src.reg, dest.reg);
 }
 
+void
+MacroAssembler::add64(Imm32 imm, Register64 dest)
+{
+    ma_daddu(dest.reg, imm);
+}
+
 // ===============================================================
 // Shift functions
 
 void
 MacroAssembler::lshiftPtr(Imm32 imm, Register dest)
 {
     ma_dsll(dest, dest, imm);
 }

--- a/js/src/jit/mips64/MacroAssembler-mips64.h
+++ b/js/src/jit/mips64/MacroAssembler-mips64.h
@@ -1073,20 +1073,16 @@ class MacroAssemblerMIPS64Compat : publi
                                         Register temp, Register valueTemp, Register offsetTemp, Register maskTemp,
                                         AnyRegister output);
 
     template<typename T>
     void atomicExchangeToTypedIntArray(Scalar::Type arrayType, const T& mem, Register value,
                                        Register temp, Register valueTemp, Register offsetTemp, Register maskTemp,
                                        AnyRegister output);
 
-    void add64(Imm32 imm, Register64 dest) {
-        ma_daddu(dest.reg, imm);
-    }
-
     inline void incrementInt32Value(const Address& addr);
 
     template <typename T>
     void branchAdd32(Condition cond, T src, Register dest, Label* overflow) {
         switch (cond) {
           case Overflow:
             ma_addTestOverflow(dest, dest, src, overflow);
             break;

--- a/js/src/jit/none/MacroAssembler-none.h
+++ b/js/src/jit/none/MacroAssembler-none.h
@@ -229,17 +229,16 @@ class MacroAssemblerNone : public Assemb
     template <typename T, typename S> void branchTestValue(Condition, T, S, Label*) { MOZ_CRASH(); }
     void testNullSet(Condition, ValueOperand, Register) { MOZ_CRASH(); }
     void testObjectSet(Condition, ValueOperand, Register) { MOZ_CRASH(); }
     void testUndefinedSet(Condition, ValueOperand, Register) { MOZ_CRASH(); }
 
     template <typename T, typename S> void cmpPtrSet(Condition, T, S, Register) { MOZ_CRASH(); }
     template <typename T, typename S> void cmp32Set(Condition, T, S, Register) { MOZ_CRASH(); }
 
-    template <typename T, typename S> void add64(T, S) { MOZ_CRASH(); }
     template <typename T, typename S> void subPtr(T, S) { MOZ_CRASH(); }
     void neg32(Register) { MOZ_CRASH(); }
     void mulBy3(Register, Register) { MOZ_CRASH(); }
     void mul64(Imm64, const Register64&) { MOZ_CRASH(); }
 
     void negateDouble(FloatRegister) { MOZ_CRASH(); }
     void addDouble(FloatRegister, FloatRegister) { MOZ_CRASH(); }
     void subDouble(FloatRegister, FloatRegister) { MOZ_CRASH(); }

--- a/js/src/jit/x64/MacroAssembler-x64-inl.h
+++ b/js/src/jit/x64/MacroAssembler-x64-inl.h
@@ -119,16 +119,22 @@ MacroAssembler::addPtr(const Address& sr
 }
 
 void
 MacroAssembler::add64(Register64 src, Register64 dest)
 {
     addq(src.reg, dest.reg);
 }
 
+void
+MacroAssembler::add64(Imm32 imm, Register64 dest)
+{
+    addq(imm, dest.reg);
+}
+
 // ===============================================================
 // Shift functions
 
 void
 MacroAssembler::lshiftPtr(Imm32 imm, Register dest)
 {
     shlq(imm, dest);
 }

--- a/js/src/jit/x64/MacroAssembler-x64.h
+++ b/js/src/jit/x64/MacroAssembler-x64.h
@@ -538,19 +538,16 @@ class MacroAssemblerX64 : public MacroAs
         cmpPtr(lhs, rhs);
         emitSet(cond, dest);
     }
 
     /////////////////////////////////////////////////////////////////
     // Common interface.
     /////////////////////////////////////////////////////////////////
 
-    void add64(Imm32 imm, Register64 dest) {
-        addq(imm, dest.reg);
-    }
     void subPtr(Imm32 imm, Register dest) {
         subq(imm, dest);
     }
     void subPtr(Register src, Register dest) {
         subq(src, dest);
     }
     void subPtr(const Address& addr, Register dest) {
         subq(Operand(addr), dest);

--- a/js/src/jit/x86/MacroAssembler-x86-inl.h
+++ b/js/src/jit/x86/MacroAssembler-x86-inl.h
@@ -116,16 +116,23 @@ MacroAssembler::addPtr(const Address& sr
 
 void
 MacroAssembler::add64(Register64 src, Register64 dest)
 {
     addl(src.low, dest.low);
     adcl(src.high, dest.high);
 }
 
+void
+MacroAssembler::add64(Imm32 imm, Register64 dest)
+{
+    addl(imm, dest.low);
+    adcl(Imm32(0), dest.high);
+}
+
 // ===============================================================
 // Shift functions
 
 void
 MacroAssembler::lshiftPtr(Imm32 imm, Register dest)
 {
     shll(imm, dest);
 }

--- a/js/src/jit/x86/MacroAssembler-x86.h
+++ b/js/src/jit/x86/MacroAssembler-x86.h
@@ -561,20 +561,16 @@ class MacroAssemblerX86 : public MacroAs
         cmpPtr(lhs, rhs);
         emitSet(cond, dest);
     }
 
     /////////////////////////////////////////////////////////////////
     // Common interface.
     /////////////////////////////////////////////////////////////////
 
-    void add64(Imm32 imm, Register64 dest) {
-        addl(imm, dest.low);
-        adcl(Imm32(0), dest.high);
-    }
     void subPtr(Imm32 imm, Register dest) {
         subl(imm, dest);
     }
     void subPtr(Register src, Register dest) {
         subl(src, dest);
     }
     void subPtr(const Address& addr, Register dest) {
         subl(Operand(addr), dest);