--- a/js/src/jit/arm/MacroAssembler-arm.cpp
+++ b/js/src/jit/arm/MacroAssembler-arm.cpp
@@ -1,28 +1,30 @@
 /* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
  * vim: set ts=8 sts=4 et sw=4 tw=99:
  * This Source Code Form is subject to the terms of the Mozilla Public
  * License, v. 2.0. If a copy of the MPL was not distributed with this
  * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
 
 #include "jit/arm/MacroAssembler-arm.h"
 
+#include "mozilla/Casting.h"
 #include "mozilla/DebugOnly.h"
 #include "mozilla/MathAlgorithms.h"
 
 #include "jit/arm/Simulator-arm.h"
 #include "jit/Bailouts.h"
 #include "jit/BaselineFrame.h"
 #include "jit/MoveEmitter.h"
 
 using namespace js;
 using namespace jit;
 
 using mozilla::Abs;
+using mozilla::BitwiseCast;
 
 bool
 isValueDTRDCandidate(ValueOperand &val)
 {
     // In order to be used for a DTRD memory function, the two target registers
     // need to be a) Adjacent, with the tag larger than the payload, and
     // b) Aligned to a multiple of two.
     if ((val.typeReg().code() != (val.payloadReg().code() + 1)))
@@ -1454,41 +1456,26 @@ MacroAssemblerARM::ma_vsqrt(FloatRegiste
 }
 
 void
 MacroAssemblerARM::ma_vsqrt_f32(FloatRegister src, FloatRegister dest, Condition cc)
 {
     as_vsqrt(VFPRegister(dest).singleOverlay(), VFPRegister(src).singleOverlay(), cc);
 }
 
-union DoublePun
-{
-    struct
-    {
-#if defined(IS_LITTLE_ENDIAN)
-        uint32_t lo, hi;
-#else
-        uint32_t hi, lo;
-#endif
-    } s;
-    double d;
-};
-
 static inline uint32_t
-DoubleHighWord(const double& value)
-{
-    const DoublePun *dpun = reinterpret_cast<const DoublePun *>(&value);
-    return dpun->s.hi;
+DoubleHighWord(const double value)
+{
+    return static_cast<uint32_t>(BitwiseCast<uint64_t>(value) >> 32);
 }
 
 static inline uint32_t
-DoubleLowWord(const double& value)
-{
-    const DoublePun *dpun = reinterpret_cast<const DoublePun *>(&value);
-    return dpun->s.lo;
+DoubleLowWord(const double value)
+{
+    return BitwiseCast<uint64_t>(value) & uint32_t(0xffffffff);
 }
 
 void
 MacroAssemblerARM::ma_vimm(double value, FloatRegister dest, Condition cc)
 {
     if (hasVFPv3()) {
         if (DoubleLowWord(value) == 0) {
             if (DoubleHighWord(value) == 0) {
@@ -1506,19 +1493,19 @@ MacroAssemblerARM::ma_vimm(double value,
 
         }
     }
     // Fall back to putting the value in a pool.
     as_FImm64Pool(dest, value, nullptr, cc);
 }
 
 static inline uint32_t
-Float32Word(const float& value)
-{
-    return *reinterpret_cast<const uint32_t*>(&value);
+Float32Word(const float value)
+{
+    return BitwiseCast<uint32_t>(value);
 }
 
 void
 MacroAssemblerARM::ma_vimm_f32(float value, FloatRegister dest, Condition cc)
 {
     VFPRegister vd = VFPRegister(dest).singleOverlay();
     if (hasVFPv3()) {
         if (Float32Word(value) == 0) {