Bug 1290812 - Part 17: Implement the 64bit variant of ToFloatingPoint on mips64. r=sunfish
authorHeiher <r@hev.cc>
Mon, 10 Oct 2016 17:08:10 +0800
changeset 317291 df97fdf6e985ef2d54c5607d9498be33d5930d48
parent 317290 f9c6f59159cb6078eed717084ec1db755cb706a5
child 317292 33b8c6dde0b05bb220d4a7205f0ac3b09b6c568a
push id30800
push userphilringnalda@gmail.com
push dateTue, 11 Oct 2016 02:08:53 +0000
treeherdermozilla-central@ece56e142a1e [default view] [failures only]
perfherder[talos] [build metrics] [platform microbench] (compared to previous push)
reviewerssunfish
bugs1290812
milestone52.0a1
first release with
nightly linux32
nightly linux64
nightly mac
nightly win32
nightly win64
last release without
nightly linux32
nightly linux64
nightly mac
nightly win32
nightly win64
Bug 1290812 - Part 17: Implement the 64bit variant of ToFloatingPoint on mips64. r=sunfish --- js/src/jit/mips-shared/Assembler-mips-shared.cpp | 6 +++ js/src/jit/mips-shared/LIR-mips-shared.h | 14 ++++++ js/src/jit/mips-shared/Lowering-mips-shared.cpp | 6 ++- js/src/jit/mips64/CodeGenerator-mips64.cpp | 22 ++++++++ js/src/jit/mips64/CodeGenerator-mips64.h | 1 + js/src/jit/mips64/LOpcodes-mips64.h | 3 +- js/src/jit/mips64/MacroAssembler-mips64.cpp | 64 ++++++++++++++++++++---- js/src/jit/mips64/MacroAssembler-mips64.h | 6 +++ 8 files changed, 110 insertions(+), 12 deletions(-)
js/src/jit/mips-shared/Assembler-mips-shared.cpp
js/src/jit/mips-shared/LIR-mips-shared.h
js/src/jit/mips-shared/Lowering-mips-shared.cpp
js/src/jit/mips64/CodeGenerator-mips64.cpp
js/src/jit/mips64/CodeGenerator-mips64.h
js/src/jit/mips64/LOpcodes-mips64.h
js/src/jit/mips64/MacroAssembler-mips64.cpp
js/src/jit/mips64/MacroAssembler-mips64.h
--- a/js/src/jit/mips-shared/Assembler-mips-shared.cpp
+++ b/js/src/jit/mips-shared/Assembler-mips-shared.cpp
@@ -1338,16 +1338,22 @@ AssemblerMIPSShared::as_cvtdw(FloatRegis
 
 BufferOffset
 AssemblerMIPSShared::as_cvtsd(FloatRegister fd, FloatRegister fs)
 {
     return writeInst(InstReg(op_cop1, rs_d, zero, fs, fd, ff_cvt_s_fmt).encode());
 }
 
 BufferOffset
+AssemblerMIPSShared::as_cvtsl(FloatRegister fd, FloatRegister fs)
+{
+    return writeInst(InstReg(op_cop1, rs_l, zero, fs, fd, ff_cvt_s_fmt).encode());
+}
+
+BufferOffset
 AssemblerMIPSShared::as_cvtsw(FloatRegister fd, FloatRegister fs)
 {
     return writeInst(InstReg(op_cop1, rs_w, zero, fs, fd, ff_cvt_s_fmt).encode());
 }
 
 BufferOffset
 AssemblerMIPSShared::as_cvtwd(FloatRegister fd, FloatRegister fs)
 {
--- a/js/src/jit/mips-shared/LIR-mips-shared.h
+++ b/js/src/jit/mips-shared/LIR-mips-shared.h
@@ -272,12 +272,26 @@ class LUDivOrMod : public LBinaryMath<0>
 
     bool trapOnError() const {
         if (mir_->isMod())
             return mir_->toMod()->trapOnError();
         return mir_->toDiv()->trapOnError();
     }
 };
 
+class LInt64ToFloatingPoint : public LInstructionHelper<1, INT64_PIECES, 0>
+{
+  public:
+    LIR_HEADER(Int64ToFloatingPoint);
+
+    explicit LInt64ToFloatingPoint(const LInt64Allocation& in) {
+        setInt64Operand(0, in);
+    }
+
+    MInt64ToFloatingPoint* mir() const {
+        return mir_->toInt64ToFloatingPoint();
+    }
+};
+
 } // namespace jit
 } // namespace js
 
 #endif /* jit_mips_shared_LIR_mips_shared_h */
--- a/js/src/jit/mips-shared/Lowering-mips-shared.cpp
+++ b/js/src/jit/mips-shared/Lowering-mips-shared.cpp
@@ -646,17 +646,21 @@ LIRGeneratorMIPSShared::visitWasmTruncat
     MOZ_ASSERT(opd->type() == MIRType::Double || opd->type() == MIRType::Float32);
 
     defineInt64(new(alloc()) LWasmTruncateToInt64(useRegister(opd)), ins);
 }
 
 void
 LIRGeneratorMIPSShared::visitInt64ToFloatingPoint(MInt64ToFloatingPoint* ins)
 {
-    MOZ_CRASH("NYI");
+    MDefinition* opd = ins->input();
+    MOZ_ASSERT(opd->type() == MIRType::Int64);
+    MOZ_ASSERT(IsFloatingPointType(ins->type()));
+
+    define(new(alloc()) LInt64ToFloatingPoint(useInt64Register(opd)), ins);
 }
 
 void
 LIRGeneratorMIPSShared::visitCopySign(MCopySign* ins)
 {
     MDefinition* lhs = ins->lhs();
     MDefinition* rhs = ins->rhs();
 
--- a/js/src/jit/mips64/CodeGenerator-mips64.cpp
+++ b/js/src/jit/mips64/CodeGenerator-mips64.cpp
@@ -607,16 +607,38 @@ CodeGeneratorMIPS64::visitWasmTruncateTo
     masm.as_ext(output, output, 16, 1);
     masm.ma_b(output, Imm32(0), ool->entry(), Assembler::NotEqual);
 
     masm.bind(ool->rejoin());
     masm.moveFromDouble(ScratchDoubleReg, output);
 }
 
 void
+CodeGeneratorMIPS64::visitInt64ToFloatingPoint(LInt64ToFloatingPoint* lir)
+{
+    Register input = ToRegister(lir->input());
+    FloatRegister output = ToFloatRegister(lir->output());
+
+    MIRType outputType = lir->mir()->type();
+    MOZ_ASSERT(outputType == MIRType::Double || outputType == MIRType::Float32);
+
+    if (outputType == MIRType::Double) {
+        if (lir->mir()->isUnsigned())
+            masm.convertUInt64ToDouble(input, output);
+        else
+            masm.convertInt64ToDouble(input, output);
+    } else {
+        if (lir->mir()->isUnsigned())
+            masm.convertUInt64ToFloat32(input, output);
+        else
+            masm.convertInt64ToFloat32(input, output);
+    }
+}
+
+void
 CodeGeneratorMIPS64::setReturnDoubleRegs(LiveRegisterSet* regs)
 {
     MOZ_ASSERT(ReturnFloat32Reg.reg_ == FloatRegisters::f0);
     MOZ_ASSERT(ReturnDoubleReg.reg_ == FloatRegisters::f0);
     FloatRegister f1 = { FloatRegisters::f1, FloatRegisters::Single };
     regs->add(ReturnFloat32Reg);
     regs->add(f1);
     regs->add(ReturnDoubleReg);
--- a/js/src/jit/mips64/CodeGenerator-mips64.h
+++ b/js/src/jit/mips64/CodeGenerator-mips64.h
@@ -53,16 +53,17 @@ class CodeGeneratorMIPS64 : public CodeG
     void visitAsmReinterpretFromI64(LAsmReinterpretFromI64* lir);
     void visitAsmReinterpretToI64(LAsmReinterpretToI64* lir);
     void visitExtendInt32ToInt64(LExtendInt32ToInt64* lir);
     void visitWrapInt64ToInt32(LWrapInt64ToInt32* lir);
     void visitClzI64(LClzI64* lir);
     void visitCtzI64(LCtzI64* lir);
     void visitNotI64(LNotI64* lir);
     void visitWasmTruncateToInt64(LWasmTruncateToInt64* lir);
+    void visitInt64ToFloatingPoint(LInt64ToFloatingPoint* lir);
 
     // Out of line visitors.
     void visitOutOfLineBailout(OutOfLineBailout* ool);
     void visitOutOfLineTableSwitch(OutOfLineTableSwitch* ool);
   protected:
     ValueOperand ToValue(LInstruction* ins, size_t pos);
     ValueOperand ToOutValue(LInstruction* ins);
     ValueOperand ToTempValue(LInstruction* ins, size_t pos);
--- a/js/src/jit/mips64/LOpcodes-mips64.h
+++ b/js/src/jit/mips64/LOpcodes-mips64.h
@@ -9,11 +9,12 @@
 
 #include "jit/shared/LOpcodes-shared.h"
 
 #define LIR_CPU_OPCODE_LIST(_)  \
     _(ModMaskI)                 \
     _(DivOrModI64)              \
     _(UDivOrMod)                \
     _(UDivOrModI64)             \
-    _(WasmTruncateToInt64)
+    _(WasmTruncateToInt64)      \
+    _(Int64ToFloatingPoint)
 
 #endif // jit_mips64_LOpcodes_mips64_h__
--- a/js/src/jit/mips64/MacroAssembler-mips64.cpp
+++ b/js/src/jit/mips64/MacroAssembler-mips64.cpp
@@ -69,46 +69,90 @@ MacroAssemblerMIPS64Compat::convertUInt3
     as_mtc1(ScratchRegister, dest);
     as_cvtdw(dest, dest);
 
     // Add unsigned value of INT32_MIN
     ma_lid(SecondScratchDoubleReg, 2147483648.0);
     as_addd(dest, dest, SecondScratchDoubleReg);
 }
 
+void
+MacroAssemblerMIPS64Compat::convertInt64ToDouble(Register src, FloatRegister dest)
+{
+    as_dmtc1(src, dest);
+    as_cvtdl(dest, dest);
+}
+
+void
+MacroAssemblerMIPS64Compat::convertInt64ToFloat32(Register src, FloatRegister dest)
+{
+    as_dmtc1(src, dest);
+    as_cvtsl(dest, dest);
+}
+
+void
+MacroAssemblerMIPS64Compat::convertUInt64ToDouble(Register src, FloatRegister dest)
+{
+    MOZ_ASSERT(temp == Register::Invalid());
+
+    Label positive, done;
+    ma_b(src, src, &positive, NotSigned, ShortJump);
+
+    MOZ_ASSERT(src!= ScratchRegister);
+    MOZ_ASSERT(src!= SecondScratchReg);
+
+    ma_and(ScratchRegister, src, Imm32(1));
+    ma_dsrl(SecondScratchReg, src, Imm32(1));
+    ma_or(ScratchRegister, SecondScratchReg);
+    as_dmtc1(ScratchRegister, dest);
+    as_cvtdl(dest, dest);
+    asMasm().addDouble(dest, dest);
+    ma_b(&done, ShortJump);
+
+    bind(&positive);
+    as_dmtc1(src, dest);
+    as_cvtdl(dest, dest);
+
+    bind(&done);
+}
+
+void
+MacroAssemblerMIPS64Compat::convertUInt64ToFloat32(Register src, FloatRegister dest)
+{
+    Label positive, done;
+    ma_b(src, src, &positive, NotSigned, ShortJump);
+
+    MOZ_ASSERT(src!= ScratchRegister);
+    MOZ_ASSERT(src!= SecondScratchReg);
+
+    ma_and(ScratchRegister, src, Imm32(1));
+    ma_dsrl(SecondScratchReg, src, Imm32(1));
+    ma_or(ScratchRegister, SecondScratchReg);
+    as_dmtc1(ScratchRegister, dest);
+    as_cvtsl(dest, dest);
+    asMasm().addFloat32(dest, dest);
+    ma_b(&done, ShortJump);
+
+    bind(&positive);
+    as_dmtc1(src, dest);
+    as_cvtsl(dest, dest);
+
+    bind(&done);
+}
+
 bool
 MacroAssemblerMIPS64Compat::convertUInt64ToDoubleNeedsTemp()
 {
     return false;
 }
 
 void
 MacroAssemblerMIPS64Compat::convertUInt64ToDouble(Register64 src, FloatRegister dest, Register temp)
 {
-    MOZ_ASSERT(temp == Register::Invalid());
-
-    Label positive, done;
-    ma_b(src.reg, src.reg, &positive, NotSigned, ShortJump);
-
-    MOZ_ASSERT(src.reg != ScratchRegister);
-    MOZ_ASSERT(src.reg != SecondScratchReg);
-
-    ma_and(ScratchRegister, src.reg, Imm32(1));
-    ma_dsrl(SecondScratchReg, src.reg, Imm32(1));
-    ma_or(ScratchRegister, SecondScratchReg);
-    as_dmtc1(ScratchRegister, dest);
-    as_cvtdl(dest, dest);
-    asMasm().addDouble(dest, dest);
-    ma_b(&done, ShortJump);
-
-    bind(&positive);
-    as_dmtc1(src.reg, dest);
-    as_cvtdl(dest, dest);
-
-    bind(&done);
+    convertUInt64ToDouble(src.reg, dest);
 }
 
 void
 MacroAssemblerMIPS64Compat::convertUInt32ToFloat32(Register src, FloatRegister dest)
 {
     Label positive, done;
     ma_b(src, src, &positive, NotSigned, ShortJump);
 
--- a/js/src/jit/mips64/MacroAssembler-mips64.h
+++ b/js/src/jit/mips64/MacroAssembler-mips64.h
@@ -951,16 +951,22 @@ class MacroAssemblerMIPS64Compat : publi
     void moveDouble(FloatRegister src, FloatRegister dest) {
         as_movd(dest, src);
     }
 
     void zeroDouble(FloatRegister reg) {
         moveToDouble(zero, reg);
     }
 
+    void convertInt64ToDouble(Register src, FloatRegister dest);
+    void convertInt64ToFloat32(Register src, FloatRegister dest);
+
+    void convertUInt64ToDouble(Register src, FloatRegister dest);
+    void convertUInt64ToFloat32(Register src, FloatRegister dest);
+
     static bool convertUInt64ToDoubleNeedsTemp();
     void convertUInt64ToDouble(Register64 src, FloatRegister dest, Register temp);
 
     void breakpoint();
 
     void checkStackAlignment();
 
     static void calculateAlignedStackPointer(void** stackPointer);