Bug 1152661 - Fix -Wuninitialized warnings about Operand member variables. r=jandem
authorChris Peterson <cpeterson@mozilla.com>
Sat, 11 Apr 2015 23:03:26 -0700
changeset 239960 b0ebb6ba864408957b4a1b9e1bfbd63ba59281da
parent 239959 93c2f686e30babb91c1b599432217676d9a72ce1
child 239961 bf79ec7accfe9accbeede3d1adc2e44524511dc0
push id28618
push userkwierso@gmail.com
push dateMon, 20 Apr 2015 23:44:35 +0000
treeherdermozilla-central@bfbb2f3babcb [default view] [failures only]
perfherder[talos] [build metrics] [platform microbench] (compared to previous push)
reviewersjandem
bugs1152661
milestone40.0a1
first release with
nightly linux32
nightly linux64
nightly mac
nightly win32
nightly win64
last release without
nightly linux32
nightly linux64
nightly mac
nightly win32
nightly win64
Bug 1152661 - Fix -Wuninitialized warnings about Operand member variables. r=jandem
js/src/jit/x86-shared/Assembler-x86-shared.h
--- a/js/src/jit/x86-shared/Assembler-x86-shared.h
+++ b/js/src/jit/x86-shared/Assembler-x86-shared.h
@@ -24,33 +24,41 @@ class Operand
         FPREG,
         MEM_SCALE,
         MEM_ADDRESS32
     };
 
   private:
     Kind kind_ : 4;
     // Used as a Register::Encoding and a FloatRegister::Encoding.
-    int32_t base_ : 5;
+    uint32_t base_ : 5;
     Scale scale_ : 3;
     Register::Encoding index_ : 5;
     int32_t disp_;
 
   public:
     explicit Operand(Register reg)
       : kind_(REG),
-        base_(reg.encoding())
+        base_(reg.encoding()),
+        scale_(TimesOne),
+        index_(Registers::Invalid),
+        disp_(0)
     { }
     explicit Operand(FloatRegister reg)
       : kind_(FPREG),
-        base_(reg.encoding())
+        base_(reg.encoding()),
+        scale_(TimesOne),
+        index_(Registers::Invalid),
+        disp_(0)
     { }
     explicit Operand(const Address& address)
       : kind_(MEM_REG_DISP),
         base_(address.base.encoding()),
+        scale_(TimesOne),
+        index_(Registers::Invalid),
         disp_(address.offset)
     { }
     explicit Operand(const BaseIndex& address)
       : kind_(MEM_SCALE),
         base_(address.base.encoding()),
         scale_(address.scale),
         index_(address.index.encoding()),
         disp_(address.offset)
@@ -60,24 +68,32 @@ class Operand
         base_(base.encoding()),
         scale_(scale),
         index_(index.encoding()),
         disp_(disp)
     { }
     Operand(Register reg, int32_t disp)
       : kind_(MEM_REG_DISP),
         base_(reg.encoding()),
+        scale_(TimesOne),
+        index_(Registers::Invalid),
         disp_(disp)
     { }
     explicit Operand(AbsoluteAddress address)
       : kind_(MEM_ADDRESS32),
+        base_(Registers::Invalid),
+        scale_(TimesOne),
+        index_(Registers::Invalid),
         disp_(X86Encoding::AddressImmediate(address.addr))
     { }
     explicit Operand(PatchedAbsoluteAddress address)
       : kind_(MEM_ADDRESS32),
+        base_(Registers::Invalid),
+        scale_(TimesOne),
+        index_(Registers::Invalid),
         disp_(X86Encoding::AddressImmediate(address.addr))
     { }
 
     Address toAddress() const {
         MOZ_ASSERT(kind() == MEM_REG_DISP);
         return Address(Register::FromCode(base()), disp());
     }