author | Benjamin Bouvier <benj@benj.me> |
Tue, 24 Apr 2018 15:35:57 +0200 | |
changeset 415620 | a1ea9ba622e615e1cb262894d1f8b9ee581ae43e |
parent 415619 | 84ac907189ef656dc996789e3319cb6acb05d518 |
child 415621 | 60cbb70f1912edd725181b8a66d601566c2af28f |
push id | 33901 |
push user | apavel@mozilla.com |
push date | Thu, 26 Apr 2018 06:05:37 +0000 |
treeherder | mozilla-central@b62ad926cf2a [default view] [failures only] |
perfherder | [talos] [build metrics] [platform microbench] (compared to previous push) |
reviewers | mgaudet |
bugs | 1456470 |
milestone | 61.0a1 |
first release with | nightly linux32
nightly linux64
nightly mac
nightly win32
nightly win64
|
last release without | nightly linux32
nightly linux64
nightly mac
nightly win32
nightly win64
|
--- a/js/src/jit/arm/Assembler-arm.h +++ b/js/src/jit/arm/Assembler-arm.h @@ -448,16 +448,19 @@ class Reg // The "second register". uint32_t rm_ : 4; // Do we get another register for shifting. uint32_t rrs_ : 1; uint32_t type_ : 2; // We'd like this to be a more sensible encoding, but that would need to be // a struct and that would not pack :( uint32_t shiftAmount_ : 5; + + protected: + // Mark as a protected field to avoid unused private field warnings. uint32_t pad_ : 20; public: Reg(uint32_t rm, ShiftType type, uint32_t rsr, uint32_t shiftAmount) : rm_(rm), rrs_(rsr), type_(type), shiftAmount_(shiftAmount), pad_(0) { } explicit Reg(const Op2Reg& op) { memcpy(this, &op, sizeof(*this)); @@ -474,18 +477,22 @@ class Reg // Op2 has a mode labelled "<imm8m>", which is arm's magical immediate encoding. // Some instructions actually get 8 bits of data, which is called Imm8Data // below. These should have edit distance > 1, but this is how it is for now. class Imm8mData { uint32_t data_ : 8; uint32_t rot_ : 4; + + protected: + // Mark as a protected field to avoid unused private field warnings. uint32_t buff_ : 19; + private: // Throw in an extra bit that will be 1 if we can't encode this properly. // if we can encode it properly, a simple "|" will still suffice to meld it // into the instruction. uint32_t invalid_ : 1; public: // Default constructor makes an invalid immediate. Imm8mData() @@ -505,17 +512,22 @@ class Imm8mData MOZ_ASSERT(!invalid_); return data_ | (rot_ << 8); }; }; class Imm8Data { uint32_t imm4L_ : 4; + + protected: + // Mark as a protected field to avoid unused private field warnings. uint32_t pad_ : 4; + + private: uint32_t imm4H_ : 4; public: explicit Imm8Data(uint32_t imm) : imm4L_(imm & 0xf), imm4H_(imm >> 4) { MOZ_ASSERT(imm <= 0xff); } @@ -599,17 +611,21 @@ class RIS uint32_t encode() const { return shiftAmount_; } }; class RRS { + protected: + // Mark as a protected field to avoid unused private field warnings. uint32_t mustZero_ : 1; + + private: // The register that holds the shift amount. uint32_t rs_ : 4; public: explicit RRS(uint32_t rs) : rs_(rs) { MOZ_ASSERT(rs_ == rs); @@ -1006,17 +1022,22 @@ class BOffImm return data_ == INVALID; } Instruction* getDest(Instruction* src) const; }; class Imm16 { uint32_t lower_ : 12; + + protected: + // Mark as a protected field to avoid unused private field warnings. uint32_t pad_ : 4; + + private: uint32_t upper_ : 4; uint32_t invalid_ : 12; public: explicit Imm16(); explicit Imm16(uint32_t imm); explicit Imm16(Instruction& inst);