Bug 1339695 (part 1) - Remove LUL_{ARCH,OS,PLAT}_* macros. r=jseward.
authorNicholas Nethercote <nnethercote@mozilla.com>
Wed, 15 Feb 2017 16:13:01 +1100
changeset 343213 9d9a3692b012221e74ee6fbc70af95dff83e1a7d
parent 343212 c0e8497f31c90ee402404315e08db52242fb8b0b
child 343214 f6869c7b0707091d551285243c43993d7b235265
push id31372
push usercbook@mozilla.com
push dateThu, 16 Feb 2017 12:16:10 +0000
treeherdermozilla-central@2737f66ad6ac [default view] [failures only]
perfherder[talos] [build metrics] [platform microbench] (compared to previous push)
reviewersjseward
bugs1339695
milestone54.0a1
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nightly linux64
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nightly win32
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nightly win64
Bug 1339695 (part 1) - Remove LUL_{ARCH,OS,PLAT}_* macros. r=jseward. They duplicate the equivalent SPS_* macros. (The SPS_* macros have already crept into use in some places within LUL.)
tools/profiler/lul/LulDwarfSummariser.cpp
tools/profiler/lul/LulElf.cpp
tools/profiler/lul/LulElfInt.h
tools/profiler/lul/LulMain.cpp
tools/profiler/lul/LulMain.h
tools/profiler/lul/LulMainInt.h
tools/profiler/lul/LulPlatformMacros.h
tools/profiler/tests/gtest/LulTestDwarf.cpp
--- a/tools/profiler/lul/LulDwarfSummariser.cpp
+++ b/tools/profiler/lul/LulDwarfSummariser.cpp
@@ -129,17 +129,17 @@ Summariser::Rule(uintptr_t aAddress, int
   // any LExpr made here.  So we may as well check it right now.
   if (!fitsIn32Bits(offset)) {
     reason1 = "offset not in signed 32-bit range";
     goto cant_summarise;
   }
 
   // FIXME: factor out common parts of the arch-dependent summarisers.
 
-#if defined(LUL_ARCH_arm)
+#if defined(SPS_ARCH_arm)
 
   // ----------------- arm ----------------- //
 
   // Now, can we add the rule to our summary?  This depends on whether
   // the registers and the overall expression are representable.  This
   // is the heart of the summarisation process.
   switch (aNewReg) {
 
@@ -232,17 +232,17 @@ Summariser::Rule(uintptr_t aAddress, int
   mCurrRules.mR13expr = LExpr(NODEREF, DW_REG_CFA, 0);
 
   // If there's no information about R15 (the return address), say
   // it's a copy of R14 (the link register).
   if (mCurrRules.mR15expr.mHow == UNKNOWN) {
     mCurrRules.mR15expr = LExpr(NODEREF, DW_REG_ARM_R14, 0);
   }
 
-#elif defined(LUL_ARCH_x64) || defined(LUL_ARCH_x86)
+#elif defined(SPS_ARCH_amd64) || defined(SPS_ARCH_x86)
 
   // ---------------- x64/x86 ---------------- //
 
   // Now, can we add the rule to our summary?  This depends on whether
   // the registers and the overall expression are representable.  This
   // is the heart of the summarisation process.
   switch (aNewReg) {
 
--- a/tools/profiler/lul/LulElf.cpp
+++ b/tools/profiler/lul/LulElf.cpp
@@ -56,24 +56,24 @@
 
 #include <set>
 #include <string>
 #include <vector>
 
 #include "mozilla/Assertions.h"
 #include "mozilla/Sprintf.h"
 
-#include "LulPlatformMacros.h"
+#include "PlatformMacros.h"
 #include "LulCommonExt.h"
 #include "LulDwarfExt.h"
 #include "LulElfInt.h"
 #include "LulMainInt.h"
 
 
-#if defined(LUL_PLAT_arm_android) && !defined(SHT_ARM_EXIDX)
+#if defined(SPS_PLAT_arm_android) && !defined(SHT_ARM_EXIDX)
 // bionic and older glibsc don't define it
 # define SHT_ARM_EXIDX (SHT_LOPROC + 1)
 #endif
 
 
 // This namespace contains helper functions.
 namespace {
 
--- a/tools/profiler/lul/LulElfInt.h
+++ b/tools/profiler/lul/LulElfInt.h
@@ -43,24 +43,24 @@
 // This header defines functions etc internal to the ELF reader.  It
 // should not be included outside of LulElf.cpp.
 
 #include <elf.h>
 #include <stdlib.h>
 
 #include "mozilla/Assertions.h"
 
-#include "LulPlatformMacros.h"
+#include "PlatformMacros.h"
 
 
 // (derived from)
 // elfutils.h: Utilities for dealing with ELF files.
 //
 
-#if defined(LUL_OS_android)
+#if defined(SPS_OS_android)
 
 // From toolkit/crashreporter/google-breakpad/src/common/android/include/elf.h
 // The Android headers don't always define this constant.
 #ifndef EM_X86_64
 #define EM_X86_64  62
 #endif
 
 #ifndef EM_PPC64
--- a/tools/profiler/lul/LulMain.cpp
+++ b/tools/profiler/lul/LulMain.cpp
@@ -55,21 +55,21 @@ using mozilla::MallocSizeOf;
 // RuleSet                                                    //
 ////////////////////////////////////////////////////////////////
 
 static const char* 
 NameOf_DW_REG(int16_t aReg)
 {
   switch (aReg) {
     case DW_REG_CFA:       return "cfa";
-#if defined(LUL_ARCH_x64) || defined(LUL_ARCH_x86)
+#if defined(SPS_ARCH_amd64) || defined(SPS_ARCH_x86)
     case DW_REG_INTEL_XBP: return "xbp";
     case DW_REG_INTEL_XSP: return "xsp";
     case DW_REG_INTEL_XIP: return "xip";
-#elif defined(LUL_ARCH_arm)
+#elif defined(SPS_ARCH_arm)
     case DW_REG_ARM_R7:    return "r7";
     case DW_REG_ARM_R11:   return "r11";
     case DW_REG_ARM_R12:   return "r12";
     case DW_REG_ARM_R13:   return "r13";
     case DW_REG_ARM_R14:   return "r14";
     case DW_REG_ARM_R15:   return "r15";
 #else
 # error "Unsupported arch"
@@ -114,42 +114,42 @@ RuleSet::Print(void(*aLog)(const char*))
   char buf[96];
   SprintfLiteral(buf, "[%llx .. %llx]: let ",
                  (unsigned long long int)mAddr,
                  (unsigned long long int)(mAddr + mLen - 1));
   string res = string(buf);
   res += mCfaExpr.ShowRule("cfa");
   res += " in";
   // For each reg we care about, print the recovery expression.
-#if defined(LUL_ARCH_x64) || defined(LUL_ARCH_x86)
+#if defined(SPS_ARCH_amd64) || defined(SPS_ARCH_x86)
   res += mXipExpr.ShowRule(" RA");
   res += mXspExpr.ShowRule(" SP");
   res += mXbpExpr.ShowRule(" BP");
-#elif defined(LUL_ARCH_arm)
+#elif defined(SPS_ARCH_arm)
   res += mR15expr.ShowRule(" R15");
   res += mR7expr .ShowRule(" R7" );
   res += mR11expr.ShowRule(" R11");
   res += mR12expr.ShowRule(" R12");
   res += mR13expr.ShowRule(" R13");
   res += mR14expr.ShowRule(" R14");
 #else
 # error "Unsupported arch"
 #endif
   aLog(res.c_str());
 }
 
 LExpr*
 RuleSet::ExprForRegno(DW_REG_NUMBER aRegno) {
   switch (aRegno) {
     case DW_REG_CFA: return &mCfaExpr;
-#   if defined(LUL_ARCH_x64) || defined(LUL_ARCH_x86)
+#   if defined(SPS_ARCH_amd64) || defined(SPS_ARCH_x86)
     case DW_REG_INTEL_XIP: return &mXipExpr;
     case DW_REG_INTEL_XSP: return &mXspExpr;
     case DW_REG_INTEL_XBP: return &mXbpExpr;
-#   elif defined(LUL_ARCH_arm)
+#   elif defined(SPS_ARCH_arm)
     case DW_REG_ARM_R15:   return &mR15expr;
     case DW_REG_ARM_R14:   return &mR14expr;
     case DW_REG_ARM_R13:   return &mR13expr;
     case DW_REG_ARM_R12:   return &mR12expr;
     case DW_REG_ARM_R11:   return &mR11expr;
     case DW_REG_ARM_R7:    return &mR7expr;
 #   else
 #     error "Unknown arch"
@@ -628,29 +628,29 @@ class PriMap {
     if (!b) {
       // no code (that we know about) at this address
       return false;
     }
 
     // |ia| falls within an r-x range.  So we can
     // safely poke around in [insns_min, insns_max].
 
-#if defined(LUL_ARCH_x64) || defined(LUL_ARCH_x86)
+#if defined(SPS_ARCH_amd64) || defined(SPS_ARCH_x86)
     // Is the previous instruction recognisably a CALL?  This is
     // common for the 32- and 64-bit versions, except for the
     // simm32(%rip) case, which is 64-bit only.
     //
     // For all other cases, the 64 bit versions are either identical
     // to the 32 bit versions, or have an optional extra leading REX.W
     // byte (0x41).  Since the extra 0x41 is optional we have to
     // ignore it, with the convenient result that the same matching
     // logic works for both 32- and 64-bit cases.
 
     uint8_t* p = (uint8_t*)ia;
-#   if defined(LUL_ARCH_x64)
+#   if defined(SPS_ARCH_amd64)
     // CALL simm32(%rip)  == FF15 simm32
     if (ia - 6 >= insns_min && p[-6] == 0xFF && p[-5] == 0x15) {
       return true;
     }
 #   endif
     // CALL rel32  == E8 rel32  (both 32- and 64-bit)
     if (ia - 5 >= insns_min && p[-5] == 0xE8) {
       return true;
@@ -740,17 +740,17 @@ class PriMap {
       return true;
     }
     if (ia - 7 >= insns_min &&
         p[-7] == 0xFF && p[-6] == 0x94 && p[-5] == 0x24) {
       // imm32 case for %esp/%rsp
       return true;
     }
 
-#elif defined(LUL_ARCH_arm)
+#elif defined(SPS_ARCH_arm)
     if (ia & 1) {
       uint16_t w0 = 0, w1 = 0;
       // The return address has its lowest bit set, indicating a return
       // to Thumb code.
       ia &= ~(uintptr_t)1;
       if (ia - 2 >= insns_min && ia - 1 <= insns_max) {
         w1 = *(uint16_t*)(ia - 2);
       }
@@ -1088,21 +1088,21 @@ TaggedUWord DerefTUW(TaggedUWord aAddr, 
 
 // RUNS IN NO-MALLOC CONTEXT
 static
 TaggedUWord EvaluateReg(int16_t aReg, const UnwindRegs* aOldRegs,
                         TaggedUWord aCFA)
 {
   switch (aReg) {
     case DW_REG_CFA:       return aCFA;
-#if defined(LUL_ARCH_x64) || defined(LUL_ARCH_x86)
+#if defined(SPS_ARCH_amd64) || defined(SPS_ARCH_x86)
     case DW_REG_INTEL_XBP: return aOldRegs->xbp;
     case DW_REG_INTEL_XSP: return aOldRegs->xsp;
     case DW_REG_INTEL_XIP: return aOldRegs->xip;
-#elif defined(LUL_ARCH_arm)
+#elif defined(SPS_ARCH_arm)
     case DW_REG_ARM_R7:    return aOldRegs->r7;
     case DW_REG_ARM_R11:   return aOldRegs->r11;
     case DW_REG_ARM_R12:   return aOldRegs->r12;
     case DW_REG_ARM_R13:   return aOldRegs->r13;
     case DW_REG_ARM_R14:   return aOldRegs->r14;
     case DW_REG_ARM_R15:   return aOldRegs->r15;
 #else
 # error "Unsupported arch"
@@ -1280,21 +1280,21 @@ void UseRuleSet(/*MOD*/UnwindRegs* aRegs
   // whilst computing the new ones.
   UnwindRegs old_regs = *aRegs;
 
   // Mark all the current register values as invalid, so that the
   // caller can see, on our return, which ones have been computed
   // anew.  If we don't even manage to compute a new PC value, then
   // the caller will have to abandon the unwind.
   // FIXME: Create and use instead: aRegs->SetAllInvalid();
-#if defined(LUL_ARCH_x64) || defined(LUL_ARCH_x86)
+#if defined(SPS_ARCH_amd64) || defined(SPS_ARCH_x86)
   aRegs->xbp = TaggedUWord();
   aRegs->xsp = TaggedUWord();
   aRegs->xip = TaggedUWord();
-#elif defined(LUL_ARCH_arm)
+#elif defined(SPS_ARCH_arm)
   aRegs->r7  = TaggedUWord();
   aRegs->r11 = TaggedUWord();
   aRegs->r12 = TaggedUWord();
   aRegs->r13 = TaggedUWord();
   aRegs->r14 = TaggedUWord();
   aRegs->r15 = TaggedUWord();
 #else
 #  error "Unsupported arch"
@@ -1308,24 +1308,24 @@ void UseRuleSet(/*MOD*/UnwindRegs* aRegs
     = aRS->mCfaExpr.EvaluateExpr(&old_regs,
                                  inval/*old cfa*/, aStackImg, aPfxInstrs);
 
   // If we didn't manage to compute the CFA, well .. that's ungood,
   // but keep going anyway.  It'll be OK provided none of the register
   // value rules mention the CFA.  In any case, compute the new values
   // for each register that we're tracking.
 
-#if defined(LUL_ARCH_x64) || defined(LUL_ARCH_x86)
+#if defined(SPS_ARCH_amd64) || defined(SPS_ARCH_x86)
   aRegs->xbp
     = aRS->mXbpExpr.EvaluateExpr(&old_regs, cfa, aStackImg, aPfxInstrs);
   aRegs->xsp
     = aRS->mXspExpr.EvaluateExpr(&old_regs, cfa, aStackImg, aPfxInstrs);
   aRegs->xip
     = aRS->mXipExpr.EvaluateExpr(&old_regs, cfa, aStackImg, aPfxInstrs);
-#elif defined(LUL_ARCH_arm)
+#elif defined(SPS_ARCH_arm)
   aRegs->r7
     = aRS->mR7expr .EvaluateExpr(&old_regs, cfa, aStackImg, aPfxInstrs);
   aRegs->r11
     = aRS->mR11expr.EvaluateExpr(&old_regs, cfa, aStackImg, aPfxInstrs);
   aRegs->r12
     = aRS->mR12expr.EvaluateExpr(&old_regs, cfa, aStackImg, aPfxInstrs);
   aRegs->r13
     = aRS->mR13expr.EvaluateExpr(&old_regs, cfa, aStackImg, aPfxInstrs);
@@ -1365,45 +1365,45 @@ LUL::Unwind(/*OUT*/uintptr_t* aFramePCs,
   unsigned int n_scanned_frames      = 0;  // # s-s frames recovered so far
   static const int NUM_SCANNED_WORDS = 50; // max allowed scan length
 
   while (true) {
 
     if (DEBUG_MAIN) {
       char buf[300];
       mLog("\n");
-#if defined(LUL_ARCH_x64) || defined(LUL_ARCH_x86)
+#if defined(SPS_ARCH_amd64) || defined(SPS_ARCH_x86)
       SprintfLiteral(buf,
                      "LoopTop: rip %d/%llx  rsp %d/%llx  rbp %d/%llx\n",
                      (int)regs.xip.Valid(), (unsigned long long int)regs.xip.Value(),
                      (int)regs.xsp.Valid(), (unsigned long long int)regs.xsp.Value(),
                      (int)regs.xbp.Valid(), (unsigned long long int)regs.xbp.Value());
       buf[sizeof(buf)-1] = 0;
       mLog(buf);
-#elif defined(LUL_ARCH_arm)
+#elif defined(SPS_ARCH_arm)
       SprintfLiteral(buf,
                      "LoopTop: r15 %d/%llx  r7 %d/%llx  r11 %d/%llx"
                      "  r12 %d/%llx  r13 %d/%llx  r14 %d/%llx\n",
                      (int)regs.r15.Valid(), (unsigned long long int)regs.r15.Value(),
                      (int)regs.r7.Valid(),  (unsigned long long int)regs.r7.Value(),
                      (int)regs.r11.Valid(), (unsigned long long int)regs.r11.Value(),
                      (int)regs.r12.Valid(), (unsigned long long int)regs.r12.Value(),
                      (int)regs.r13.Valid(), (unsigned long long int)regs.r13.Value(),
                      (int)regs.r14.Valid(), (unsigned long long int)regs.r14.Value());
       buf[sizeof(buf)-1] = 0;
       mLog(buf);
 #else
 # error "Unsupported arch"
 #endif
     }
 
-#if defined(LUL_ARCH_x64) || defined(LUL_ARCH_x86)
+#if defined(SPS_ARCH_amd64) || defined(SPS_ARCH_x86)
     TaggedUWord ia = regs.xip;
     TaggedUWord sp = regs.xsp;
-#elif defined(LUL_ARCH_arm)
+#elif defined(SPS_ARCH_arm)
     TaggedUWord ia = (*aFramesUsed == 0 ? regs.r15 : regs.r14);
     TaggedUWord sp = regs.r13;
 #else
 # error "Unsupported arch"
 #endif
 
     if (*aFramesUsed >= aFramesAvail) {
       break;
@@ -1498,17 +1498,17 @@ LUL::Unwind(/*OUT*/uintptr_t* aFramePCs,
     //    new_esp = old_esp + 16
     //
     // It may also be the case that the program counter points two
     // nops before the "int $0x80", viz, is __kernel_vsyscall+12, in
     // the case where the syscall has been restarted but the thread
     // hasn't been rescheduled.  The code below doesn't handle that;
     // it could easily be made to.
     //
-#if defined(LUL_PLAT_x86_android) || defined(LUL_PLAT_x86_linux)
+#if defined(SPS_PLAT_x86_android) || defined(SPS_PLAT_x86_linux)
     if (!ruleset && *aFramesUsed == 1 && ia.Valid() && sp.Valid()) {
       uintptr_t insns_min, insns_max;
       uintptr_t eip = ia.Value();
       bool b = mSegArray->getBoundingCodeSegment(&insns_min, &insns_max, eip);
       if (b && eip - 2 >= insns_min && eip + 3 <= insns_max) {
         uint8_t* eipC = (uint8_t*)eip;
         if (eipC[-2] == 0xCD && eipC[-1] == 0x80 && eipC[0] == 0x5D &&
             eipC[1] == 0x5A && eipC[2] == 0x59 && eipC[3] == 0xC3) {
@@ -1570,21 +1570,21 @@ LUL::Unwind(/*OUT*/uintptr_t* aFramePCs,
         // Now, does aWord point inside a text section and immediately
         // after something that looks like a call instruction?
         if (mPriMap->MaybeIsReturnPoint(aWord, mSegArray)) {
           // Yes it does.  Update the unwound registers heuristically,
           // using the same schemes as Breakpad does.
           scan_succeeded = true;
           (*aScannedFramesAcquired)++;
 
-#if defined(LUL_ARCH_x64) || defined(LUL_ARCH_x86)
+#if defined(SPS_ARCH_amd64) || defined(SPS_ARCH_x86)
           // The same logic applies for the 32- and 64-bit cases.
           // Register names of the form xsp etc refer to (eg) esp in
           // the 32-bit case and rsp in the 64-bit case.
-#         if defined(LUL_ARCH_x64)
+#         if defined(SPS_ARCH_amd64)
           const int wordSize = 8;
 #         else
           const int wordSize = 4;
 #         endif
           // The return address -- at XSP -- will have been pushed by
           // the CALL instruction.  So the caller's XSP value
           // immediately before and after that CALL instruction is the
           // word above XSP.
@@ -1614,17 +1614,17 @@ LUL::Unwind(/*OUT*/uintptr_t* aFramePCs,
             // Mark XBP as invalid, so that subsequent unwind iterations
             // don't assume it holds valid data.
             regs.xbp = TaggedUWord();
           }
 
           // Move on to the next word up the stack
           sp = sp + TaggedUWord(wordSize);
 
-#elif defined(LUL_ARCH_arm)
+#elif defined(SPS_ARCH_arm)
           // Set all registers to be undefined, except for SP(R13) and
           // PC(R15).
 
           // aWord points either at the return point, if returning to
           // ARM code, or one insn past the return point if returning
           // to Thumb code.  In both cases, aWord-2 is guaranteed to
           // fall within the calling instruction.
           regs.r15 = aWord + TaggedUWord((uintptr_t)(-2));
@@ -1681,48 +1681,48 @@ static const int LUL_UNIT_TEST_STACK_SIZ
 // fail.  Prints summary results to |aLUL|'s logging sink and also
 // returns a boolean indicating whether or not the test passed.
 static __attribute__((noinline))
 bool GetAndCheckStackTrace(LUL* aLUL, const char* dstring)
 {
   // Get hold of the current unwind-start registers.
   UnwindRegs startRegs;
   memset(&startRegs, 0, sizeof(startRegs));
-#if defined(LUL_PLAT_x64_linux)
+#if defined(SPS_PLAT_amd64_linux)
   volatile uintptr_t block[3];
   MOZ_ASSERT(sizeof(block) == 24);
   __asm__ __volatile__(
     "leaq 0(%%rip), %%r15"   "\n\t"
     "movq %%r15, 0(%0)"      "\n\t"
     "movq %%rsp, 8(%0)"      "\n\t"
     "movq %%rbp, 16(%0)"     "\n"
     : : "r"(&block[0]) : "memory", "r15"
   );
   startRegs.xip = TaggedUWord(block[0]);
   startRegs.xsp = TaggedUWord(block[1]);
   startRegs.xbp = TaggedUWord(block[2]);
   const uintptr_t REDZONE_SIZE = 128;
   uintptr_t start = block[1] - REDZONE_SIZE;
-#elif defined(LUL_PLAT_x86_linux) || defined(LUL_PLAT_x86_android)
+#elif defined(SPS_PLAT_x86_linux) || defined(SPS_PLAT_x86_android)
   volatile uintptr_t block[3];
   MOZ_ASSERT(sizeof(block) == 12);
   __asm__ __volatile__(
     ".byte 0xE8,0x00,0x00,0x00,0x00"/*call next insn*/  "\n\t"
     "popl %%edi"             "\n\t"
     "movl %%edi, 0(%0)"      "\n\t"
     "movl %%esp, 4(%0)"      "\n\t"
     "movl %%ebp, 8(%0)"      "\n"
     : : "r"(&block[0]) : "memory", "edi"
   );
   startRegs.xip = TaggedUWord(block[0]);
   startRegs.xsp = TaggedUWord(block[1]);
   startRegs.xbp = TaggedUWord(block[2]);
   const uintptr_t REDZONE_SIZE = 0;
   uintptr_t start = block[1] - REDZONE_SIZE;
-#elif defined(LUL_PLAT_arm_android)
+#elif defined(SPS_PLAT_arm_android)
   volatile uintptr_t block[6];
   MOZ_ASSERT(sizeof(block) == 24);
   __asm__ __volatile__(
     "mov r0, r15"            "\n\t"
     "str r0,  [%0, #0]"      "\n\t"
     "str r14, [%0, #4]"      "\n\t"
     "str r13, [%0, #8]"      "\n\t"
     "str r12, [%0, #12]"     "\n\t"
--- a/tools/profiler/lul/LulMain.h
+++ b/tools/profiler/lul/LulMain.h
@@ -2,17 +2,17 @@
 /* vim: set ts=8 sts=2 et sw=2 tw=80: */
 /* This Source Code Form is subject to the terms of the Mozilla Public
  * License, v. 2.0. If a copy of the MPL was not distributed with this
  * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
 
 #ifndef LulMain_h
 #define LulMain_h
 
-#include "LulPlatformMacros.h"
+#include "PlatformMacros.h"
 #include "mozilla/Atomics.h"
 #include "mozilla/MemoryReporting.h"
 
 // LUL: A Lightweight Unwind Library.
 // This file provides the end-user (external) interface for LUL.
 
 // Some comments about naming in the implementation.  These are safe
 // to ignore if you are merely using LUL, but are important if you
@@ -136,24 +136,24 @@ private:
   uintptr_t mValue;
   bool mValid;
 };
 
 
 // The registers, with validity tags, that will be unwound.
 
 struct UnwindRegs {
-#if defined(LUL_ARCH_arm)
+#if defined(SPS_ARCH_arm)
   TaggedUWord r7;
   TaggedUWord r11;
   TaggedUWord r12;
   TaggedUWord r13;
   TaggedUWord r14;
   TaggedUWord r15;
-#elif defined(LUL_ARCH_x64) || defined(LUL_ARCH_x86)
+#elif defined(SPS_ARCH_amd64) || defined(SPS_ARCH_x86)
   TaggedUWord xbp;
   TaggedUWord xsp;
   TaggedUWord xip;
 #else
 # error "Unknown plat"
 #endif
 };
 
--- a/tools/profiler/lul/LulMainInt.h
+++ b/tools/profiler/lul/LulMainInt.h
@@ -2,17 +2,17 @@
 /* vim: set ts=8 sts=2 et sw=2 tw=80: */
 /* This Source Code Form is subject to the terms of the Mozilla Public
  * License, v. 2.0. If a copy of the MPL was not distributed with this
  * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
 
 #ifndef LulMainInt_h
 #define LulMainInt_h
 
-#include "LulPlatformMacros.h"
+#include "PlatformMacros.h"
 #include "LulMain.h" // for TaggedUWord
 
 #include <vector>
 
 #include "mozilla/Assertions.h"
 
 // This file is provides internal interface inside LUL.  If you are an
 // end-user of LUL, do not include it in your code.  The end-user
@@ -30,31 +30,31 @@ using std::vector;
 // These are the Dwarf CFI register numbers, as (presumably) defined
 // in the ELF ABI supplements for each architecture.
 
 enum DW_REG_NUMBER {
   // No real register has this number.  It's convenient to be able to
   // treat the CFA (Canonical Frame Address) as "just another
   // register", though.
   DW_REG_CFA = -1,
-#if defined(LUL_ARCH_arm)
+#if defined(SPS_ARCH_arm)
   // ARM registers
   DW_REG_ARM_R7  = 7,
   DW_REG_ARM_R11 = 11,
   DW_REG_ARM_R12 = 12,
   DW_REG_ARM_R13 = 13,
   DW_REG_ARM_R14 = 14,
   DW_REG_ARM_R15 = 15,
-#elif defined(LUL_ARCH_x64)
+#elif defined(SPS_ARCH_amd64)
   // Because the X86 (32 bit) and AMD64 (64 bit) summarisers are
   // combined, a merged set of register constants is needed.
   DW_REG_INTEL_XBP = 6,
   DW_REG_INTEL_XSP = 7,
   DW_REG_INTEL_XIP = 16,
-#elif defined(LUL_ARCH_x86)
+#elif defined(SPS_ARCH_x86)
   DW_REG_INTEL_XBP = 5,
   DW_REG_INTEL_XSP = 4,
   DW_REG_INTEL_XIP = 8,
 #else
 # error "Unknown arch"
 #endif
 };
 
@@ -259,40 +259,40 @@ public:
   LExpr* ExprForRegno(DW_REG_NUMBER aRegno);
 
   uintptr_t mAddr;
   uintptr_t mLen;
   // How to compute the CFA.
   LExpr  mCfaExpr;
   // How to compute caller register values.  These may reference the
   // value defined by |mCfaExpr|.
-#if defined(LUL_ARCH_x64) || defined(LUL_ARCH_x86)
+#if defined(SPS_ARCH_amd64) || defined(SPS_ARCH_x86)
   LExpr  mXipExpr; // return address
   LExpr  mXspExpr;
   LExpr  mXbpExpr;
-#elif defined(LUL_ARCH_arm)
+#elif defined(SPS_ARCH_arm)
   LExpr  mR15expr; // return address
   LExpr  mR14expr;
   LExpr  mR13expr;
   LExpr  mR12expr;
   LExpr  mR11expr;
   LExpr  mR7expr;
 #else
 #   error "Unknown arch"
 #endif
 };
 
 // Returns |true| for Dwarf register numbers which are members
 // of the set of registers that LUL unwinds on this target.
 static inline bool registerIsTracked(DW_REG_NUMBER reg) {
   switch (reg) {
-#   if defined(LUL_ARCH_x64) || defined(LUL_ARCH_x86)
+#   if defined(SPS_ARCH_amd64) || defined(SPS_ARCH_x86)
     case DW_REG_INTEL_XBP: case DW_REG_INTEL_XSP: case DW_REG_INTEL_XIP:
       return true;
-#   elif defined(LUL_ARCH_arm)
+#   elif defined(SPS_ARCH_arm)
     case DW_REG_ARM_R7:  case DW_REG_ARM_R11: case DW_REG_ARM_R12:
     case DW_REG_ARM_R13: case DW_REG_ARM_R14: case DW_REG_ARM_R15:
       return true;
 #   else
 #     error "Unknown arch"
 #   endif
     default:
       return false;
deleted file mode 100644
--- a/tools/profiler/lul/LulPlatformMacros.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- */
-/* vim: set ts=8 sts=2 et sw=2 tw=80: */
-/* This Source Code Form is subject to the terms of the Mozilla Public
- * License, v. 2.0. If a copy of the MPL was not distributed with this
- * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
-
-#ifndef LulPlatformMacros_h
-#define LulPlatformMacros_h
-
-#include <stdint.h>
-#include <stdlib.h>
-
-// Define platform selection macros in a consistent way.  The primary
-// factorisation is on (ARCH,OS) pairs ("PLATforms") but ARCH_ and OS_
-// macros are defined too, since they are sometimes convenient.
-
-#undef LUL_PLAT_x64_linux
-#undef LUL_PLAT_x86_linux
-#undef LUL_PLAT_arm_android
-#undef LUL_PLAT_x86_android
-
-#undef LUL_ARCH_arm
-#undef LUL_ARCH_x86
-#undef LUL_ARCH_x64
-
-#undef LUL_OS_android
-#undef LUL_OS_linux
-
-#if defined(__linux__) && defined(__x86_64__)
-# define LUL_PLAT_x64_linux 1
-# define LUL_ARCH_x64 1
-# define LUL_OS_linux 1
-
-#elif defined(__linux__) && defined(__i386__) && !defined(__ANDROID__)
-# define LUL_PLAT_x86_linux 1
-# define LUL_ARCH_x86 1
-# define LUL_OS_linux 1
-
-#elif defined(__ANDROID__) && defined(__arm__)
-# define LUL_PLAT_arm_android 1
-# define LUL_ARCH_arm 1
-# define LUL_OS_android 1
-
-#elif defined(__ANDROID__) && defined(__i386__)
-# define LUL_PLAT_x86_android 1
-# define LUL_ARCH_x86 1
-# define LUL_OS_android 1
-
-#else
-# error "Unsupported platform"
-#endif
-
-#endif // LulPlatformMacros_h
--- a/tools/profiler/tests/gtest/LulTestDwarf.cpp
+++ b/tools/profiler/tests/gtest/LulTestDwarf.cpp
@@ -2398,20 +2398,20 @@ TEST_F(LulDwarfExpr, ExpressionOverrun) 
   }
 
   int32_t ix = parseDwarfExpr(&summ, &reader, expr, false, false, false);
   EXPECT_TRUE(ix == -1);
 }
 
 // We'll need to mention specific Dwarf registers in the EvaluatePfxExpr tests,
 // and those names are arch-specific, so a bit of macro magic is helpful.
-#if defined(LUL_ARCH_arm)
+#if defined(SPS_ARCH_arm)
 # define TESTED_REG_STRUCT_NAME  r11
 # define TESTED_REG_DWARF_NAME   DW_REG_ARM_R11
-#elif defined(LUL_ARCH_x64) || defined(LUL_ARCH_x86)
+#elif defined(SPS_ARCH_amd64) || defined(SPS_ARCH_x86)
 # define TESTED_REG_STRUCT_NAME  xbp
 # define TESTED_REG_DWARF_NAME   DW_REG_INTEL_XBP
 #else
 # error "Unknown plat"
 #endif
 
 struct EvaluatePfxExprFixture {
   // Creates: