Bug 1342121 - Remove ARM MacroAssembler's dependence on HeapReg. r=bbouvier
authorLars T Hansen <lhansen@mozilla.com>
Tue, 14 Mar 2017 09:43:40 +0100
changeset 348662 6b3cb80665594cd64cce48ca14da9b3f9e5064c7
parent 348661 fcc0dffd33b57273f6eb4944d7b6a8d153c4e356
child 348663 21223d98c2eabfb28b4ce4d13d0d86ff6a61b838
push id31533
push userkwierso@gmail.com
push dateTue, 21 Mar 2017 23:08:53 +0000
treeherdermozilla-central@8744e9f8eb99 [default view] [failures only]
perfherder[talos] [build metrics] [platform microbench] (compared to previous push)
reviewersbbouvier
bugs1342121
milestone55.0a1
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nightly linux64
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Bug 1342121 - Remove ARM MacroAssembler's dependence on HeapReg. r=bbouvier
js/src/jit/MacroAssembler.h
js/src/jit/arm/CodeGenerator-arm.cpp
js/src/jit/arm/MacroAssembler-arm.cpp
js/src/jit/arm/MacroAssembler-arm.h
js/src/wasm/WasmBaselineCompile.cpp
--- a/js/src/jit/MacroAssembler.h
+++ b/js/src/jit/MacroAssembler.h
@@ -1379,46 +1379,62 @@ class MacroAssembler : public MacroAssem
     void wasmStore(const wasm::MemoryAccessDesc& access, AnyRegister value, Operand dstAddr) DEFINED_ON(x86, x64);
     void wasmStoreI64(const wasm::MemoryAccessDesc& access, Register64 value, Operand dstAddr) DEFINED_ON(x86);
 
     // For all the ARM wasmLoad and wasmStore functions, `ptr` MUST equal
     // `ptrScratch`, and that register will be updated based on conditions
     // listed below (where it is only mentioned as `ptr`).
 
     // `ptr` will be updated if access.offset() != 0 or access.type() == Scalar::Int64.
-    void wasmLoad(const wasm::MemoryAccessDesc& access, Register ptr, Register ptrScratch, AnyRegister output) DEFINED_ON(arm);
-    void wasmLoadI64(const wasm::MemoryAccessDesc& access, Register ptr, Register ptrScratch, Register64 output) DEFINED_ON(arm);
-    void wasmStore(const wasm::MemoryAccessDesc& access, AnyRegister value, Register ptr, Register ptrScratch) DEFINED_ON(arm);
-    void wasmStoreI64(const wasm::MemoryAccessDesc& access, Register64 value, Register ptr, Register ptrScratch) DEFINED_ON(arm);
+    void wasmLoad(const wasm::MemoryAccessDesc& access, Register memoryBase, Register ptr,
+                  Register ptrScratch, AnyRegister output)
+        DEFINED_ON(arm);
+    void wasmLoadI64(const wasm::MemoryAccessDesc& access, Register memoryBase, Register ptr,
+                     Register ptrScratch, Register64 output)
+        DEFINED_ON(arm);
+    void wasmStore(const wasm::MemoryAccessDesc& access, AnyRegister value, Register memoryBase,
+                   Register ptr, Register ptrScratch)
+        DEFINED_ON(arm);
+    void wasmStoreI64(const wasm::MemoryAccessDesc& access, Register64 value, Register memoryBase,
+                      Register ptr, Register ptrScratch)
+        DEFINED_ON(arm);
 
     // `ptr` will always be updated.
-    void wasmUnalignedLoad(const wasm::MemoryAccessDesc& access, Register ptr, Register ptrScratch,
-                           Register output, Register tmp) DEFINED_ON(arm);
+    void wasmUnalignedLoad(const wasm::MemoryAccessDesc& access, Register memoryBase, Register ptr,
+                           Register ptrScratch, Register output, Register tmp)
+        DEFINED_ON(arm);
 
     // `ptr` will always be updated and `tmp1` is always needed.  `tmp2` is
     // needed for Float32; `tmp2` and `tmp3` are needed for Float64.  Temps must
     // be Invalid when they are not needed.
-    void wasmUnalignedLoadFP(const wasm::MemoryAccessDesc& access, Register ptr, Register ptrScratch,
-                             FloatRegister output, Register tmp1, Register tmp2, Register tmp3) DEFINED_ON(arm);
-
-    // `ptr` will always be updated.
-    void wasmUnalignedLoadI64(const wasm::MemoryAccessDesc& access, Register ptr, Register ptrScratch,
-                              Register64 output, Register tmp) DEFINED_ON(arm);
-
-    // `ptr` and `value` will always be updated.
-    void wasmUnalignedStore(const wasm::MemoryAccessDesc& access, Register value, Register ptr, Register ptrScratch)
+    void wasmUnalignedLoadFP(const wasm::MemoryAccessDesc& access, Register memoryBase, Register ptr,
+                             Register ptrScratch, FloatRegister output, Register tmp1, Register tmp2,
+                             Register tmp3)
         DEFINED_ON(arm);
 
     // `ptr` will always be updated.
-    void wasmUnalignedStoreFP(const wasm::MemoryAccessDesc& access, FloatRegister floatValue, Register ptr,
-                              Register ptrScratch, Register tmp) DEFINED_ON(arm);
+    void wasmUnalignedLoadI64(const wasm::MemoryAccessDesc& access, Register memoryBase, Register ptr,
+                              Register ptrScratch, Register64 output, Register tmp)
+        DEFINED_ON(arm);
+
+    // `ptr` and `value` will always be updated.
+    void wasmUnalignedStore(const wasm::MemoryAccessDesc& access, Register value, Register memoryBase,
+                            Register ptr, Register ptrScratch)
+        DEFINED_ON(arm);
 
     // `ptr` will always be updated.
-    void wasmUnalignedStoreI64(const wasm::MemoryAccessDesc& access, Register64 value, Register ptr, Register ptrScratch,
-                               Register tmp) DEFINED_ON(arm);
+    void wasmUnalignedStoreFP(const wasm::MemoryAccessDesc& access, FloatRegister floatValue,
+                              Register memoryBase, Register ptr, Register ptrScratch, Register tmp)
+        DEFINED_ON(arm);
+
+    // `ptr` will always be updated.
+    void wasmUnalignedStoreI64(const wasm::MemoryAccessDesc& access, Register64 value,
+                               Register memoryBase, Register ptr, Register ptrScratch,
+                               Register tmp)
+        DEFINED_ON(arm);
 
     // wasm specific methods, used in both the wasm baseline compiler and ion.
     void wasmTruncateDoubleToUInt32(FloatRegister input, Register output, Label* oolEntry) DEFINED_ON(x86, x64, arm);
     void wasmTruncateDoubleToInt32(FloatRegister input, Register output, Label* oolEntry) DEFINED_ON(x86_shared, arm);
     void outOfLineWasmTruncateDoubleToInt32(FloatRegister input, bool isUnsigned, wasm::TrapOffset off, Label* rejoin) DEFINED_ON(x86_shared);
 
     void wasmTruncateFloat32ToUInt32(FloatRegister input, Register output, Label* oolEntry) DEFINED_ON(x86, x64, arm);
     void wasmTruncateFloat32ToInt32(FloatRegister input, Register output, Label* oolEntry) DEFINED_ON(x86_shared, arm);
--- a/js/src/jit/arm/CodeGenerator-arm.cpp
+++ b/js/src/jit/arm/CodeGenerator-arm.cpp
@@ -2373,19 +2373,19 @@ CodeGeneratorARM::emitWasmLoad(T* lir)
     if (mir->access().offset() || mir->access().type() == Scalar::Int64) {
         ptr = ToRegister(lir->ptrCopy());
     } else {
         MOZ_ASSERT(lir->ptrCopy()->isBogusTemp());
         ptr = ToRegister(lir->ptr());
     }
 
     if (resultType == MIRType::Int64)
-        masm.wasmLoadI64(mir->access(), ptr, ptr, ToOutRegister64(lir));
+        masm.wasmLoadI64(mir->access(), HeapReg, ptr, ptr, ToOutRegister64(lir));
     else
-        masm.wasmLoad(mir->access(), ptr, ptr, ToAnyRegister(lir->output()));
+        masm.wasmLoad(mir->access(), HeapReg, ptr, ptr, ToAnyRegister(lir->output()));
 }
 
 void
 CodeGeneratorARM::visitWasmLoad(LWasmLoad* lir)
 {
     emitWasmLoad(lir);
 }
 
@@ -2401,25 +2401,26 @@ CodeGeneratorARM::emitWasmUnalignedLoad(
 {
     const MWasmLoad* mir = lir->mir();
     MIRType resultType = mir->type();
 
     Register ptr = ToRegister(lir->ptrCopy());
     Register tmp1 = ToRegister(lir->getTemp(1));
 
     if (resultType == MIRType::Int64) {
-        masm.wasmUnalignedLoadI64(mir->access(), ptr, ptr, ToOutRegister64(lir), tmp1);
+        masm.wasmUnalignedLoadI64(mir->access(), HeapReg, ptr, ptr, ToOutRegister64(lir), tmp1);
     } else if (IsFloatingPointType(resultType)) {
         Register tmp2(ToRegister(lir->getTemp(2)));
         Register tmp3(Register::Invalid());
         if (mir->access().byteSize() == 8)
             tmp3 = ToRegister(lir->getTemp(3));
-        masm.wasmUnalignedLoadFP(mir->access(), ptr, ptr, ToFloatRegister(lir->output()), tmp1, tmp2, tmp3);
+        masm.wasmUnalignedLoadFP(mir->access(), HeapReg, ptr, ptr, ToFloatRegister(lir->output()),
+                                 tmp1, tmp2, tmp3);
     } else {
-        masm.wasmUnalignedLoad(mir->access(), ptr, ptr, ToRegister(lir->output()), tmp1);
+        masm.wasmUnalignedLoad(mir->access(), HeapReg, ptr, ptr, ToRegister(lir->output()), tmp1);
     }
 }
 
 void
 CodeGeneratorARM::visitWasmUnalignedLoad(LWasmUnalignedLoad* lir)
 {
     emitWasmUnalignedLoad(lir);
 }
@@ -2456,19 +2457,20 @@ CodeGeneratorARM::emitWasmStore(T* lir)
         ptr = ToRegister(lir->ptrCopy());
     } else {
         MOZ_ASSERT(lir->ptrCopy()->isBogusTemp());
         ptr = ToRegister(lir->ptr());
     }
 
     if (accessType == Scalar::Int64)
         masm.wasmStoreI64(mir->access(), ToRegister64(lir->getInt64Operand(lir->ValueIndex)),
-                          ptr, ptr);
+                          HeapReg, ptr, ptr);
     else
-        masm.wasmStore(mir->access(), ToAnyRegister(lir->getOperand(lir->ValueIndex)), ptr, ptr);
+        masm.wasmStore(mir->access(), ToAnyRegister(lir->getOperand(lir->ValueIndex)), HeapReg,
+                       ptr, ptr);
 }
 
 void
 CodeGeneratorARM::visitWasmStore(LWasmStore* lir)
 {
     emitWasmStore(lir);
 }
 
@@ -2485,22 +2487,22 @@ CodeGeneratorARM::emitWasmUnalignedStore
     const MWasmStore* mir = lir->mir();
     Scalar::Type accessType = mir->access().type();
 
     Register ptr = ToRegister(lir->ptrCopy());
     Register valOrTmp = ToRegister(lir->valueHelper());
     if (accessType == Scalar::Int64) {
         masm.wasmUnalignedStoreI64(mir->access(),
                                    ToRegister64(lir->getInt64Operand(LWasmUnalignedStoreI64::ValueIndex)),
-                                   ptr, ptr, valOrTmp);
+                                   HeapReg, ptr, ptr, valOrTmp);
     } else if (accessType == Scalar::Float32 || accessType == Scalar::Float64) {
         FloatRegister value = ToFloatRegister(lir->getOperand(LWasmUnalignedStore::ValueIndex));
-        masm.wasmUnalignedStoreFP(mir->access(), value, ptr, ptr, valOrTmp);
+        masm.wasmUnalignedStoreFP(mir->access(), value, HeapReg, ptr, ptr, valOrTmp);
     } else {
-        masm.wasmUnalignedStore(mir->access(), valOrTmp, ptr, ptr);
+        masm.wasmUnalignedStore(mir->access(), valOrTmp, HeapReg, ptr, ptr);
     }
 }
 
 void
 CodeGeneratorARM::visitWasmUnalignedStore(LWasmUnalignedStore* lir)
 {
     emitWasmUnalignedStore(lir);
 }
--- a/js/src/jit/arm/MacroAssembler-arm.cpp
+++ b/js/src/jit/arm/MacroAssembler-arm.cpp
@@ -5437,87 +5437,91 @@ MacroAssembler::wasmTruncateFloat32ToUIn
 
 void
 MacroAssembler::wasmTruncateFloat32ToInt32(FloatRegister input, Register output, Label* oolEntry)
 {
     wasmTruncateToInt32(input, output, MIRType::Float32, /* isUnsigned= */ false, oolEntry);
 }
 
 void
-MacroAssembler::wasmLoad(const wasm::MemoryAccessDesc& access, Register ptr, Register ptrScratch,
-                         AnyRegister output)
-{
-    wasmLoadImpl(access, ptr, ptrScratch, output, Register64::Invalid());
-}
-
-void
-MacroAssembler::wasmLoadI64(const wasm::MemoryAccessDesc& access, Register ptr, Register ptrScratch,
-                            Register64 output)
-{
-    wasmLoadImpl(access, ptr, ptrScratch, AnyRegister(), output);
-}
-
-void
-MacroAssembler::wasmStore(const wasm::MemoryAccessDesc& access, AnyRegister value, Register ptr,
-                          Register ptrScratch)
-{
-    wasmStoreImpl(access, value, Register64::Invalid(), ptr, ptrScratch);
-}
-
-void
-MacroAssembler::wasmStoreI64(const wasm::MemoryAccessDesc& access, Register64 value, Register ptr,
-                             Register ptrScratch)
-{
-    wasmStoreImpl(access, AnyRegister(), value, ptr, ptrScratch);
-}
-
-void
-MacroAssembler::wasmUnalignedLoad(const wasm::MemoryAccessDesc& access, Register ptr,
-                                  Register ptrScratch, Register output, Register tmp)
-{
-    wasmUnalignedLoadImpl(access, ptr, ptrScratch, AnyRegister(output), Register64::Invalid(), tmp,
+MacroAssembler::wasmLoad(const wasm::MemoryAccessDesc& access, Register memoryBase, Register ptr,
+                         Register ptrScratch, AnyRegister output)
+{
+    wasmLoadImpl(access, memoryBase, ptr, ptrScratch, output, Register64::Invalid());
+}
+
+void
+MacroAssembler::wasmLoadI64(const wasm::MemoryAccessDesc& access, Register memoryBase, Register ptr,
+                            Register ptrScratch, Register64 output)
+{
+    wasmLoadImpl(access, memoryBase, ptr, ptrScratch, AnyRegister(), output);
+}
+
+void
+MacroAssembler::wasmStore(const wasm::MemoryAccessDesc& access, AnyRegister value,
+                          Register memoryBase, Register ptr, Register ptrScratch)
+{
+    wasmStoreImpl(access, value, Register64::Invalid(), memoryBase, ptr, ptrScratch);
+}
+
+void
+MacroAssembler::wasmStoreI64(const wasm::MemoryAccessDesc& access, Register64 value,
+                             Register memoryBase, Register ptr, Register ptrScratch)
+{
+    wasmStoreImpl(access, AnyRegister(), value, memoryBase, ptr, ptrScratch);
+}
+
+void
+MacroAssembler::wasmUnalignedLoad(const wasm::MemoryAccessDesc& access, Register memoryBase,
+                                  Register ptr, Register ptrScratch, Register output, Register tmp)
+{
+    wasmUnalignedLoadImpl(access, memoryBase, ptr, ptrScratch, AnyRegister(output),
+                          Register64::Invalid(), tmp, Register::Invalid(), Register::Invalid());
+}
+
+void
+MacroAssembler::wasmUnalignedLoadFP(const wasm::MemoryAccessDesc& access, Register memoryBase,
+                                    Register ptr, Register ptrScratch, FloatRegister outFP,
+                                    Register tmp1, Register tmp2, Register tmp3)
+{
+    wasmUnalignedLoadImpl(access, memoryBase, ptr, ptrScratch, AnyRegister(outFP),
+                          Register64::Invalid(), tmp1, tmp2, tmp3);
+}
+
+void
+MacroAssembler::wasmUnalignedLoadI64(const wasm::MemoryAccessDesc& access, Register memoryBase,
+                                     Register ptr, Register ptrScratch, Register64 out64,
+                                     Register tmp)
+{
+    wasmUnalignedLoadImpl(access, memoryBase, ptr, ptrScratch, AnyRegister(), out64, tmp,
                           Register::Invalid(), Register::Invalid());
 }
 
 void
-MacroAssembler::wasmUnalignedLoadFP(const wasm::MemoryAccessDesc& access, Register ptr,
-                                    Register ptrScratch, FloatRegister outFP, Register tmp1,
-                                    Register tmp2, Register tmp3)
-{
-    wasmUnalignedLoadImpl(access, ptr, ptrScratch, AnyRegister(outFP), Register64::Invalid(),
-                          tmp1, tmp2, tmp3);
-}
-
-void
-MacroAssembler::wasmUnalignedLoadI64(const wasm::MemoryAccessDesc& access, Register ptr,
-                                     Register ptrScratch, Register64 out64, Register tmp)
-{
-    wasmUnalignedLoadImpl(access, ptr, ptrScratch, AnyRegister(), out64, tmp, Register::Invalid(),
-                          Register::Invalid());
-}
-
-void
 MacroAssembler::wasmUnalignedStore(const wasm::MemoryAccessDesc& access, Register value,
-                                   Register ptr, Register ptrScratch)
-{
-    wasmUnalignedStoreImpl(access, FloatRegister(), Register64::Invalid(), ptr, ptrScratch, value);
+                                   Register memoryBase, Register ptr, Register ptrScratch)
+{
+    wasmUnalignedStoreImpl(access, FloatRegister(), Register64::Invalid(), memoryBase, ptr,
+                           ptrScratch, value);
 }
 
 void
 MacroAssembler::wasmUnalignedStoreFP(const wasm::MemoryAccessDesc& access, FloatRegister floatVal,
-                                     Register ptr, Register ptrScratch, Register tmp)
-{
-    wasmUnalignedStoreImpl(access, floatVal, Register64::Invalid(), ptr, ptrScratch, tmp);
+                                     Register memoryBase, Register ptr, Register ptrScratch,
+                                     Register tmp)
+{
+    wasmUnalignedStoreImpl(access, floatVal, Register64::Invalid(), memoryBase, ptr, ptrScratch, tmp);
 }
 
 void
 MacroAssembler::wasmUnalignedStoreI64(const wasm::MemoryAccessDesc& access, Register64 val64,
-                                      Register ptr, Register ptrScratch, Register tmp)
-{
-    wasmUnalignedStoreImpl(access, FloatRegister(), val64, ptr, ptrScratch, tmp);
+                                      Register memoryBase, Register ptr, Register ptrScratch,
+                                      Register tmp)
+{
+    wasmUnalignedStoreImpl(access, FloatRegister(), val64, memoryBase, ptr, ptrScratch, tmp);
 }
 
 //}}} check_macroassembler_style
 
 void
 MacroAssemblerARM::wasmTruncateToInt32(FloatRegister input, Register output, MIRType fromType,
                                        bool isUnsigned, Label* oolEntry)
 {
@@ -5655,18 +5659,19 @@ MacroAssemblerARM::outOfLineWasmTruncate
                                  asMasm().framePushed()));
 
     bind(&inputIsNaN);
     asMasm().jump(wasm::TrapDesc(trapOffset, wasm::Trap::InvalidConversionToInteger,
                                  asMasm().framePushed()));
 }
 
 void
-MacroAssemblerARM::wasmLoadImpl(const wasm::MemoryAccessDesc& access, Register ptr,
-                                Register ptrScratch, AnyRegister output, Register64 out64)
+MacroAssemblerARM::wasmLoadImpl(const wasm::MemoryAccessDesc& access, Register memoryBase,
+                                Register ptr, Register ptrScratch, AnyRegister output,
+                                Register64 out64)
 {
     MOZ_ASSERT(ptr == ptrScratch);
 
     uint32_t offset = access.offset();
     MOZ_ASSERT(offset < wasm::OffsetGuardLimit);
 
     Scalar::Type type = access.type();
 
@@ -5684,53 +5689,54 @@ MacroAssemblerARM::wasmLoadImpl(const wa
     asMasm().memoryBarrier(access.barrierBefore());
 
     uint32_t framePushed = asMasm().framePushed();
     BufferOffset load;
     if (out64 != Register64::Invalid()) {
         if (type == Scalar::Int64) {
             MOZ_ASSERT(INT64LOW_OFFSET == 0);
 
-            load = ma_dataTransferN(IsLoad, 32, /* signed = */ false, HeapReg, ptr, out64.low);
+            load = ma_dataTransferN(IsLoad, 32, /* signed = */ false, memoryBase, ptr, out64.low);
             append(access, load.getOffset(), framePushed);
 
             as_add(ptr, ptr, Imm8(INT64HIGH_OFFSET));
 
-            load = ma_dataTransferN(IsLoad, 32, isSigned, HeapReg, ptr, out64.high);
+            load = ma_dataTransferN(IsLoad, 32, isSigned, memoryBase, ptr, out64.high);
             append(access, load.getOffset(), framePushed);
         } else {
-            load = ma_dataTransferN(IsLoad, byteSize * 8, isSigned, HeapReg, ptr, out64.low);
+            load = ma_dataTransferN(IsLoad, byteSize * 8, isSigned, memoryBase, ptr, out64.low);
             append(access, load.getOffset(), framePushed);
 
             if (isSigned)
                 ma_asr(Imm32(31), out64.low, out64.high);
             else
                 ma_mov(Imm32(0), out64.high);
         }
     } else {
         bool isFloat = output.isFloat();
         if (isFloat) {
             MOZ_ASSERT((byteSize == 4) == output.fpu().isSingle());
             ScratchRegisterScope scratch(asMasm());
-            ma_add(HeapReg, ptr, scratch);
+            ma_add(memoryBase, ptr, scratch);
 
             load = ma_vldr(Operand(Address(scratch, 0)).toVFPAddr(), output.fpu());
             append(access, load.getOffset(), framePushed);
         } else {
-            load = ma_dataTransferN(IsLoad, byteSize * 8, isSigned, HeapReg, ptr, output.gpr());
+            load = ma_dataTransferN(IsLoad, byteSize * 8, isSigned, memoryBase, ptr, output.gpr());
             append(access, load.getOffset(), framePushed);
         }
     }
 
     asMasm().memoryBarrier(access.barrierAfter());
 }
 
 void
 MacroAssemblerARM::wasmStoreImpl(const wasm::MemoryAccessDesc& access, AnyRegister value,
-                                 Register64 val64, Register ptr, Register ptrScratch)
+                                 Register64 val64, Register memoryBase, Register ptr,
+                                 Register ptrScratch)
 {
     MOZ_ASSERT(ptr == ptrScratch);
 
     uint32_t offset = access.offset();
     MOZ_ASSERT(offset < wasm::OffsetGuardLimit);
 
     unsigned byteSize = access.byteSize();
     Scalar::Type type = access.type();
@@ -5745,48 +5751,52 @@ MacroAssemblerARM::wasmStoreImpl(const w
     asMasm().memoryBarrier(access.barrierBefore());
 
     uint32_t framePushed = asMasm().framePushed();
 
     BufferOffset store;
     if (type == Scalar::Int64) {
         MOZ_ASSERT(INT64LOW_OFFSET == 0);
 
-        store = ma_dataTransferN(IsStore, 32 /* bits */, /* signed */ false, HeapReg, ptr, val64.low);
+        store = ma_dataTransferN(IsStore, 32 /* bits */, /* signed */ false, memoryBase, ptr,
+                                 val64.low);
         append(access, store.getOffset(), framePushed);
 
         as_add(ptr, ptr, Imm8(INT64HIGH_OFFSET));
 
-        store = ma_dataTransferN(IsStore, 32 /* bits */, /* signed */ true, HeapReg, ptr, val64.high);
+        store = ma_dataTransferN(IsStore, 32 /* bits */, /* signed */ true, memoryBase, ptr,
+                                 val64.high);
         append(access, store.getOffset(), framePushed);
     } else {
         if (value.isFloat()) {
             ScratchRegisterScope scratch(asMasm());
             FloatRegister val = value.fpu();
             MOZ_ASSERT((byteSize == 4) == val.isSingle());
-            ma_add(HeapReg, ptr, scratch);
+            ma_add(memoryBase, ptr, scratch);
 
             store = ma_vstr(val, Operand(Address(scratch, 0)).toVFPAddr());
             append(access, store.getOffset(), framePushed);
         } else {
             bool isSigned = type == Scalar::Uint32 || type == Scalar::Int32; // see AsmJSStoreHeap;
             Register val = value.gpr();
 
-            store = ma_dataTransferN(IsStore, 8 * byteSize /* bits */, isSigned, HeapReg, ptr, val);
+            store = ma_dataTransferN(IsStore, 8 * byteSize /* bits */, isSigned, memoryBase, ptr,
+                                     val);
             append(access, store.getOffset(), framePushed);
         }
     }
 
     asMasm().memoryBarrier(access.barrierAfter());
 }
 
 void
-MacroAssemblerARM::wasmUnalignedLoadImpl(const wasm::MemoryAccessDesc& access, Register ptr,
-                                         Register ptrScratch, AnyRegister outAny, Register64 out64,
-                                         Register tmp, Register tmp2, Register tmp3)
+MacroAssemblerARM::wasmUnalignedLoadImpl(const wasm::MemoryAccessDesc& access, Register memoryBase,
+                                         Register ptr, Register ptrScratch, AnyRegister outAny,
+                                         Register64 out64, Register tmp, Register tmp2,
+                                         Register tmp3)
 {
     MOZ_ASSERT(ptr == ptrScratch);
     MOZ_ASSERT_IF(access.type() != Scalar::Float32 && access.type() != Scalar::Float64,
                   tmp2 == Register::Invalid() && tmp3 == Register::Invalid());
     MOZ_ASSERT_IF(access.type() == Scalar::Float32,
                   tmp2 != Register::Invalid() && tmp3 == Register::Invalid());
     MOZ_ASSERT_IF(access.type() == Scalar::Float64,
                   tmp2 != Register::Invalid() && tmp3 != Register::Invalid());
@@ -5794,18 +5804,18 @@ MacroAssemblerARM::wasmUnalignedLoadImpl
     uint32_t offset = access.offset();
     MOZ_ASSERT(offset < wasm::OffsetGuardLimit);
 
     if (offset) {
         ScratchRegisterScope scratch(asMasm());
         ma_add(Imm32(offset), ptr, scratch);
     }
 
-    // Add HeapReg to ptr, so we can use base+index addressing in the byte loads.
-    ma_add(HeapReg, ptr);
+    // Add memoryBase to ptr, so we can use base+index addressing in the byte loads.
+    ma_add(memoryBase, ptr);
 
     unsigned byteSize = access.byteSize();
     Scalar::Type type = access.type();
     bool isSigned = type == Scalar::Int8 || type == Scalar::Int16 || type == Scalar::Int32 ||
                     type == Scalar::Int64;
 
     Register low;
     if (out64 != Register64::Invalid())
@@ -5848,35 +5858,36 @@ MacroAssemblerARM::wasmUnalignedLoadImpl
         }
     }
 
     asMasm().memoryBarrier(access.barrierAfter());
 }
 
 void
 MacroAssemblerARM::wasmUnalignedStoreImpl(const wasm::MemoryAccessDesc& access, FloatRegister floatValue,
-                                          Register64 val64, Register ptr, Register ptrScratch, Register tmp)
+                                          Register64 val64, Register memoryBase, Register ptr,
+                                          Register ptrScratch, Register tmp)
 {
     MOZ_ASSERT(ptr == ptrScratch);
     // They can't both be valid, but they can both be invalid.
     MOZ_ASSERT_IF(!floatValue.isInvalid(), val64 == Register64::Invalid());
     MOZ_ASSERT_IF(val64 != Register64::Invalid(), floatValue.isInvalid());
 
     uint32_t offset = access.offset();
     MOZ_ASSERT(offset < wasm::OffsetGuardLimit);
 
     unsigned byteSize = access.byteSize();
 
     if (offset) {
         ScratchRegisterScope scratch(asMasm());
         ma_add(Imm32(offset), ptr, scratch);
     }
 
-    // Add HeapReg to ptr, so we can use base+index addressing in the byte loads.
-    ma_add(HeapReg, ptr);
+    // Add memoryBase to ptr, so we can use base+index addressing in the byte loads.
+    ma_add(memoryBase, ptr);
 
     asMasm().memoryBarrier(access.barrierBefore());
 
     if (val64 != Register64::Invalid()) {
         if (val64.low != tmp)
             ma_mov(val64.low, tmp);
     } else if (!floatValue.isInvalid()) {
         ma_vxfer(floatValue, tmp);
@@ -5897,18 +5908,18 @@ MacroAssemblerARM::wasmUnalignedStoreImp
         }
         emitUnalignedStore(4, ptr, tmp, /* offset */ 4);
     }
 
     asMasm().memoryBarrier(access.barrierAfter());
 }
 
 void
-MacroAssemblerARM::emitUnalignedLoad(bool isSigned, unsigned byteSize, Register ptr, Register tmp,
-                                     Register dest, unsigned offset)
+MacroAssemblerARM::emitUnalignedLoad(bool isSigned, unsigned byteSize, Register ptr,
+                                     Register tmp, Register dest, unsigned offset)
 {
     // Preconditions.
     MOZ_ASSERT(ptr != tmp);
     MOZ_ASSERT(ptr != dest);
     MOZ_ASSERT(tmp != dest);
     MOZ_ASSERT(byteSize <= 4);
 
     ScratchRegisterScope scratch(asMasm());
--- a/js/src/jit/arm/MacroAssembler-arm.h
+++ b/js/src/jit/arm/MacroAssembler-arm.h
@@ -451,34 +451,35 @@ class MacroAssemblerARM : public Assembl
         if (mode == DB) {
             return transferMultipleByRunsImpl
                 <FloatRegisterBackwardIterator>(set, ls, rm, mode, -1);
         }
         MOZ_CRASH("Invalid data transfer addressing mode");
     }
 
     // `outAny` is valid if and only if `out64` == Register64::Invalid().
-    void wasmLoadImpl(const wasm::MemoryAccessDesc& access, Register ptr, Register ptrScratch,
-                      AnyRegister outAny, Register64 out64);
+    void wasmLoadImpl(const wasm::MemoryAccessDesc& access, Register memoryBase, Register ptr,
+                      Register ptrScratch, AnyRegister outAny, Register64 out64);
 
     // `valAny` is valid if and only if `val64` == Register64::Invalid().
     void wasmStoreImpl(const wasm::MemoryAccessDesc& access, AnyRegister valAny, Register64 val64,
-                       Register ptr, Register ptrScratch);
+                       Register memoryBase, Register ptr, Register ptrScratch);
 
   protected:
     // `outAny` is valid if and only if `out64` == Register64::Invalid().
-    void wasmUnalignedLoadImpl(const wasm::MemoryAccessDesc& access, Register ptr, Register ptrScratch,
-                               AnyRegister outAny, Register64 out64, Register tmp1, Register tmp2,
-                               Register tmp3);
+    void wasmUnalignedLoadImpl(const wasm::MemoryAccessDesc& access, Register memoryBase,
+                               Register ptr, Register ptrScratch, AnyRegister outAny,
+                               Register64 out64, Register tmp1, Register tmp2, Register tmp3);
 
     // The value to be stored is in `floatValue` (if not invalid), `val64` (if not invalid),
     // or in `valOrTmp` (if `floatValue` and `val64` are both invalid).  Note `valOrTmp` must
     // always be valid.
     void wasmUnalignedStoreImpl(const wasm::MemoryAccessDesc& access, FloatRegister floatValue,
-                                Register64 val64, Register ptr, Register ptrScratch, Register valOrTmp);
+                                Register64 val64, Register memoryBase, Register ptr,
+                                Register ptrScratch, Register valOrTmp);
 
   private:
     // Loads `byteSize` bytes, byte by byte, by reading from ptr[offset],
     // applying the indicated signedness (defined by isSigned).
     // - all three registers must be different.
     // - tmp and dest will get clobbered, ptr will remain intact.
     // - byteSize can be up to 4 bytes and no more (GPR are 32 bits on ARM).
     void emitUnalignedLoad(bool isSigned, unsigned byteSize, Register ptr, Register tmp,
--- a/js/src/wasm/WasmBaselineCompile.cpp
+++ b/js/src/wasm/WasmBaselineCompile.cpp
@@ -3476,33 +3476,34 @@ class BaseCompiler
 
             if (byteRegConflict)
                 masm.mov(ScratchRegX86, dest.i32());
         }
 #elif defined(JS_CODEGEN_ARM)
         if (IsUnaligned(*access)) {
             switch (dest.tag) {
               case AnyReg::I64:
-                masm.wasmUnalignedLoadI64(*access, ptr, ptr, dest.i64(), tmp1);
+                masm.wasmUnalignedLoadI64(*access, HeapReg, ptr, ptr, dest.i64(), tmp1);
                 break;
               case AnyReg::F32:
-                masm.wasmUnalignedLoadFP(*access, ptr, ptr, dest.f32(), tmp1, tmp2, Register::Invalid());
+                masm.wasmUnalignedLoadFP(*access, HeapReg, ptr, ptr, dest.f32(), tmp1, tmp2,
+                                         Register::Invalid());
                 break;
               case AnyReg::F64:
-                masm.wasmUnalignedLoadFP(*access, ptr, ptr, dest.f64(), tmp1, tmp2, tmp3);
+                masm.wasmUnalignedLoadFP(*access, HeapReg, ptr, ptr, dest.f64(), tmp1, tmp2, tmp3);
                 break;
               default:
-                masm.wasmUnalignedLoad(*access, ptr, ptr, dest.i32(), tmp1);
+                masm.wasmUnalignedLoad(*access, HeapReg, ptr, ptr, dest.i32(), tmp1);
                 break;
             }
         } else {
             if (dest.tag == AnyReg::I64)
-                masm.wasmLoadI64(*access, ptr, ptr, dest.i64());
+                masm.wasmLoadI64(*access, HeapReg, ptr, ptr, dest.i64());
             else
-                masm.wasmLoad(*access, ptr, ptr, dest.any());
+                masm.wasmLoad(*access, HeapReg, ptr, ptr, dest.any());
         }
 #else
         MOZ_CRASH("BaseCompiler platform hook: load");
 #endif
 
         return true;
     }
 
@@ -3569,37 +3570,37 @@ class BaseCompiler
             }
 
             masm.wasmStore(*access, value, dstAddr);
         }
 #elif defined(JS_CODEGEN_ARM)
         if (IsUnaligned(*access)) {
             switch (src.tag) {
               case AnyReg::I64:
-                masm.wasmUnalignedStoreI64(*access, src.i64(), ptr, ptr, tmp);
+                masm.wasmUnalignedStoreI64(*access, src.i64(), HeapReg, ptr, ptr, tmp);
                 break;
               case AnyReg::F32:
-                masm.wasmUnalignedStoreFP(*access, src.f32(), ptr, ptr, tmp);
+                masm.wasmUnalignedStoreFP(*access, src.f32(), HeapReg, ptr, ptr, tmp);
                 break;
               case AnyReg::F64:
-                masm.wasmUnalignedStoreFP(*access, src.f64(), ptr, ptr, tmp);
+                masm.wasmUnalignedStoreFP(*access, src.f64(), HeapReg, ptr, ptr, tmp);
                 break;
               default:
                 MOZ_ASSERT(tmp == Register::Invalid());
-                masm.wasmUnalignedStore(*access, src.i32(), ptr, ptr);
+                masm.wasmUnalignedStore(*access, src.i32(), HeapReg, ptr, ptr);
                 break;
             }
         } else {
             MOZ_ASSERT(tmp == Register::Invalid());
             if (access->type() == Scalar::Int64)
-                masm.wasmStoreI64(*access, src.i64(), ptr, ptr);
+                masm.wasmStoreI64(*access, src.i64(), HeapReg, ptr, ptr);
             else if (src.tag == AnyReg::I64)
-                masm.wasmStore(*access, AnyRegister(src.i64().low), ptr, ptr);
+                masm.wasmStore(*access, AnyRegister(src.i64().low), HeapReg, ptr, ptr);
             else
-                masm.wasmStore(*access, src.any(), ptr, ptr);
+                masm.wasmStore(*access, src.any(), HeapReg, ptr, ptr);
         }
 #else
         MOZ_CRASH("BaseCompiler platform hook: store");
 #endif
 
         return true;
     }