Bug 488639 - SPARC jit: testIntOverflow, testIntUnderflow failed. r=gal.
authorLeon Sha<leon.sha@sun.com>
Wed, 22 Apr 2009 16:06:45 +0800
changeset 27640 6684da21fb121e41c40929b67635129489770f96
parent 27639 eb2406a72609d946ffb14e34ccf22e7f253e50f4
child 27641 faf08a026ab860300c7e603934925a8ac612ee2f
push id6664
push userrsayre@mozilla.com
push dateWed, 22 Apr 2009 17:56:08 +0000
treeherdermozilla-central@ddd5fcb96d72 [default view] [failures only]
perfherder[talos] [build metrics] [platform microbench] (compared to previous push)
reviewersgal
bugs488639
milestone1.9.2a1pre
Bug 488639 - SPARC jit: testIntOverflow, testIntUnderflow failed. r=gal.
js/src/nanojit/NativeSparc.cpp
js/src/nanojit/NativeSparc.h
--- a/js/src/nanojit/NativeSparc.cpp
+++ b/js/src/nanojit/NativeSparc.cpp
@@ -684,19 +684,19 @@ namespace nanojit
         // else, rA already has a register assigned.
 
         if (forceReg)
             {
                 if (lhs == rhs)
                     rb = ra;
 
                 if (op == LIR_add || op == LIR_addp)
-                    ADD(rr, rb, rr);
+                    ADDCC(rr, rb, rr);
                 else if (op == LIR_sub)
-                    SUB(rr, rb, rr);
+                    SUBCC(rr, rb, rr);
                 else if (op == LIR_mul)
                     MULX(rr, rb, rr);
                 else if (op == LIR_and)
                     AND(rr, rb, rr);
                 else if (op == LIR_or)
                     OR(rr, rb, rr);
                 else if (op == LIR_xor)
                     XOR(rr, rb, rr);
@@ -708,19 +708,19 @@ namespace nanojit
                     SRL(rr, rb, rr);
                 else
                     NanoAssertMsg(0, "Unsupported");
             }
         else
             {
                 int c = rhs->constval();
                 if (op == LIR_add || op == LIR_addp) {
-                    ADD(rr, L0, rr); 
+                    ADDCC(rr, L0, rr); 
                 } else if (op == LIR_sub) {
-                    SUB(rr, L0, rr); 
+                    SUBCC(rr, L0, rr); 
                 } else if (op == LIR_and)
                     AND(rr, L0, rr);
                 else if (op == LIR_or)
                     OR(rr, L0, rr);
                 else if (op == LIR_xor)
                     XOR(rr, L0, rr);
                 else if (op == LIR_lsh)
                     SLL(rr, L0, rr);
--- a/js/src/nanojit/NativeSparc.h
+++ b/js/src/nanojit/NativeSparc.h
@@ -284,16 +284,22 @@ namespace nanojit
     Format_3(2, rd, op3, rs1 << 14 | 1 << 13 | (cc1 & 0x1) << 12 | (cc0 & 0x1) << 11 | (swap_trap & 0x7F))
 
 #define Format_4_4(rd, op3, rs1, rcond, opf_low, rs2) \
     Format_3(2, rd, op3, rs1 << 14 | (rcond & 0x7) << 10 | (opf_low & 0x1F) << 5 | rs2)
 
 #define Format_4_5(rd, op3, cond, opf_cc, opf_low, rs2) \
     Format_3(2, rd, op3, (cond & 0xF) << 14 | (opf_cc & 0x7) << 11 | (opf_low & 0x3F) << 5 | rs2)
 
+#define ADDCC(rs1, rs2, rd) \
+    do { \
+    asm_output("addcc %s, %s, %s", gpn(rs1), gpn(rs2), gpn(rd)); \
+    Format_3_1(2, rd, 0x10, rs1, 0, rs2); \
+    } while (0)
+
 #define ADD(rs1, rs2, rd) \
     do { \
     asm_output("add %s, %s, %s", gpn(rs1), gpn(rs2), gpn(rd)); \
     Format_3_1(2, rd, 0, rs1, 0, rs2); \
     } while (0)
 
 #define AND(rs1, rs2, rd) \
     do { \