Bug 512409 - nanojit support for Windows x64. r=dvander
authorMakoto Kato <m_kato@ga2.so-net.ne.jp>
Mon, 28 Sep 2009 18:16:41 +0900
changeset 33539 54bc1f6a31efc8c6f5cc8e63d76566955738f3a6
parent 33538 d4f8378c0d6e4d101fd8fb9d006da24a44517800
child 33540 920bc62ca39c80d96a937dc5bfa29fbb7d4444c3
push id9581
push userrsayre@mozilla.com
push dateWed, 07 Oct 2009 06:47:58 +0000
treeherdermozilla-central@eb8a5ea7468c [default view] [failures only]
perfherder[talos] [build metrics] [platform microbench] (compared to previous push)
reviewersdvander
bugs512409
milestone1.9.3a1pre
Bug 512409 - nanojit support for Windows x64. r=dvander
js/src/nanojit/NativeX64.cpp
--- a/js/src/nanojit/NativeX64.cpp
+++ b/js/src/nanojit/NativeX64.cpp
@@ -65,17 +65,17 @@ tracing
 - asm_qhi
 - nFragExit
 
 */
 
 namespace nanojit
 {
     const Register Assembler::retRegs[] = { RAX };
-#ifdef _MSC_VER
+#ifdef _WIN64
     const Register Assembler::argRegs[] = { RCX, RDX, R8, R9 };
     const Register Assembler::savedRegs[] = { RBX, RSI, RDI, R12, R13, R14, R15 };
 #else
     const Register Assembler::argRegs[] = { RDI, RSI, RDX, RCX, R8, R9 };
     const Register Assembler::savedRegs[] = { RBX, R12, R13, R14, R15 };
 #endif
 
     const char *regNames[] = {
@@ -583,33 +583,33 @@ namespace nanojit
         } else {
             // Indirect call: we assign the address arg to RAX since it's not
             // used for regular arguments, and is otherwise scratch since it's
             // clobberred by the call.
             asm_regarg(ARGSIZE_P, ins->arg(--argc), RAX);
             emit(X64_callrax);
         }
 
-    #ifdef _MSC_VER
+    #ifdef _WIN64
         int stk_used = 32; // always reserve 32byte shadow area
     #else
         int stk_used = 0;
         Register fr = XMM0;
     #endif
         int arg_index = 0;
         for (int i = 0; i < argc; i++) {
             int j = argc - i - 1;
             ArgSize sz = sizes[j];
             LIns* arg = ins->arg(j);
             if ((sz & ARGSIZE_MASK_INT) && arg_index < NumArgRegs) {
                 // gp arg
                 asm_regarg(sz, arg, argRegs[arg_index]);
                 arg_index++;
             }
-        #ifdef _MSC_VER
+        #ifdef _WIN64
             else if (sz == ARGSIZE_F && arg_index < NumArgRegs) {
                 // double goes in XMM reg # based on overall arg_index
                 asm_regarg(sz, arg, Register(XMM0+arg_index));
                 arg_index++;
             }
         #else
             else if (sz == ARGSIZE_F && fr < XMM8) {
                 // double goes in next available XMM register
@@ -1148,18 +1148,18 @@ namespace nanojit
         return prepResultReg(ins, rmask(XMM0));
     }
 
     void Assembler::asm_param(LIns *ins) {
         uint32_t a = ins->paramArg();
         uint32_t kind = ins->paramKind();
         if (kind == 0) {
             // ordinary param
-            // first six args always in registers for mac x64
-            if (a < 6) {
+            // first four or six args always in registers for x86_64 ABI
+            if (a < NumArgRegs) {
                 // incoming arg in register
                 prepResultReg(ins, rmask(argRegs[a]));
             } else {
                 // todo: support stack based args, arg 0 is at [FP+off] where off
                 // is the # of regs to be pushed in genProlog()
                 TODO(asm_param_stk);
             }
         }
@@ -1276,17 +1276,17 @@ namespace nanojit
         emit(X64_ret);
         emitr(X64_popr, RBP);
         return _nIns;
     }
 
     void Assembler::nRegisterResetAll(RegAlloc &a) {
         // add scratch registers to our free list for the allocator
         a.clear();
-#ifdef _MSC_VER
+#ifdef _WIN64
         a.free = 0x001fffcf; // rax-rbx, rsi, rdi, r8-r15, xmm0-xmm5
 #else
         a.free = 0xffffffff & ~(1<<RSP | 1<<RBP);
 #endif
         debug_only( a.managed = a.free; )
     }
 
     void Assembler::nPatchBranch(NIns *patch, NIns *target) {
@@ -1311,17 +1311,17 @@ namespace nanojit
             next += 6;
             NanoAssert(((int32_t*)next)[-1] == 0);
             NanoAssert(isS32(target - next));
             ((int32_t*)next)[-1] = int32_t(target - next);
         }
     }
 
     Register Assembler::nRegisterAllocFromSet(RegisterMask set) {
-    #if defined _WIN64
+    #if defined _MSC_VER
         DWORD tr;
         _BitScanForward(&tr, set);
         _allocator.free &= ~rmask((Register)tr);
         return (Register) tr;
     #else
         // gcc asm syntax
         Register r;
         asm("bsf    %1, %%eax\n\t"