Bug 1096707 - SpiderMonkey: Use GvEv encodings for register-register instructions
authorDan Gohman <sunfish@mozilla.com>
Tue, 02 Dec 2014 08:26:27 -0800
changeset 218257 2fbdfbae0a6e23e255fabb70e65d8e593ae057b4
parent 218256 2e1da9ea1c9fd11839b180103a2a340f3abf5c2e
child 218258 051ae2716d4661ced877822d121a6979bc83b1bb
push id27925
push usercbook@mozilla.com
push dateWed, 03 Dec 2014 12:32:33 +0000
treeherdermozilla-central@59b7bf5d119d [default view] [failures only]
perfherder[talos] [build metrics] [platform microbench] (compared to previous push)
bugs1096707
milestone37.0a1
first release with
nightly linux32
nightly linux64
nightly mac
nightly win32
nightly win64
last release without
nightly linux32
nightly linux64
nightly mac
nightly win32
nightly win64
Bug 1096707 - SpiderMonkey: Use GvEv encodings for register-register instructions
js/src/jit/shared/BaseAssembler-x86-shared.h
--- a/js/src/jit/shared/BaseAssembler-x86-shared.h
+++ b/js/src/jit/shared/BaseAssembler-x86-shared.h
@@ -264,17 +264,17 @@ private:
         PRE_SSE_66                      = 0x66,
         OP_PUSH_Iz                      = 0x68,
         OP_IMUL_GvEvIz                  = 0x69,
         OP_GROUP1_EbIb                  = 0x80,
         OP_GROUP1_EvIz                  = 0x81,
         OP_GROUP1_EvIb                  = 0x83,
         OP_TEST_EbGb                    = 0x84,
         OP_TEST_EvGv                    = 0x85,
-        OP_XCHG_EvGv                    = 0x87,
+        OP_XCHG_GvEv                    = 0x87,
         OP_MOV_EbGv                     = 0x88,
         OP_MOV_EvGv                     = 0x89,
         OP_MOV_GvEb                     = 0x8A,
         OP_MOV_GvEv                     = 0x8B,
         OP_LEA                          = 0x8D,
         OP_GROUP1A_Ev                   = 0x8F,
         OP_NOP                          = 0x90,
         OP_PUSHFLAGS                    = 0x9C,
@@ -589,17 +589,17 @@ public:
             m_formatter.immediate32(imm);
         }
     }
 #endif
 
     void addl_rr(RegisterID src, RegisterID dst)
     {
         spew("addl       %s, %s", nameIReg(4,src), nameIReg(4,dst));
-        m_formatter.oneByteOp(OP_ADD_EvGv, src, dst);
+        m_formatter.oneByteOp(OP_ADD_GvEv, dst, src);
     }
 
     void addl_mr(int offset, RegisterID base, RegisterID dst)
     {
         spew("addl       %s0x%x(%s), %s",
              PRETTY_PRINT_OFFSET(offset), nameIReg(base), nameIReg(4,dst));
         m_formatter.oneByteOp(OP_ADD_GvEv, dst, base, offset);
     }
@@ -642,17 +642,17 @@ public:
             m_formatter.immediate32(imm);
         }
     }
 
 #ifdef JS_CODEGEN_X64
     void addq_rr(RegisterID src, RegisterID dst)
     {
         spew("addq       %s, %s", nameIReg(8,src), nameIReg(8,dst));
-        m_formatter.oneByteOp64(OP_ADD_EvGv, src, dst);
+        m_formatter.oneByteOp64(OP_ADD_GvEv, dst, src);
     }
 
     void addq_mr(int offset, RegisterID base, RegisterID dst)
     {
         spew("addq       %s0x%x(%s), %s",
              PRETTY_PRINT_OFFSET(offset), nameIReg(8,base), nameIReg(8,dst));
         m_formatter.oneByteOp64(OP_ADD_GvEv, dst, base, offset);
     }
@@ -886,17 +886,17 @@ public:
     {
         spew("minps      %p, %s", address, nameFPReg(dst));
         m_formatter.twoByteOp(OP2_MINPS_VpsWps, (RegisterID)dst, address);
     }
 
     void andl_rr(RegisterID src, RegisterID dst)
     {
         spew("andl       %s, %s", nameIReg(4,src), nameIReg(4,dst));
-        m_formatter.oneByteOp(OP_AND_EvGv, src, dst);
+        m_formatter.oneByteOp(OP_AND_GvEv, dst, src);
     }
 
     void andl_mr(int offset, RegisterID base, RegisterID dst)
     {
         spew("andl       %s0x%x(%s), %s",
              PRETTY_PRINT_OFFSET(offset), nameIReg(base), nameIReg(4,dst));
         m_formatter.oneByteOp(OP_AND_GvEv, dst, base, offset);
     }
@@ -932,17 +932,17 @@ public:
             m_formatter.immediate32(imm);
         }
     }
 
 #ifdef JS_CODEGEN_X64
     void andq_rr(RegisterID src, RegisterID dst)
     {
         spew("andq       %s, %s", nameIReg(8,src), nameIReg(8,dst));
-        m_formatter.oneByteOp64(OP_AND_EvGv, src, dst);
+        m_formatter.oneByteOp64(OP_AND_GvEv, dst, src);
     }
 
     void andq_mr(int offset, RegisterID base, RegisterID dst)
     {
         spew("andq       %s0x%x(%s), %s",
              PRETTY_PRINT_OFFSET(offset), nameIReg(8,base), nameIReg(8,dst));
         m_formatter.oneByteOp64(OP_AND_GvEv, dst, base, offset);
     }
@@ -1047,17 +1047,17 @@ public:
     {
         FIXME_INSN_PRINTING;
         m_formatter.oneByteOp(OP_GROUP3_Ev, GROUP3_OP_NOT, base, offset);
     }
 
     void orl_rr(RegisterID src, RegisterID dst)
     {
         spew("orl        %s, %s", nameIReg(4,src), nameIReg(4,dst));
-        m_formatter.oneByteOp(OP_OR_EvGv, src, dst);
+        m_formatter.oneByteOp(OP_OR_GvEv, dst, src);
     }
 
     void orl_mr(int offset, RegisterID base, RegisterID dst)
     {
         spew("orl        %s0x%x(%s), %s",
              PRETTY_PRINT_OFFSET(offset), nameIReg(base), nameIReg(4,dst));
         m_formatter.oneByteOp(OP_OR_GvEv, dst, base, offset);
     }
@@ -1099,17 +1099,17 @@ public:
     {
         spew("negq       %s", nameIReg(8,dst));
         m_formatter.oneByteOp64(OP_GROUP3_Ev, GROUP3_OP_NEG, dst);
     }
 
     void orq_rr(RegisterID src, RegisterID dst)
     {
         spew("orq        %s, %s", nameIReg(8,src), nameIReg(8,dst));
-        m_formatter.oneByteOp64(OP_OR_EvGv, src, dst);
+        m_formatter.oneByteOp64(OP_OR_GvEv, dst, src);
     }
 
     void orq_ir(int imm, RegisterID dst)
     {
         spew("orq        $0x%x, %s", imm, nameIReg(8,dst));
         if (CAN_SIGN_EXTEND_8_32(imm)) {
             m_formatter.oneByteOp64(OP_GROUP1_EvIb, GROUP1_OP_OR, dst);
             m_formatter.immediate8(imm);
@@ -1136,17 +1136,17 @@ public:
             m_formatter.immediate32(imm);
         }
     }
 #endif
 
     void subl_rr(RegisterID src, RegisterID dst)
     {
         spew("subl       %s, %s", nameIReg(4,src), nameIReg(4,dst));
-        m_formatter.oneByteOp(OP_SUB_EvGv, src, dst);
+        m_formatter.oneByteOp(OP_SUB_GvEv, dst, src);
     }
 
     void subl_mr(int offset, RegisterID base, RegisterID dst)
     {
         spew("subl       %s0x%x(%s), %s",
              PRETTY_PRINT_OFFSET(offset), nameIReg(base), nameIReg(4,dst));
         m_formatter.oneByteOp(OP_SUB_GvEv, dst, base, offset);
     }
@@ -1182,17 +1182,17 @@ public:
             m_formatter.immediate32(imm);
         }
     }
 
 #ifdef JS_CODEGEN_X64
     void subq_rr(RegisterID src, RegisterID dst)
     {
         spew("subq       %s, %s", nameIReg(8,src), nameIReg(8,dst));
-        m_formatter.oneByteOp64(OP_SUB_EvGv, src, dst);
+        m_formatter.oneByteOp64(OP_SUB_GvEv, dst, src);
     }
 
     void subq_rm(RegisterID src, int offset, RegisterID base)
     {
         spew("subq       %s, %s0x%x(%s)",
              nameIReg(8,src), PRETTY_PRINT_OFFSET(offset), nameIReg(8,base));
         m_formatter.oneByteOp64(OP_SUB_EvGv, src, base, offset);
     }
@@ -1233,17 +1233,17 @@ public:
             m_formatter.immediate32(imm);
         }
     }
 #endif
 
     void xorl_rr(RegisterID src, RegisterID dst)
     {
         spew("xorl       %s, %s", nameIReg(4,src), nameIReg(4,dst));
-        m_formatter.oneByteOp(OP_XOR_EvGv, src, dst);
+        m_formatter.oneByteOp(OP_XOR_GvEv, dst, src);
     }
 
     void xorl_mr(int offset, RegisterID base, RegisterID dst)
     {
         spew("xorl       %s0x%x(%s), %s",
              PRETTY_PRINT_OFFSET(offset), nameIReg(base), nameIReg(4,dst));
         m_formatter.oneByteOp(OP_XOR_GvEv, dst, base, offset);
     }
@@ -1279,17 +1279,17 @@ public:
             m_formatter.immediate32(imm);
         }
     }
 
 #ifdef JS_CODEGEN_X64
     void xorq_rr(RegisterID src, RegisterID dst)
     {
         spew("xorq       %s, %s", nameIReg(8,src), nameIReg(8, dst));
-        m_formatter.oneByteOp64(OP_XOR_EvGv, src, dst);
+        m_formatter.oneByteOp64(OP_XOR_GvEv, dst, src);
     }
 
     void xorq_ir(int imm, RegisterID dst)
     {
         spew("xorq       $%d, %s", imm, nameIReg(8,dst));
         if (CAN_SIGN_EXTEND_8_32(imm)) {
             m_formatter.oneByteOp64(OP_GROUP1_EvIb, GROUP1_OP_XOR, dst);
             m_formatter.immediate8(imm);
@@ -1504,17 +1504,17 @@ public:
     }
 
 
     // Comparisons:
 
     void cmpl_rr(RegisterID src, RegisterID dst)
     {
         spew("cmpl       %s, %s", nameIReg(4, src), nameIReg(4, dst));
-        m_formatter.oneByteOp(OP_CMP_EvGv, src, dst);
+        m_formatter.oneByteOp(OP_CMP_GvEv, dst, src);
     }
 
     void cmpl_rm(RegisterID src, int offset, RegisterID base)
     {
         spew("cmpl       %s, %s0x%x(%s)",
              nameIReg(4, src), PRETTY_PRINT_OFFSET(offset), nameIReg(base));
         m_formatter.oneByteOp(OP_CMP_EvGv, src, base, offset);
     }
@@ -1595,17 +1595,17 @@ public:
         m_formatter.oneByteOp(OP_GROUP1_EvIz, GROUP1_OP_CMP, base, offset);
         m_formatter.immediate32(imm);
     }
 
 #ifdef JS_CODEGEN_X64
     void cmpq_rr(RegisterID src, RegisterID dst)
     {
         spew("cmpq       %s, %s", nameIReg(8, src), nameIReg(8, dst));
-        m_formatter.oneByteOp64(OP_CMP_EvGv, src, dst);
+        m_formatter.oneByteOp64(OP_CMP_GvEv, dst, src);
     }
 
     void cmpq_rm(RegisterID src, int offset, RegisterID base)
     {
         spew("cmpq       %s, %d(%s)", nameIReg(8, src), offset, nameIReg(8, base));
         m_formatter.oneByteOp64(OP_CMP_EvGv, src, base, offset);
     }
 
@@ -1696,17 +1696,17 @@ public:
             m_formatter.immediate32(imm);
         }
     }
 
     void cmpw_rr(RegisterID src, RegisterID dst)
     {
         spew("cmpw       %s, %s", nameIReg(2, src), nameIReg(2, dst));
         m_formatter.prefix(PRE_OPERAND_SIZE);
-        m_formatter.oneByteOp(OP_CMP_EvGv, src, dst);
+        m_formatter.oneByteOp(OP_CMP_GvEv, dst, src);
     }
 
     void cmpw_rm(RegisterID src, int offset, RegisterID base, RegisterID index, int scale)
     {
         FIXME_INSN_PRINTING;
         m_formatter.prefix(PRE_OPERAND_SIZE);
         m_formatter.oneByteOp(OP_CMP_EvGv, src, base, index, scale, offset);
     }
@@ -1883,31 +1883,31 @@ public:
     {
         spew("cdq        ");
         m_formatter.oneByteOp(OP_CDQ);
     }
 
     void xchgl_rr(RegisterID src, RegisterID dst)
     {
         spew("xchgl      %s, %s", nameIReg(4,src), nameIReg(4,dst));
-        m_formatter.oneByteOp(OP_XCHG_EvGv, src, dst);
+        m_formatter.oneByteOp(OP_XCHG_GvEv, dst, src);
     }
 
 #ifdef JS_CODEGEN_X64
     void xchgq_rr(RegisterID src, RegisterID dst)
     {
         spew("xchgq      %s, %s", nameIReg(8,src), nameIReg(8,dst));
-        m_formatter.oneByteOp64(OP_XCHG_EvGv, src, dst);
+        m_formatter.oneByteOp64(OP_XCHG_GvEv, dst, src);
     }
 #endif
 
     void movl_rr(RegisterID src, RegisterID dst)
     {
         spew("movl       %s, %s", nameIReg(4,src), nameIReg(4,dst));
-        m_formatter.oneByteOp(OP_MOV_EvGv, src, dst);
+        m_formatter.oneByteOp(OP_MOV_GvEv, dst, src);
     }
 
     void movw_rm(RegisterID src, int offset, RegisterID base)
     {
         spew("movw       %s, %s0x%x(%s)",
              nameIReg(2,src), PRETTY_PRINT_OFFSET(offset), nameIReg(base));
         m_formatter.prefix(PRE_OPERAND_SIZE);
         m_formatter.oneByteOp(OP_MOV_EvGv, src, base, offset);
@@ -2097,17 +2097,17 @@ public:
         m_formatter.immediate32(reinterpret_cast<int>(addr));
 #endif
     }
 
 #ifdef JS_CODEGEN_X64
     void movq_rr(RegisterID src, RegisterID dst)
     {
         spew("movq       %s, %s", nameIReg(8,src), nameIReg(8,dst));
-        m_formatter.oneByteOp64(OP_MOV_EvGv, src, dst);
+        m_formatter.oneByteOp64(OP_MOV_GvEv, dst, src);
     }
 
     void movq_rm(RegisterID src, int offset, RegisterID base)
     {
         spew("movq       %s, %s0x%x(%s)",
              nameIReg(8,src), PRETTY_PRINT_OFFSET(offset), nameIReg(base));
         m_formatter.oneByteOp64(OP_MOV_EvGv, src, base, offset);
     }