other-licenses/nsis/Contrib/UAC/resource.h
author Steve Snyder <swsnyder@snydernet.net>
Thu, 01 Oct 2009 14:19:41 -0400
changeset 33346 8a43f01f1d6478ad072c1f4a41fb633f8a5e3a32
parent 23964 ba15a84af7e6c364570feb7b5a66cea87ba460c8
permissions -rw-r--r--
Bug 512865. qcms: Improve SSE2 performance, add SSE support. r=jrmuizel This patch greatly improves the performance of QCMS transformations on x86 & x86_64 systems. Some notes: 0. On 32-bit x86 systems it does runtime selection between non-SIMD, SSE, and SSE2 code paths. 1. On x86_64 systems the SSE2 code path is always taken. The non-SIMD and SSE code paths are left intact, but contemporary versions of the GCC and MSVC compilers will see that they cannot be reached and optimize them away. 2. The execution of the SSE2 code path is reduced by 67%, relative to the original Intel/Microsoft formatted ASM code. The relative performance is seen on a Pentium4 (Northwood) 2.4GHz CPU with DDR1 RAM. 3. The SSE code path provides a 80% reduction in execution time, relative to the non-SIMD code path. The relative performance is seen on a Pentium3 (Coppermine) 1.26GHz CPU with SDRAM. 4. The code has been split out into separate files so that it can be built with different cflags (-msse, and -msse2) when using gcc. 5. Try to land again, this time with __attribute__((__force_align_arg_pointer__)) to avoid crashes on linux.

//{{NO_DEPENDENCIES}}
// Microsoft Developer Studio generated include file.
// Used by resource.rc
//
#define IDD_MYRUNAS                     101
#define IDC_RUNASCURR                   1000
#define IDC_RUNASSPEC                   1001
#define IDC_SHICON                      1002
#define IDC_HELPTEXT                    1003
#define IDC_USERNAME                    1004
#define IDC_PASSWORD                    1005
#define IDC_LBLUSER                     1007
#define IDC_LBLPWD                      1008

// Next default values for new objects
// 
#ifdef APSTUDIO_INVOKED
#ifndef APSTUDIO_READONLY_SYMBOLS
#define _APS_NEXT_RESOURCE_VALUE        102
#define _APS_NEXT_COMMAND_VALUE         40001
#define _APS_NEXT_CONTROL_VALUE         1009
#define _APS_NEXT_SYMED_VALUE           101
#endif
#endif