Bug 1393723 - Add definition of Assembler::FramePointer for mips32. r=lth
authorDragan Mladjenovic <dragan.mladjenovic@rt-rk.com>
Tue, 29 Aug 2017 00:48:00 -0400
changeset 377562 fdb95175a737
parent 377561 b71a2824c224
child 377563 6079341dccb2
push id94292
push userryanvm@gmail.com
push dateTue, 29 Aug 2017 18:45:26 +0000
treeherdermozilla-inbound@81cdf89896a3 [default view] [failures only]
perfherder[talos] [build metrics] [platform microbench] (compared to previous push)
reviewerslth
bugs1393723
milestone57.0a1
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Bug 1393723 - Add definition of Assembler::FramePointer for mips32. r=lth Also changes fp(s8) register to be calle saved for mips32 as per O32 calling convention.
js/src/jit/mips-shared/Architecture-mips-shared.h
js/src/jit/mips-shared/Assembler-mips-shared.h
js/src/jit/mips32/Trampoline-mips32.cpp
--- a/js/src/jit/mips-shared/Architecture-mips-shared.h
+++ b/js/src/jit/mips-shared/Architecture-mips-shared.h
@@ -177,33 +177,33 @@ class Registers
         (1 << Registers::s0) |
         (1 << Registers::s1) |
         (1 << Registers::s2) |
         (1 << Registers::s3) |
         (1 << Registers::s4) |
         (1 << Registers::s5) |
         (1 << Registers::s6) |
         (1 << Registers::s7) |
+        (1 << Registers::fp) |
         (1 << Registers::ra);
 
     static const SetType WrapperMask =
         VolatileMask |         // = arguments
         (1 << Registers::t0) | // = outReg
         (1 << Registers::t1);  // = argBase
 
     static const SetType NonAllocatableMask =
         (1 << Registers::zero) |
         (1 << Registers::at) | // at = scratch
         (1 << Registers::t8) | // t8 = scratch
         (1 << Registers::t9) | // t9 = scratch
         (1 << Registers::k0) |
         (1 << Registers::k1) |
         (1 << Registers::gp) |
         (1 << Registers::sp) |
-        (1 << Registers::fp) |
         (1 << Registers::ra);
 
     // Registers that can be allocated without being saved, generally.
     static const SetType TempMask = VolatileMask & ~NonAllocatableMask;
 
     // Registers returned from a JS -> JS call.
     static const SetType JSCallMask;
 
--- a/js/src/jit/mips-shared/Assembler-mips-shared.h
+++ b/js/src/jit/mips-shared/Assembler-mips-shared.h
@@ -98,17 +98,17 @@ static constexpr Register GlobalReg = s6
 static constexpr Register HeapReg = s7; // used by Odin
 
 static constexpr Register PreBarrierReg = a1;
 
 static constexpr Register InvalidReg { Registers::invalid_reg };
 static constexpr FloatRegister InvalidFloatReg;
 
 static constexpr Register StackPointer = sp;
-static constexpr Register FramePointer = InvalidReg;
+static constexpr Register FramePointer = fp;
 static constexpr Register ReturnReg = v0;
 static constexpr FloatRegister ReturnSimd128Reg = InvalidFloatReg;
 static constexpr FloatRegister ScratchSimd128Reg = InvalidFloatReg;
 
 // A bias applied to the GlobalReg to allow the use of instructions with small
 // negative immediate offsets which doubles the range of global data that can be
 // accessed with a single instruction.
 static const int32_t WasmGlobalRegBias = 32768;
--- a/js/src/jit/mips32/Trampoline-mips32.cpp
+++ b/js/src/jit/mips32/Trampoline-mips32.cpp
@@ -31,21 +31,19 @@ struct EnterJITRegs
 {
     double f30;
     double f28;
     double f26;
     double f24;
     double f22;
     double f20;
 
-    // empty slot for alignment
-    uintptr_t align;
-
     // non-volatile registers.
     uintptr_t ra;
+    uintptr_t fp;
     uintptr_t s7;
     uintptr_t s6;
     uintptr_t s5;
     uintptr_t s4;
     uintptr_t s3;
     uintptr_t s2;
     uintptr_t s1;
     uintptr_t s0;
@@ -75,16 +73,17 @@ GenerateReturn(MacroAssembler& masm, int
     masm.loadPtr(Address(StackPointer, offsetof(EnterJITRegs, s0)), s0);
     masm.loadPtr(Address(StackPointer, offsetof(EnterJITRegs, s1)), s1);
     masm.loadPtr(Address(StackPointer, offsetof(EnterJITRegs, s2)), s2);
     masm.loadPtr(Address(StackPointer, offsetof(EnterJITRegs, s3)), s3);
     masm.loadPtr(Address(StackPointer, offsetof(EnterJITRegs, s4)), s4);
     masm.loadPtr(Address(StackPointer, offsetof(EnterJITRegs, s5)), s5);
     masm.loadPtr(Address(StackPointer, offsetof(EnterJITRegs, s6)), s6);
     masm.loadPtr(Address(StackPointer, offsetof(EnterJITRegs, s7)), s7);
+    masm.loadPtr(Address(StackPointer, offsetof(EnterJITRegs, fp)), fp);
     masm.loadPtr(Address(StackPointer, offsetof(EnterJITRegs, ra)), ra);
 
     // Restore non-volatile floating point registers
     masm.loadDouble(Address(StackPointer, offsetof(EnterJITRegs, f20)), f20);
     masm.loadDouble(Address(StackPointer, offsetof(EnterJITRegs, f22)), f22);
     masm.loadDouble(Address(StackPointer, offsetof(EnterJITRegs, f24)), f24);
     masm.loadDouble(Address(StackPointer, offsetof(EnterJITRegs, f26)), f26);
     masm.loadDouble(Address(StackPointer, offsetof(EnterJITRegs, f28)), f28);
@@ -105,16 +104,17 @@ GeneratePrologue(MacroAssembler& masm)
     masm.storePtr(s0, Address(StackPointer, offsetof(EnterJITRegs, s0)));
     masm.storePtr(s1, Address(StackPointer, offsetof(EnterJITRegs, s1)));
     masm.storePtr(s2, Address(StackPointer, offsetof(EnterJITRegs, s2)));
     masm.storePtr(s3, Address(StackPointer, offsetof(EnterJITRegs, s3)));
     masm.storePtr(s4, Address(StackPointer, offsetof(EnterJITRegs, s4)));
     masm.storePtr(s5, Address(StackPointer, offsetof(EnterJITRegs, s5)));
     masm.storePtr(s6, Address(StackPointer, offsetof(EnterJITRegs, s6)));
     masm.storePtr(s7, Address(StackPointer, offsetof(EnterJITRegs, s7)));
+    masm.storePtr(fp, Address(StackPointer, offsetof(EnterJITRegs, fp)));
     masm.storePtr(ra, Address(StackPointer, offsetof(EnterJITRegs, ra)));
 
     masm.as_sd(f20, StackPointer, offsetof(EnterJITRegs, f20));
     masm.as_sd(f22, StackPointer, offsetof(EnterJITRegs, f22));
     masm.as_sd(f24, StackPointer, offsetof(EnterJITRegs, f24));
     masm.as_sd(f26, StackPointer, offsetof(EnterJITRegs, f26));
     masm.as_sd(f28, StackPointer, offsetof(EnterJITRegs, f28));
     masm.as_sd(f30, StackPointer, offsetof(EnterJITRegs, f30));