Bug 1391248 - Add mov*.s instruction support and missing redirection signatures to mips32 simulator. r=bbouvier
author"dragan.mladjenovic" <dragan.mladjenovic@rt-rk.com>
Thu, 24 Aug 2017 10:47:00 -0400
changeset 376604 e452433ec516
parent 376603 ee2061564115
child 376605 220bc56b5036
push id94132
push userryanvm@gmail.com
push dateThu, 24 Aug 2017 19:14:09 +0000
treeherdermozilla-inbound@3c6a4705b511 [default view] [failures only]
perfherder[talos] [build metrics] [platform microbench] (compared to previous push)
reviewersbbouvier
bugs1391248
milestone57.0a1
first release with
nightly linux32
nightly linux64
nightly mac
nightly win32
nightly win64
last release without
nightly linux32
nightly linux64
nightly mac
nightly win32
nightly win64
Bug 1391248 - Add mov*.s instruction support and missing redirection signatures to mips32 simulator. r=bbouvier
js/src/jit/mips32/Simulator-mips32.cpp
--- a/js/src/jit/mips32/Simulator-mips32.cpp
+++ b/js/src/jit/mips32/Simulator-mips32.cpp
@@ -1917,16 +1917,18 @@ typedef double (*Prototype_Double_None)(
 typedef double (*Prototype_Double_Double)(double arg0);
 typedef double (*Prototype_Double_Int)(int32_t arg0);
 typedef int32_t (*Prototype_Int_Double)(double arg0);
 typedef int64_t (*Prototype_Int64_Double)(double arg0);
 typedef int32_t (*Prototype_Int_DoubleIntInt)(double arg0, int32_t arg1, int32_t arg2);
 typedef int32_t (*Prototype_Int_IntDoubleIntInt)(int32_t arg0, double arg1, int32_t arg2,
                                                  int32_t arg3);
 typedef float (*Prototype_Float32_Float32)(float arg0);
+typedef float (*Prototype_Float32_Float32Float32)(float arg0, float arg1);
+typedef float (*Prototype_Float32_IntInt)(int arg0, int arg1);
 
 typedef double (*Prototype_DoubleInt)(double arg0, int32_t arg1);
 typedef double (*Prototype_Double_IntInt)(int32_t arg0, int32_t arg1);
 typedef double (*Prototype_Double_IntDouble)(int32_t arg0, double arg1);
 typedef double (*Prototype_Double_DoubleDouble)(double arg0, double arg1);
 typedef int32_t (*Prototype_Int_IntDouble)(int32_t arg0, double arg1);
 
 typedef double (*Prototype_Double_DoubleDoubleDouble)(double arg0, double arg1, double arg2);
@@ -2076,16 +2078,32 @@ Simulator::softwareInterrupt(SimInstruct
           case Args_Float32_Float32: {
             float fval0;
             fval0 = getFpuRegisterFloat(12);
             Prototype_Float32_Float32 target = reinterpret_cast<Prototype_Float32_Float32>(external);
             float fresult = target(fval0);
             setCallResultFloat(fresult);
             break;
           }
+          case Args_Float32_Float32Float32: {
+            float fval0;
+            float fval1;
+            fval0 = getFpuRegisterFloat(12);
+            fval1 = getFpuRegisterFloat(14);
+            Prototype_Float32_Float32Float32 target = reinterpret_cast<Prototype_Float32_Float32Float32>(external);
+            float fresult = target(fval0,fval1);
+            setCallResultFloat(fresult);
+            break;
+          }
+          case Args_Float32_IntInt: {
+            Prototype_Float32_IntInt target = reinterpret_cast<Prototype_Float32_IntInt>(external);
+            float fresult = target(arg0, arg1);
+            setCallResultFloat(fresult);
+            break;
+          }
           case Args_Double_Int: {
             Prototype_Double_Int target = reinterpret_cast<Prototype_Double_Int>(external);
             double dresult = target(arg0);
             setCallResultDouble(dresult);
             break;
           }
           case Args_Double_IntInt: {
             Prototype_Double_IntInt target = reinterpret_cast<Prototype_Double_IntInt>(external);
@@ -2582,17 +2600,16 @@ Simulator::decodeTypeRegister(SimInstruc
     // ---------- Execution.
     switch (op) {
       case op_cop1:
         switch (instr->rsFieldRaw()) {
           case rs_bc1:   // Branch on coprocessor condition.
             MOZ_CRASH();
             break;
           case rs_cfc1:
-            setRegister(rt_reg, alu_out);
           case rs_mfc1:
             setRegister(rt_reg, alu_out);
             break;
           case rs_mfhc1:
             MOZ_CRASH();
             break;
           case rs_ctc1:
             // At the moment only FCSR is supported.
@@ -2738,16 +2755,31 @@ Simulator::decodeTypeRegister(SimInstruc
               case ff_ceil_l_fmt:  // Mips32r2 instruction.
                 i64 = static_cast<int64_t>(std::ceil(fs_value));
                 setFpuRegisterFloat(fd_reg, i64);
                 break;
               case ff_cvt_ps_s:
               case ff_c_f_fmt:
                 MOZ_CRASH();
                 break;
+              case ff_movf_fmt:
+                if (testFCSRBit(fcsr_cc)) {
+                  setFpuRegisterFloat(fd_reg, getFpuRegisterFloat(fs_reg));
+                }
+                break;
+              case ff_movz_fmt:
+                if (rt == 0) {
+                  setFpuRegisterFloat(fd_reg, getFpuRegisterFloat(fs_reg));
+                }
+                break;
+              case ff_movn_fmt:
+                if (rt != 0) {
+                  setFpuRegisterFloat(fd_reg, getFpuRegisterFloat(fs_reg));
+                }
+                break;
               default:
                 MOZ_CRASH();
             }
             break;
           case rs_d:
             double dt_value, ds_value;
             ds_value = getFpuRegisterDouble(fs_reg);
             cc = instr->fcccValue();