Bug 1303689 - IonMonkey: MIPS: Implement popcnt32. r=arai
authorHeiher <r@hev.cc>
Wed, 21 Sep 2016 08:58:10 +0800
changeset 314555 9502a353f4dba3ff8f9be3496a7c46f21097093a
parent 314554 3e7561636a36d48241f73d4d826305f8a0cc1a0c
child 314556 dcebf2b98e14523c02905b82f03733086487a7fb
push id81929
push userr@hev.cc
push dateWed, 21 Sep 2016 00:58:32 +0000
treeherdermozilla-inbound@9502a353f4db [default view] [failures only]
perfherder[talos] [build metrics] [platform microbench] (compared to previous push)
reviewersarai
bugs1303689
milestone52.0a1
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Bug 1303689 - IonMonkey: MIPS: Implement popcnt32. r=arai --- js/src/jit/MacroAssembler.h | 3 ++- .../jit/mips-shared/CodeGenerator-mips-shared.cpp | 19 +------------------ .../mips-shared/MacroAssembler-mips-shared-inl.h | 22 ++++++++++++++++++++++ 3 files changed, 25 insertions(+), 19 deletions(-)
js/src/jit/MacroAssembler.h
js/src/jit/mips-shared/CodeGenerator-mips-shared.cpp
js/src/jit/mips-shared/MacroAssembler-mips-shared-inl.h
--- a/js/src/jit/MacroAssembler.h
+++ b/js/src/jit/MacroAssembler.h
@@ -916,17 +916,18 @@ class MacroAssembler : public MacroAssem
     inline void clz32(Register src, Register dest, bool knownNotZero) PER_SHARED_ARCH;
     inline void ctz32(Register src, Register dest, bool knownNotZero) PER_SHARED_ARCH;
 
     inline void clz64(Register64 src, Register dest) DEFINED_ON(x86, x64, arm);
     inline void ctz64(Register64 src, Register dest) DEFINED_ON(x86, x64, arm);
 
     // On x86_shared, temp may be Invalid only if the chip has the POPCNT instruction.
     // On ARM, temp may never be Invalid.
-    inline void popcnt32(Register src, Register dest, Register temp) DEFINED_ON(arm, x86_shared);
+    inline void popcnt32(Register src, Register dest, Register temp)
+        DEFINED_ON(arm, x86_shared, mips_shared);
 
     // temp may be invalid only if the chip has the POPCNT instruction.
     inline void popcnt64(Register64 src, Register64 dest, Register temp) DEFINED_ON(x86, x64, arm);
 
     // ===============================================================
     // Branch functions
 
     template <class L>
--- a/js/src/jit/mips-shared/CodeGenerator-mips-shared.cpp
+++ b/js/src/jit/mips-shared/CodeGenerator-mips-shared.cpp
@@ -850,36 +850,19 @@ CodeGeneratorMIPSShared::visitCtzI(LCtzI
     masm.ma_ctz(output, input);
 }
 
 void
 CodeGeneratorMIPSShared::visitPopcntI(LPopcntI* ins)
 {
     Register input = ToRegister(ins->input());
     Register output = ToRegister(ins->output());
-
-    // Equivalent to GCC output of mozilla::CountPopulation32()
     Register tmp = ToRegister(ins->temp());
 
-    masm.ma_move(output, input);
-    masm.ma_sra(tmp, input, Imm32(1));
-    masm.ma_and(tmp, Imm32(0x55555555));
-    masm.ma_subu(output, tmp);
-    masm.ma_sra(tmp, output, Imm32(2));
-    masm.ma_and(output, Imm32(0x33333333));
-    masm.ma_and(tmp, Imm32(0x33333333));
-    masm.ma_addu(output, tmp);
-    masm.ma_srl(tmp, output, Imm32(4));
-    masm.ma_addu(output, tmp);
-    masm.ma_and(output, Imm32(0xF0F0F0F));
-    masm.ma_sll(tmp, output, Imm32(8));
-    masm.ma_addu(output, tmp);
-    masm.ma_sll(tmp, output, Imm32(16));
-    masm.ma_addu(output, tmp);
-    masm.ma_sra(output, output, Imm32(24));
+    masm.popcnt32(input, output, tmp);
 }
 
 void
 CodeGeneratorMIPSShared::visitPowHalfD(LPowHalfD* ins)
 {
     FloatRegister input = ToFloatRegister(ins->input());
     FloatRegister output = ToFloatRegister(ins->output());
 
--- a/js/src/jit/mips-shared/MacroAssembler-mips-shared-inl.h
+++ b/js/src/jit/mips-shared/MacroAssembler-mips-shared-inl.h
@@ -404,16 +404,38 @@ MacroAssembler::clz32(Register src, Regi
 }
 
 void
 MacroAssembler::ctz32(Register src, Register dest, bool knownNotZero)
 {
     ma_ctz(dest, src);
 }
 
+void
+MacroAssembler::popcnt32(Register input,  Register output, Register tmp)
+{
+    // Equivalent to GCC output of mozilla::CountPopulation32()
+    ma_move(output, input);
+    ma_sra(tmp, input, Imm32(1));
+    ma_and(tmp, Imm32(0x55555555));
+    ma_subu(output, tmp);
+    ma_sra(tmp, output, Imm32(2));
+    ma_and(output, Imm32(0x33333333));
+    ma_and(tmp, Imm32(0x33333333));
+    ma_addu(output, tmp);
+    ma_srl(tmp, output, Imm32(4));
+    ma_addu(output, tmp);
+    ma_and(output, Imm32(0xF0F0F0F));
+    ma_sll(tmp, output, Imm32(8));
+    ma_addu(output, tmp);
+    ma_sll(tmp, output, Imm32(16));
+    ma_addu(output, tmp);
+    ma_sra(output, output, Imm32(24));
+}
+
 // ===============================================================
 // Branch functions
 
 template <class L>
 void
 MacroAssembler::branch32(Condition cond, Register lhs, Register rhs, L label)
 {
     ma_b(lhs, rhs, label, cond);