Backed out changeset 4be440083184 (bug 1313043)
authorCarsten "Tomcat" Book <cbook@mozilla.com>
Thu, 27 Oct 2016 14:38:10 +0200
changeset 319822 ea0c3bb88db2e96a0d43023b6fca7a0792a8c536
parent 319821 4be44008318449ec880e9d870281ec92612e6909
child 319823 3c5bff02eebd885997457c89706c02968fed23d7
push id20748
push userphilringnalda@gmail.com
push dateFri, 28 Oct 2016 03:39:55 +0000
treeherderfx-team@715360440695 [default view] [failures only]
perfherder[talos] [build metrics] [platform microbench] (compared to previous push)
bugs1313043
milestone52.0a1
backs out4be44008318449ec880e9d870281ec92612e6909
Backed out changeset 4be440083184 (bug 1313043)
js/src/jit/MacroAssembler.h
js/src/jit/arm64/MacroAssembler-arm64-inl.h
--- a/js/src/jit/MacroAssembler.h
+++ b/js/src/jit/MacroAssembler.h
@@ -728,17 +728,17 @@ class MacroAssembler : public MacroAssem
 
     inline void or32(Register src, Register dest) PER_SHARED_ARCH;
     inline void or32(Imm32 imm, Register dest) PER_SHARED_ARCH;
     inline void or32(Imm32 imm, const Address& dest) PER_SHARED_ARCH;
 
     inline void orPtr(Register src, Register dest) PER_ARCH;
     inline void orPtr(Imm32 imm, Register dest) PER_ARCH;
 
-    inline void and64(Register64 src, Register64 dest) PER_ARCH;
+    inline void and64(Register64 src, Register64 dest) DEFINED_ON(x86, x64, arm, mips32, mips64);
     inline void or64(Register64 src, Register64 dest) PER_ARCH;
     inline void xor64(Register64 src, Register64 dest) PER_ARCH;
 
     inline void xor32(Register src, Register dest) PER_SHARED_ARCH;
     inline void xor32(Imm32 imm, Register dest) PER_SHARED_ARCH;
 
     inline void xorPtr(Register src, Register dest) PER_ARCH;
     inline void xorPtr(Imm32 imm, Register dest) PER_ARCH;
@@ -780,17 +780,17 @@ class MacroAssembler : public MacroAssem
     inline void sub32(Imm32 imm, Register dest) PER_SHARED_ARCH;
 
     inline void subPtr(Register src, Register dest) PER_ARCH;
     inline void subPtr(Register src, const Address& dest) DEFINED_ON(mips_shared, arm, arm64, x86, x64);
     inline void subPtr(Imm32 imm, Register dest) PER_ARCH;
     inline void subPtr(ImmWord imm, Register dest) DEFINED_ON(x64);
     inline void subPtr(const Address& addr, Register dest) DEFINED_ON(mips_shared, arm, arm64, x86, x64);
 
-    inline void sub64(Register64 src, Register64 dest) PER_ARCH;
+    inline void sub64(Register64 src, Register64 dest) DEFINED_ON(x86, x64, arm, mips32, mips64);
     inline void sub64(Imm64 imm, Register64 dest) DEFINED_ON(x86, x64, arm, mips32, mips64);
     inline void sub64(const Operand& src, Register64 dest) DEFINED_ON(x64, mips64);
 
     inline void subFloat32(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH;
 
     inline void subDouble(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH;
 
     // On x86-shared, srcDest must be eax and edx will be clobbered.
@@ -800,17 +800,17 @@ class MacroAssembler : public MacroAssem
 
     inline void mul64(const Operand& src, const Register64& dest) DEFINED_ON(x64);
     inline void mul64(const Operand& src, const Register64& dest, const Register temp)
         DEFINED_ON(x64, mips64);
     inline void mul64(Imm64 imm, const Register64& dest) PER_ARCH;
     inline void mul64(Imm64 imm, const Register64& dest, const Register temp)
         DEFINED_ON(x86, x64, arm, mips32, mips64);
     inline void mul64(const Register64& src, const Register64& dest, const Register temp)
-        PER_ARCH;
+        DEFINED_ON(x86, x64, arm, mips32, mips64);
 
     inline void mulBy3(Register src, Register dest) PER_ARCH;
 
     inline void mulFloat32(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH;
     inline void mulDouble(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH;
 
     inline void mulDoublePtr(ImmPtr imm, Register temp, FloatRegister dest) DEFINED_ON(mips_shared, arm, arm64, x86, x64);
 
@@ -875,66 +875,72 @@ class MacroAssembler : public MacroAssem
 
     inline void lshiftPtr(Imm32 imm, Register dest) PER_ARCH;
     inline void rshiftPtr(Imm32 imm, Register dest) PER_ARCH;
     inline void rshiftPtr(Imm32 imm, Register src, Register dest) DEFINED_ON(arm64);
     inline void rshiftPtrArithmetic(Imm32 imm, Register dest) PER_ARCH;
 
     inline void lshift64(Imm32 imm, Register64 dest) PER_ARCH;
     inline void rshift64(Imm32 imm, Register64 dest) PER_ARCH;
-    inline void rshift64Arithmetic(Imm32 imm, Register64 dest) PER_ARCH;
+    inline void rshift64Arithmetic(Imm32 imm, Register64 dest)
+        DEFINED_ON(x86, x64, arm, mips32, mips64);
 
     // On x86_shared these have the constraint that shift must be in CL.
     inline void lshift32(Register shift, Register srcDest) PER_SHARED_ARCH;
     inline void rshift32(Register shift, Register srcDest) PER_SHARED_ARCH;
     inline void rshift32Arithmetic(Register shift, Register srcDest) PER_SHARED_ARCH;
 
-    inline void lshift64(Register shift, Register64 srcDest) PER_ARCH;
-    inline void rshift64(Register shift, Register64 srcDest) PER_ARCH;
-    inline void rshift64Arithmetic(Register shift, Register64 srcDest) PER_ARCH;
+    inline void lshift64(Register shift, Register64 srcDest)
+        DEFINED_ON(x86, x64, arm, mips32, mips64);
+    inline void rshift64(Register shift, Register64 srcDest)
+        DEFINED_ON(x86, x64, arm, mips32, mips64);
+    inline void rshift64Arithmetic(Register shift, Register64 srcDest)
+        DEFINED_ON(x86, x64, arm, mips32, mips64);
 
     // ===============================================================
     // Rotation functions
     // Note: - on x86 and x64 the count register must be in CL.
     //       - on x64 the temp register should be InvalidReg.
 
     inline void rotateLeft(Imm32 count, Register input, Register dest) PER_SHARED_ARCH;
     inline void rotateLeft(Register count, Register input, Register dest) PER_SHARED_ARCH;
     inline void rotateLeft64(Imm32 count, Register64 input, Register64 dest) DEFINED_ON(x64);
     inline void rotateLeft64(Register count, Register64 input, Register64 dest) DEFINED_ON(x64);
     inline void rotateLeft64(Imm32 count, Register64 input, Register64 dest, Register temp)
         DEFINED_ON(x86, x64, arm, mips32, mips64);
     inline void rotateLeft64(Register count, Register64 input, Register64 dest, Register temp)
-        PER_ARCH;
+        DEFINED_ON(x86, x64, arm, mips32, mips64);
 
     inline void rotateRight(Imm32 count, Register input, Register dest) PER_SHARED_ARCH;
     inline void rotateRight(Register count, Register input, Register dest) PER_SHARED_ARCH;
     inline void rotateRight64(Imm32 count, Register64 input, Register64 dest) DEFINED_ON(x64);
     inline void rotateRight64(Register count, Register64 input, Register64 dest) DEFINED_ON(x64);
     inline void rotateRight64(Imm32 count, Register64 input, Register64 dest, Register temp)
         DEFINED_ON(x86, x64, arm, mips32, mips64);
     inline void rotateRight64(Register count, Register64 input, Register64 dest, Register temp)
-        PER_ARCH;
+        DEFINED_ON(x86, x64, arm, mips32, mips64);
 
     // ===============================================================
     // Bit counting functions
 
     // knownNotZero may be true only if the src is known not to be zero.
     inline void clz32(Register src, Register dest, bool knownNotZero) PER_SHARED_ARCH;
     inline void ctz32(Register src, Register dest, bool knownNotZero) PER_SHARED_ARCH;
 
-    inline void clz64(Register64 src, Register dest) PER_ARCH;
-    inline void ctz64(Register64 src, Register dest) PER_ARCH;
+    inline void clz64(Register64 src, Register dest) DEFINED_ON(x86, x64, arm, mips32, mips64);
+    inline void ctz64(Register64 src, Register dest) DEFINED_ON(x86, x64, arm, mips32, mips64);
 
     // On x86_shared, temp may be Invalid only if the chip has the POPCNT instruction.
     // On ARM, temp may never be Invalid.
-    inline void popcnt32(Register src, Register dest, Register temp) PER_ARCH;
+    inline void popcnt32(Register src, Register dest, Register temp)
+        DEFINED_ON(arm, x86_shared, mips_shared);
 
     // temp may be invalid only if the chip has the POPCNT instruction.
-    inline void popcnt64(Register64 src, Register64 dest, Register temp) PER_ARCH;
+    inline void popcnt64(Register64 src, Register64 dest, Register temp)
+        DEFINED_ON(x86, x64, arm, mips32, mips64);
 
     // ===============================================================
     // Branch functions
 
     template <class L>
     inline void branch32(Condition cond, Register lhs, Register rhs, L label) PER_SHARED_ARCH;
     template <class L>
     inline void branch32(Condition cond, Register lhs, Imm32 rhs, L label) PER_SHARED_ARCH;
--- a/js/src/jit/arm64/MacroAssembler-arm64-inl.h
+++ b/js/src/jit/arm64/MacroAssembler-arm64-inl.h
@@ -115,22 +115,16 @@ MacroAssembler::and64(Imm64 imm, Registe
 {
     vixl::UseScratchRegisterScope temps(this);
     const Register scratch = temps.AcquireX().asUnsized();
     mov(ImmWord(imm.value), scratch);
     andPtr(scratch, dest.reg);
 }
 
 void
-MacroAssembler::and64(Register64 src, Register64 dest)
-{
-    MOZ_CRASH("NYI");
-}
-
-void
 MacroAssembler::or64(Imm64 imm, Register64 dest)
 {
     vixl::UseScratchRegisterScope temps(this);
     const Register scratch = temps.AcquireX().asUnsized();
     mov(ImmWord(imm.value), scratch);
     orPtr(scratch, dest.reg);
 }
 
@@ -371,22 +365,16 @@ MacroAssembler::subPtr(const Address& ad
     const ARMRegister scratch64 = temps.AcquireX();
     MOZ_ASSERT(scratch64.asUnsized() != addr.base);
 
     Ldr(scratch64, MemOperand(ARMRegister(addr.base, 64), addr.offset));
     Sub(ARMRegister(dest, 64), ARMRegister(dest, 64), Operand(scratch64));
 }
 
 void
-MacroAssembler::sub64(Register64 src, Register64 dest)
-{
-    MOZ_CRASH("NYI");
-}
-
-void
 MacroAssembler::subDouble(FloatRegister src, FloatRegister dest)
 {
     fsub(ARMFPRegister(dest, 64), ARMFPRegister(dest, 64), ARMFPRegister(src, 64));
 }
 
 void
 MacroAssembler::subFloat32(FloatRegister src, FloatRegister dest)
 {
@@ -420,22 +408,16 @@ MacroAssembler::mul64(Imm64 imm, const R
     vixl::UseScratchRegisterScope temps(this);
     const ARMRegister scratch64 = temps.AcquireX();
     MOZ_ASSERT(dest.reg != scratch64.asUnsized());
     mov(ImmWord(imm.value), scratch64.asUnsized());
     Mul(ARMRegister(dest.reg, 64), ARMRegister(dest.reg, 64), scratch64);
 }
 
 void
-MacroAssembler::mul64(const Register64& src, const Register64& dest, const Register temp)
-{
-    MOZ_CRASH("NYI");
-}
-
-void
 MacroAssembler::mulBy3(Register src, Register dest)
 {
     ARMRegister xdest(dest, 64);
     ARMRegister xsrc(src, 64);
     Add(xdest, xsrc, Operand(xsrc, vixl::LSL, 1));
 }
 
 void
@@ -644,76 +626,16 @@ MacroAssembler::rshift32Arithmetic(Imm32
 
 void
 MacroAssembler::rshift64(Imm32 imm, Register64 dest)
 {
     MOZ_ASSERT(0 <= imm.value && imm.value < 64);
     rshiftPtr(imm, dest.reg);
 }
 
-void
-MacroAssembler::rshift64Arithmetic(Imm32 imm, Register64 dest)
-{
-    MOZ_CRASH("NYI");
-}
-
-void
-MacroAssembler::lshift64(Register shift, Register64 srcDest)
-{
-    MOZ_CRASH("NYI");
-}
-
-void
-MacroAssembler::rshift64(Register shift, Register64 srcDest)
-{
-    MOZ_CRASH("NYI");
-}
-
-void
-MacroAssembler::rshift64Arithmetic(Register shift, Register64 srcDest)
-{
-    MOZ_CRASH("NYI");
-}
-
-void
-MacroAssembler::clz64(Register64 src, Register dest)
-{
-    MOZ_CRASH("NYI");
-}
-
-void
-MacroAssembler::ctz64(Register64 src, Register dest)
-{
-    MOZ_CRASH("NYI");
-}
-
-void
-MacroAssembler::popcnt32(Register src, Register dest, Register temp)
-{
-    MOZ_CRASH("NYI");
-}
-
-void
-MacroAssembler::popcnt64(Register64 src, Register64 dest, Register temp)
-{
-    MOZ_CRASH("NYI");
-}
-
-void
-MacroAssembler::rotateLeft64(Register count, Register64 input, Register64 dest, Register temp)
-{
-    MOZ_CRASH("NYI");
-}
-
-void
-MacroAssembler::rotateRight64(Register count, Register64 input, Register64 dest, Register temp)
-{
-    MOZ_CRASH("NYI");
-}
-
 // ===============================================================
 // Rotation functions
 void
 MacroAssembler::rotateLeft(Imm32 count, Register input, Register dest)
 {
     MOZ_CRASH("NYI: rotateLeft by immediate");
 }
 void