Bug 1046585 part 9 - Move SSE detection code out of assembler/ and refactor it. r=sunfish
authorJan de Mooij <jdemooij@mozilla.com>
Tue, 26 Aug 2014 10:09:42 +0200
changeset 201629 8530535e1ae054a8ddc59225d7f12a1a950ed37f
parent 201628 8ce721baa271f46794323530953e43ff920e1b46
child 201630 68bb8434fbec690eb9e41fd0daf281cbefff2c5d
push id8376
push userryanvm@gmail.com
push dateTue, 26 Aug 2014 20:12:13 +0000
treeherderfx-team@2e9bbd03df15 [default view] [failures only]
perfherder[talos] [build metrics] [platform microbench] (compared to previous push)
reviewerssunfish
bugs1046585
milestone34.0a1
Bug 1046585 part 9 - Move SSE detection code out of assembler/ and refactor it. r=sunfish
js/src/asmjs/AsmJSModule.cpp
js/src/assembler/assembler/MacroAssemblerX86Common.cpp
js/src/assembler/assembler/MacroAssemblerX86Common.h
js/src/jit/shared/Assembler-x86-shared.cpp
js/src/jit/shared/Assembler-x86-shared.h
js/src/jit/x64/Assembler-x64.h
js/src/jit/x86/Assembler-x86.h
js/src/moz.build
js/src/shell/js.cpp
--- a/js/src/asmjs/AsmJSModule.cpp
+++ b/js/src/asmjs/AsmJSModule.cpp
@@ -1798,29 +1798,29 @@ GetCPUID(uint32_t *cpuId)
         X86 = 0x1,
         X64 = 0x2,
         ARM = 0x3,
         MIPS = 0x4,
         ARCH_BITS = 3
     };
 
 #if defined(JS_CODEGEN_X86)
-    JS_ASSERT(uint32_t(JSC::MacroAssemblerX86Common::getSSEState()) <= (UINT32_MAX >> ARCH_BITS));
-    *cpuId = X86 | (JSC::MacroAssemblerX86Common::getSSEState() << ARCH_BITS);
+    MOZ_ASSERT(uint32_t(CPUInfo::GetSSEVersion()) <= (UINT32_MAX >> ARCH_BITS));
+    *cpuId = X86 | (uint32_t(CPUInfo::GetSSEVersion()) << ARCH_BITS);
     return true;
 #elif defined(JS_CODEGEN_X64)
-    JS_ASSERT(uint32_t(JSC::MacroAssemblerX86Common::getSSEState()) <= (UINT32_MAX >> ARCH_BITS));
-    *cpuId = X64 | (JSC::MacroAssemblerX86Common::getSSEState() << ARCH_BITS);
+    MOZ_ASSERT(uint32_t(CPUInfo::GetSSEVersion()) <= (UINT32_MAX >> ARCH_BITS));
+    *cpuId = X64 | (uint32_t(CPUInfo::GetSSEVersion()) << ARCH_BITS);
     return true;
 #elif defined(JS_CODEGEN_ARM)
-    JS_ASSERT(GetARMFlags() <= (UINT32_MAX >> ARCH_BITS));
+    MOZ_ASSERT(GetARMFlags() <= (UINT32_MAX >> ARCH_BITS));
     *cpuId = ARM | (GetARMFlags() << ARCH_BITS);
     return true;
 #elif defined(JS_CODEGEN_MIPS)
-    JS_ASSERT(GetMIPSFlags() <= (UINT32_MAX >> ARCH_BITS));
+    MOZ_ASSERT(GetMIPSFlags() <= (UINT32_MAX >> ARCH_BITS));
     *cpuId = MIPS | (GetMIPSFlags() << ARCH_BITS);
     return true;
 #else
     return false;
 #endif
 }
 
 class MachineId
deleted file mode 100644
--- a/js/src/assembler/assembler/MacroAssemblerX86Common.cpp
+++ /dev/null
@@ -1,104 +0,0 @@
-/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
- * vim: set ts=8 sts=4 et sw=4 tw=99: */
-/* This Source Code Form is subject to the terms of the Mozilla Public
- * License, v. 2.0. If a copy of the MPL was not distributed with this
- * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
-
-#include "assembler/assembler/MacroAssemblerX86Common.h"
-
-#ifdef _MSC_VER
-#ifdef JS_CODEGEN_X64
-/* for __cpuid */
-#include <intrin.h>
-#endif
-#endif
-
-using namespace JSC;
-MacroAssemblerX86Common::SSECheckState MacroAssemblerX86Common::s_sseCheckState = NotCheckedSSE;
-
-#ifdef DEBUG
-bool MacroAssemblerX86Common::s_floatingPointDisabled = false;
-bool MacroAssemblerX86Common::s_SSE3Disabled = false;
-bool MacroAssemblerX86Common::s_SSE4Disabled = false;
-#endif
-
-void MacroAssemblerX86Common::setSSECheckState()
-{
-    // Default the flags value to zero; if the compiler is
-    // not MSVC or GCC we will read this as SSE2 not present.
-    int flags_edx = 0;
-    int flags_ecx = 0;
-#ifdef _MSC_VER
-#ifdef JS_CODEGEN_X64
-    int cpuinfo[4];
-
-    __cpuid(cpuinfo, 1);
-    flags_ecx = cpuinfo[2];
-    flags_edx = cpuinfo[3];
-#else
-    _asm {
-        mov eax, 1 // cpuid function 1 gives us the standard feature set
-        cpuid;
-        mov flags_ecx, ecx;
-        mov flags_edx, edx;
-    }
-#endif
-#elif defined(__GNUC__)
-#ifdef JS_CODEGEN_X64
-    asm (
-         "movl $0x1, %%eax;"
-         "cpuid;"
-         : "=c" (flags_ecx), "=d" (flags_edx)
-         :
-         : "%eax", "%ebx"
-         );
-#else
-    // On 32-bit x86, we must preserve ebx; the compiler needs it for PIC mode.
-    asm (
-         "movl $0x1, %%eax;"
-         "pushl %%ebx;"
-         "cpuid;"
-         "popl %%ebx;"
-         : "=c" (flags_ecx), "=d" (flags_edx)
-         :
-         : "%eax"
-         );
-#endif
-#endif
-
-#ifdef DEBUG
-    if (s_floatingPointDisabled) {
-        // Disable SSE2.
-        s_sseCheckState = HasSSE;
-        return;
-    }
-#endif
-
-    static const int SSEFeatureBit = 1 << 25;
-    static const int SSE2FeatureBit = 1 << 26;
-    static const int SSE3FeatureBit = 1 << 0;
-    static const int SSSE3FeatureBit = 1 << 9;
-    static const int SSE41FeatureBit = 1 << 19;
-    static const int SSE42FeatureBit = 1 << 20;
-    if (flags_ecx & SSE42FeatureBit)
-        s_sseCheckState = HasSSE4_2;
-    else if (flags_ecx & SSE41FeatureBit)
-        s_sseCheckState = HasSSE4_1;
-    else if (flags_ecx & SSSE3FeatureBit)
-        s_sseCheckState = HasSSSE3;
-    else if (flags_ecx & SSE3FeatureBit)
-        s_sseCheckState = HasSSE3;
-    else if (flags_edx & SSE2FeatureBit)
-        s_sseCheckState = HasSSE2;
-    else if (flags_edx & SSEFeatureBit)
-        s_sseCheckState = HasSSE;
-    else
-        s_sseCheckState = NoSSE;
-
-#ifdef DEBUG
-    if (s_sseCheckState >= HasSSE4_1 && s_SSE4Disabled)
-        s_sseCheckState = HasSSE3;
-    if (s_sseCheckState >= HasSSE3 && s_SSE3Disabled)
-        s_sseCheckState = HasSSE2;
-#endif
-}
deleted file mode 100644
--- a/js/src/assembler/assembler/MacroAssemblerX86Common.h
+++ /dev/null
@@ -1,191 +0,0 @@
-/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
- * vim: set ts=8 sts=4 et sw=4 tw=99:
- *
- * ***** BEGIN LICENSE BLOCK *****
- * Copyright (C) 2008 Apple Inc. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY APPLE INC. ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL APPLE INC. OR
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
- * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
- * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * ***** END LICENSE BLOCK ***** */
-
-#ifndef assembler_assembler_MacroAssemblerX86Common_h
-#define assembler_assembler_MacroAssemblerX86Common_h
-
-#include "jit/shared/BaseAssembler-x86-shared.h"
-
-namespace JSC {
-
-class MacroAssemblerX86Common {
-public:
-    // As the SSE's were introduced in order, the presence of a later SSE implies
-    // the presence of an earlier SSE. For example, SSE4_2 support implies SSE2 support.
-    enum SSECheckState {
-        NotCheckedSSE = 0,
-        NoSSE = 1,
-        HasSSE = 2,
-        HasSSE2 = 3,
-        HasSSE3 = 4,
-        HasSSSE3 = 5,
-        HasSSE4_1 = 6,
-        HasSSE4_2 = 7
-    };
-
-    static SSECheckState getSSEState()
-    {
-        if (s_sseCheckState == NotCheckedSSE) {
-            MacroAssemblerX86Common::setSSECheckState();
-        }
-        // Only check once.
-        MOZ_ASSERT(s_sseCheckState != NotCheckedSSE);
-
-        return s_sseCheckState;
-    }
-
-private:
-    static SSECheckState s_sseCheckState;
-
-    static void setSSECheckState();
-
-  public:
-#ifdef JS_CODEGEN_X86
-    static bool isSSEPresent()
-    {
-#if defined(__SSE__) && !defined(DEBUG)
-        return true;
-#else
-        if (s_sseCheckState == NotCheckedSSE) {
-            setSSECheckState();
-        }
-        // Only check once.
-        MOZ_ASSERT(s_sseCheckState != NotCheckedSSE);
-
-        return s_sseCheckState >= HasSSE;
-#endif
-    }
-
-    static bool isSSE2Present()
-    {
-#if defined(__SSE2__) && !defined(DEBUG)
-        return true;
-#else
-        if (s_sseCheckState == NotCheckedSSE) {
-            setSSECheckState();
-        }
-        // Only check once.
-        MOZ_ASSERT(s_sseCheckState != NotCheckedSSE);
-
-        return s_sseCheckState >= HasSSE2;
-#endif
-    }
-
-#elif !defined(NDEBUG) // CPU(X86)
-
-    // On x86-64 we should never be checking for SSE2 in a non-debug build,
-    // but non debug add this method to keep the asserts above happy.
-    static bool isSSE2Present()
-    {
-        return true;
-    }
-
-#endif
-    static bool isSSE3Present()
-    {
-#if defined(__SSE3__) && !defined(DEBUG)
-        return true;
-#else
-        if (s_sseCheckState == NotCheckedSSE) {
-            setSSECheckState();
-        }
-        // Only check once.
-        MOZ_ASSERT(s_sseCheckState != NotCheckedSSE);
-
-        return s_sseCheckState >= HasSSE3;
-#endif
-    }
-
-    static bool isSSSE3Present()
-    {
-#if defined(__SSSE3__) && !defined(DEBUG)
-        return true;
-#else
-        if (s_sseCheckState == NotCheckedSSE) {
-            setSSECheckState();
-        }
-        // Only check once.
-        MOZ_ASSERT(s_sseCheckState != NotCheckedSSE);
-
-        return s_sseCheckState >= HasSSSE3;
-#endif
-    }
-
-    static bool isSSE41Present()
-    {
-#if defined(__SSE4_1__) && !defined(DEBUG)
-        return true;
-#else
-        if (s_sseCheckState == NotCheckedSSE) {
-            setSSECheckState();
-        }
-        // Only check once.
-        MOZ_ASSERT(s_sseCheckState != NotCheckedSSE);
-
-        return s_sseCheckState >= HasSSE4_1;
-#endif
-    }
-
-    static bool isSSE42Present()
-    {
-#if defined(__SSE4_2__) && !defined(DEBUG)
-        return true;
-#else
-        if (s_sseCheckState == NotCheckedSSE) {
-            setSSECheckState();
-        }
-        // Only check once.
-        MOZ_ASSERT(s_sseCheckState != NotCheckedSSE);
-
-        return s_sseCheckState >= HasSSE4_2;
-#endif
-    }
-
-  private:
-#ifdef DEBUG
-    static bool s_floatingPointDisabled;
-    static bool s_SSE3Disabled;
-    static bool s_SSE4Disabled;
-
-  public:
-    static void SetFloatingPointDisabled() {
-        s_floatingPointDisabled = true;
-    }
-    static void SetSSE3Disabled() {
-        s_SSE3Disabled = true;
-    }
-    static void SetSSE4Disabled() {
-        s_SSE4Disabled = true;
-    }
-#endif
-};
-
-} // namespace JSC
-
-#endif /* assembler_assembler_MacroAssemblerX86Common_h */
--- a/js/src/jit/shared/Assembler-x86-shared.cpp
+++ b/js/src/jit/shared/Assembler-x86-shared.cpp
@@ -9,16 +9,20 @@
 #if defined(JS_CODEGEN_X86)
 # include "jit/x86/MacroAssembler-x86.h"
 #elif defined(JS_CODEGEN_X64)
 # include "jit/x64/MacroAssembler-x64.h"
 #else
 # error "Wrong architecture. Only x86 and x64 should build this file!"
 #endif
 
+#ifdef _MSC_VER
+# include <intrin.h> // for __cpuid
+#endif
+
 using namespace js;
 using namespace js::jit;
 
 void
 AssemblerX86Shared::copyJumpRelocationTable(uint8_t *dest)
 {
     if (jumpRelocations_.length())
         memcpy(dest, jumpRelocations_.buffer(), jumpRelocations_.length());
@@ -126,8 +130,66 @@ AssemblerX86Shared::InvertCondition(Cond
       case Below:
         return AboveOrEqual;
       case BelowOrEqual:
         return Above;
       default:
         MOZ_CRASH("unexpected condition");
     }
 }
+
+CPUInfo::SSEVersion CPUInfo::maxSSEVersion = UnknownSSE;
+CPUInfo::SSEVersion CPUInfo::maxEnabledSSEVersion = UnknownSSE;
+
+void
+CPUInfo::SetSSEVersion()
+{
+    int flagsEDX = 0;
+    int flagsECX = 0;
+
+#ifdef _MSC_VER
+    int cpuinfo[4];
+    __cpuid(cpuinfo, 1);
+    flagsECX = cpuinfo[2];
+    flagsEDX = cpuinfo[3];
+#elif defined(__GNUC__)
+# ifdef JS_CODEGEN_X64
+    asm (
+         "movl $0x1, %%eax;"
+         "cpuid;"
+         : "=c" (flagsECX), "=d" (flagsEDX)
+         :
+         : "%eax", "%ebx"
+         );
+# else
+    // On x86, preserve ebx. The compiler needs it for PIC mode.
+    asm (
+         "movl $0x1, %%eax;"
+         "pushl %%ebx;"
+         "cpuid;"
+         "popl %%ebx;"
+         : "=c" (flagsECX), "=d" (flagsEDX)
+         :
+         : "%eax"
+         );
+# endif
+#else
+# error "Unsupported compiler"
+#endif
+
+    static const int SSEBit = 1 << 25;
+    static const int SSE2Bit = 1 << 26;
+    static const int SSE3Bit = 1 << 0;
+    static const int SSSE3Bit = 1 << 9;
+    static const int SSE41Bit = 1 << 19;
+    static const int SSE42Bit = 1 << 20;
+
+    if (flagsECX & SSE42Bit)      maxSSEVersion = SSE4_2;
+    else if (flagsECX & SSE41Bit) maxSSEVersion = SSE4_1;
+    else if (flagsECX & SSSE3Bit) maxSSEVersion = SSSE3;
+    else if (flagsECX & SSE3Bit)  maxSSEVersion = SSE3;
+    else if (flagsEDX & SSE2Bit)  maxSSEVersion = SSE2;
+    else if (flagsEDX & SSEBit)   maxSSEVersion = SSE;
+    else                          maxSSEVersion = NoSSE;
+
+    if (maxEnabledSSEVersion != UnknownSSE)
+        maxSSEVersion = Min(maxSSEVersion, maxEnabledSSEVersion);
+}
--- a/js/src/jit/shared/Assembler-x86-shared.h
+++ b/js/src/jit/shared/Assembler-x86-shared.h
@@ -4,17 +4,16 @@
  * License, v. 2.0. If a copy of the MPL was not distributed with this
  * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
 
 #ifndef jit_shared_Assembler_x86_shared_h
 #define jit_shared_Assembler_x86_shared_h
 
 #include <cstddef>
 
-#include "assembler/assembler/MacroAssemblerX86Common.h"
 #include "jit/shared/Assembler-shared.h"
 #include "jit/shared/BaseAssembler-x86-shared.h"
 
 namespace js {
 namespace jit {
 
 class Operand
 {
@@ -120,16 +119,67 @@ class Operand
           case MEM_REG_DISP: return r.code() == base();
           case MEM_SCALE:    return r.code() == base() || r.code() == index();
           default: MOZ_CRASH("Unexpected Operand kind");
         }
         return false;
     }
 };
 
+class CPUInfo
+{
+  public:
+    // As the SSE's were introduced in order, the presence of a later SSE implies
+    // the presence of an earlier SSE. For example, SSE4_2 support implies SSE2 support.
+    enum SSEVersion {
+        UnknownSSE = 0,
+        NoSSE = 1,
+        SSE = 2,
+        SSE2 = 3,
+        SSE3 = 4,
+        SSSE3 = 5,
+        SSE4_1 = 6,
+        SSE4_2 = 7
+    };
+
+    static SSEVersion GetSSEVersion() {
+        if (maxSSEVersion == UnknownSSE)
+            SetSSEVersion();
+
+        MOZ_ASSERT(maxSSEVersion != UnknownSSE);
+        MOZ_ASSERT_IF(maxEnabledSSEVersion != UnknownSSE, maxSSEVersion <= maxEnabledSSEVersion);
+        return maxSSEVersion;
+    }
+
+  private:
+    static SSEVersion maxSSEVersion;
+    static SSEVersion maxEnabledSSEVersion;
+
+    static void SetSSEVersion();
+
+  public:
+    static bool IsSSE2Present() {
+#ifdef JS_CODEGEN_X64
+        return true;
+#else
+        return GetSSEVersion() >= SSE2;
+#endif
+    }
+    static bool IsSSE3Present()  { return GetSSEVersion() >= SSE3; }
+    static bool IsSSSE3Present() { return GetSSEVersion() >= SSSE3; }
+    static bool IsSSE41Present() { return GetSSEVersion() >= SSE4_1; }
+    static bool IsSSE42Present() { return GetSSEVersion() >= SSE4_2; }
+
+#ifdef JS_CODEGEN_X86
+    static void SetFloatingPointDisabled() { maxEnabledSSEVersion = NoSSE; }
+#endif
+    static void SetSSE3Disabled() { maxEnabledSSEVersion = SSE2; }
+    static void SetSSE4Disabled() { maxEnabledSSEVersion = SSSE3; }
+};
+
 class AssemblerX86Shared : public AssemblerShared
 {
   protected:
     struct RelativePatch {
         int32_t offset;
         void *target;
         Relocation::Kind kind;
 
@@ -866,26 +916,21 @@ class AssemblerX86Shared : public Assemb
         }
     }
 
     void breakpoint() {
         masm.int3();
     }
 
 #ifdef DEBUG
-    static bool HasSSE2() {
-        return JSC::MacroAssemblerX86Common::isSSE2Present();
-    }
+    static bool HasSSE2() { return CPUInfo::IsSSE2Present(); }
 #endif
-    static bool HasSSE3() {
-        return JSC::MacroAssemblerX86Common::isSSE3Present();
-    }
-    static bool HasSSE41() {
-        return JSC::MacroAssemblerX86Common::isSSE41Present();
-    }
+    static bool HasSSE3() { return CPUInfo::IsSSE3Present(); }
+    static bool HasSSE41() { return CPUInfo::IsSSE41Present(); }
+    static bool SupportsFloatingPoint() { return CPUInfo::IsSSE2Present(); }
 
     // The below cmpl methods switch the lhs and rhs when it invokes the
     // macroassembler to conform with intel standard.  When calling this
     // function put the left operand on the left as you would expect.
     void cmpl(Register lhs, Register rhs) {
         masm.cmpl_rr(rhs.code(), lhs.code());
     }
     void cmpl(Register lhs, const Operand &rhs) {
--- a/js/src/jit/x64/Assembler-x64.h
+++ b/js/src/jit/x64/Assembler-x64.h
@@ -261,18 +261,16 @@ class Assembler : public AssemblerX86Sha
 
     Assembler()
       : extendedJumpTable_(0)
     {
     }
 
     static void TraceJumpRelocations(JSTracer *trc, JitCode *code, CompactBufferReader &reader);
 
-    static bool SupportsFloatingPoint() { return true; }
-
     // The buffer is about to be linked, make sure any constant pools or excess
     // bookkeeping has been flushed to the instruction stream.
     void finish();
 
     // Copy the assembly code to the given buffer, and perform any pending
     // relocations relying on the target address.
     void executableCopy(uint8_t *buffer);
 
--- a/js/src/jit/x86/Assembler-x86.h
+++ b/js/src/jit/x86/Assembler-x86.h
@@ -191,20 +191,16 @@ class Assembler : public AssemblerX86Sha
     using AssemblerX86Shared::retarget;
     using AssemblerX86Shared::cmpl;
     using AssemblerX86Shared::call;
     using AssemblerX86Shared::push;
     using AssemblerX86Shared::pop;
 
     static void TraceJumpRelocations(JSTracer *trc, JitCode *code, CompactBufferReader &reader);
 
-    static bool SupportsFloatingPoint() {
-        return JSC::MacroAssemblerX86Common::isSSE2Present();
-    }
-
     // Copy the assembly code to the given buffer, and perform any pending
     // relocations relying on the target address.
     void executableCopy(uint8_t *buffer);
 
     // Actual assembly emitting functions.
 
     void push(ImmGCPtr ptr) {
         push(Imm32(uintptr_t(ptr.value)));
--- a/js/src/moz.build
+++ b/js/src/moz.build
@@ -371,22 +371,16 @@ if CONFIG['OS_ARCH'] == 'WINNT':
     ]
     # _CRT_RAND_S must be #defined before #including stdlib.h to get rand_s()
     DEFINES['_CRT_RAND_S'] = True
 else:
     SOURCES += [
         'jit/ExecutableAllocatorPosix.cpp',
     ]
 
-if CONFIG['ENABLE_ION']:
-    if CONFIG['JS_CODEGEN_X86'] or CONFIG['JS_CODEGEN_X64']:
-        SOURCES += [
-            'assembler/assembler/MacroAssemblerX86Common.cpp',
-        ]
-
 if CONFIG['JS_HAS_CTYPES']:
     SOURCES += [
         'ctypes/CTypes.cpp',
         'ctypes/Library.cpp',
     ]
     if not CONFIG['MOZ_NATIVE_FFI']:
         GENERATED_INCLUDES += [
             'ctypes/libffi/include',
--- a/js/src/shell/js.cpp
+++ b/js/src/shell/js.cpp
@@ -3857,17 +3857,17 @@ EscapeForShell(AutoCStringVector &argv)
         argv.replace(i, escaped);
     }
     return true;
 }
 #endif
 
 static Vector<const char*, 4, js::SystemAllocPolicy> sPropagatedFlags;
 
-#if defined(DEBUG) && (defined(JS_CODEGEN_X86) || defined(JS_CODEGEN_X64))
+#if defined(JS_CODEGEN_X86) || defined(JS_CODEGEN_X64)
 static bool
 PropagateFlagToNestedShells(const char *flag)
 {
     return sPropagatedFlags.append(flag);
 }
 #endif
 
 static bool
@@ -6170,35 +6170,34 @@ main(int argc, char **argv, char **envp)
         return EXIT_SUCCESS;
 
 #ifdef DEBUG
     /*
      * Process OOM options as early as possible so that we can observe as many
      * allocations as possible.
      */
     OOM_printAllocationCount = op.getBoolOption('O');
+#endif
 
 #ifdef JS_CODEGEN_X86
     if (op.getBoolOption("no-fpu"))
-        JSC::MacroAssemblerX86Common::SetFloatingPointDisabled();
+        js::jit::CPUInfo::SetFloatingPointDisabled();
 #endif
 
 #if defined(JS_CODEGEN_X86) || defined(JS_CODEGEN_X64)
     if (op.getBoolOption("no-sse3")) {
-        JSC::MacroAssemblerX86Common::SetSSE3Disabled();
+        js::jit::CPUInfo::SetSSE3Disabled();
         PropagateFlagToNestedShells("--no-sse3");
     }
     if (op.getBoolOption("no-sse4")) {
-        JSC::MacroAssemblerX86Common::SetSSE4Disabled();
+        js::jit::CPUInfo::SetSSE4Disabled();
         PropagateFlagToNestedShells("--no-sse4");
     }
 #endif
 
-#endif // DEBUG
-
     if (op.getBoolOption("no-threads"))
         js::DisableExtraThreads();
 
     // The fake thread count must be set before initializing the Runtime,
     // which spins up the thread pool.
     int32_t threadCount = op.getIntOption("thread-count");
     if (threadCount >= 0)
         SetFakeCPUCount(threadCount);