Bug 1521249 part 1 - Update encoding_rs to 0.8.16. r=glandium
authorHenri Sivonen <hsivonen@hsivonen.fi>
Sat, 23 Mar 2019 14:17:35 +0000
changeset 465909 d3d185b3c08554f9ebdb0410d3be4b4fa15477d7
parent 465908 be4f4ec91925f3eff135c2a6e3c3a3eeffd59462
child 465910 0b463e85dfe44a65dace0c816b084fe1332d53f1
push id81328
push userhsivonen@mozilla.com
push dateMon, 25 Mar 2019 10:49:28 +0000
treeherderautoland@0b463e85dfe4 [default view] [failures only]
perfherder[talos] [build metrics] [platform microbench] (compared to previous push)
reviewersglandium
bugs1521249
milestone68.0a1
first release with
nightly linux32
nightly linux64
nightly mac
nightly win32
nightly win64
last release without
nightly linux32
nightly linux64
nightly mac
nightly win32
nightly win64
Bug 1521249 part 1 - Update encoding_rs to 0.8.16. r=glandium This changeset requires nightly Rust (to be changed in the next part). Depends on D21891 Differential Revision: https://phabricator.services.mozilla.com/D20288
Cargo.lock
third_party/rust/cfg-if/.cargo-checksum.json
third_party/rust/cfg-if/Cargo.toml
third_party/rust/cfg-if/README.md
third_party/rust/cfg-if/src/lib.rs
third_party/rust/encoding_rs/.cargo-checksum.json
third_party/rust/encoding_rs/Cargo.toml
third_party/rust/encoding_rs/README.md
third_party/rust/encoding_rs/build.rs
third_party/rust/encoding_rs/src/handles.rs
third_party/rust/encoding_rs/src/lib.rs
third_party/rust/encoding_rs/src/mem.rs
third_party/rust/encoding_rs/src/simd_funcs.rs
third_party/rust/encoding_rs/src/x_user_defined.rs
third_party/rust/packed_simd/.cargo-checksum.json
third_party/rust/packed_simd/Cargo.toml
third_party/rust/packed_simd/LICENSE-APACHE
third_party/rust/packed_simd/LICENSE-MIT
third_party/rust/packed_simd/bors.toml
third_party/rust/packed_simd/build.rs
third_party/rust/packed_simd/ci/all.sh
third_party/rust/packed_simd/ci/android-install-ndk.sh
third_party/rust/packed_simd/ci/android-install-sdk.sh
third_party/rust/packed_simd/ci/android-sysimage.sh
third_party/rust/packed_simd/ci/benchmark.sh
third_party/rust/packed_simd/ci/deploy_and_run_on_ios_simulator.rs
third_party/rust/packed_simd/ci/docker/aarch64-linux-android/Dockerfile
third_party/rust/packed_simd/ci/docker/aarch64-unknown-linux-gnu/Dockerfile
third_party/rust/packed_simd/ci/docker/arm-linux-androideabi/Dockerfile
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third_party/rust/packed_simd/ci/dox.sh
third_party/rust/packed_simd/ci/linux-s390x.sh
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third_party/rust/packed_simd/ci/lld-shim.rs
third_party/rust/packed_simd/ci/max_line_width.sh
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third_party/rust/packed_simd/ci/run_examples.sh
third_party/rust/packed_simd/ci/runtest-android.rs
third_party/rust/packed_simd/ci/setup_benchmarks.sh
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third_party/rust/packed_simd/contributing.md
third_party/rust/packed_simd/perf-guide/book.toml
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third_party/rust/packed_simd/src/api/cast.rs
third_party/rust/packed_simd/src/api/cast/macros.rs
third_party/rust/packed_simd/src/api/cast/v128.rs
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third_party/rust/packed_simd/src/api/cast/v64.rs
third_party/rust/packed_simd/src/api/cmp.rs
third_party/rust/packed_simd/src/api/cmp/eq.rs
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third_party/rust/packed_simd/src/api/cmp/vertical.rs
third_party/rust/packed_simd/src/api/default.rs
third_party/rust/packed_simd/src/api/fmt.rs
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third_party/rust/packed_simd/src/api/fmt/debug.rs
third_party/rust/packed_simd/src/api/fmt/lower_hex.rs
third_party/rust/packed_simd/src/api/fmt/octal.rs
third_party/rust/packed_simd/src/api/fmt/upper_hex.rs
third_party/rust/packed_simd/src/api/from.rs
third_party/rust/packed_simd/src/api/from/from_array.rs
third_party/rust/packed_simd/src/api/from/from_vector.rs
third_party/rust/packed_simd/src/api/hash.rs
third_party/rust/packed_simd/src/api/into_bits.rs
third_party/rust/packed_simd/src/api/into_bits/arch_specific.rs
third_party/rust/packed_simd/src/api/into_bits/macros.rs
third_party/rust/packed_simd/src/api/into_bits/v128.rs
third_party/rust/packed_simd/src/api/into_bits/v16.rs
third_party/rust/packed_simd/src/api/into_bits/v256.rs
third_party/rust/packed_simd/src/api/into_bits/v32.rs
third_party/rust/packed_simd/src/api/into_bits/v512.rs
third_party/rust/packed_simd/src/api/into_bits/v64.rs
third_party/rust/packed_simd/src/api/math.rs
third_party/rust/packed_simd/src/api/math/float.rs
third_party/rust/packed_simd/src/api/math/float/abs.rs
third_party/rust/packed_simd/src/api/math/float/consts.rs
third_party/rust/packed_simd/src/api/math/float/cos.rs
third_party/rust/packed_simd/src/api/math/float/exp.rs
third_party/rust/packed_simd/src/api/math/float/ln.rs
third_party/rust/packed_simd/src/api/math/float/mul_add.rs
third_party/rust/packed_simd/src/api/math/float/mul_adde.rs
third_party/rust/packed_simd/src/api/math/float/powf.rs
third_party/rust/packed_simd/src/api/math/float/recpre.rs
third_party/rust/packed_simd/src/api/math/float/rsqrte.rs
third_party/rust/packed_simd/src/api/math/float/sin.rs
third_party/rust/packed_simd/src/api/math/float/sqrt.rs
third_party/rust/packed_simd/src/api/math/float/sqrte.rs
third_party/rust/packed_simd/src/api/minimal.rs
third_party/rust/packed_simd/src/api/minimal/iuf.rs
third_party/rust/packed_simd/src/api/minimal/mask.rs
third_party/rust/packed_simd/src/api/minimal/ptr.rs
third_party/rust/packed_simd/src/api/ops.rs
third_party/rust/packed_simd/src/api/ops/scalar_arithmetic.rs
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third_party/rust/packed_simd/src/api/ops/scalar_mask_bitwise.rs
third_party/rust/packed_simd/src/api/ops/scalar_shifts.rs
third_party/rust/packed_simd/src/api/ops/vector_arithmetic.rs
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third_party/rust/packed_simd/src/api/ops/vector_neg.rs
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third_party/rust/packed_simd/src/api/ops/vector_shifts.rs
third_party/rust/packed_simd/src/api/ptr.rs
third_party/rust/packed_simd/src/api/ptr/gather_scatter.rs
third_party/rust/packed_simd/src/api/reductions.rs
third_party/rust/packed_simd/src/api/reductions/bitwise.rs
third_party/rust/packed_simd/src/api/reductions/float_arithmetic.rs
third_party/rust/packed_simd/src/api/reductions/integer_arithmetic.rs
third_party/rust/packed_simd/src/api/reductions/mask.rs
third_party/rust/packed_simd/src/api/reductions/min_max.rs
third_party/rust/packed_simd/src/api/select.rs
third_party/rust/packed_simd/src/api/shuffle.rs
third_party/rust/packed_simd/src/api/shuffle1_dyn.rs
third_party/rust/packed_simd/src/api/slice.rs
third_party/rust/packed_simd/src/api/slice/from_slice.rs
third_party/rust/packed_simd/src/api/slice/write_to_slice.rs
third_party/rust/packed_simd/src/api/swap_bytes.rs
third_party/rust/packed_simd/src/codegen.rs
third_party/rust/packed_simd/src/codegen/bit_manip.rs
third_party/rust/packed_simd/src/codegen/llvm.rs
third_party/rust/packed_simd/src/codegen/math.rs
third_party/rust/packed_simd/src/codegen/math/float.rs
third_party/rust/packed_simd/src/codegen/math/float/abs.rs
third_party/rust/packed_simd/src/codegen/math/float/cos.rs
third_party/rust/packed_simd/src/codegen/math/float/cos_pi.rs
third_party/rust/packed_simd/src/codegen/math/float/exp.rs
third_party/rust/packed_simd/src/codegen/math/float/ln.rs
third_party/rust/packed_simd/src/codegen/math/float/macros.rs
third_party/rust/packed_simd/src/codegen/math/float/mul_add.rs
third_party/rust/packed_simd/src/codegen/math/float/mul_adde.rs
third_party/rust/packed_simd/src/codegen/math/float/powf.rs
third_party/rust/packed_simd/src/codegen/math/float/sin.rs
third_party/rust/packed_simd/src/codegen/math/float/sin_cos_pi.rs
third_party/rust/packed_simd/src/codegen/math/float/sin_pi.rs
third_party/rust/packed_simd/src/codegen/math/float/sqrt.rs
third_party/rust/packed_simd/src/codegen/math/float/sqrte.rs
third_party/rust/packed_simd/src/codegen/pointer_sized_int.rs
third_party/rust/packed_simd/src/codegen/reductions.rs
third_party/rust/packed_simd/src/codegen/reductions/mask.rs
third_party/rust/packed_simd/src/codegen/reductions/mask/aarch64.rs
third_party/rust/packed_simd/src/codegen/reductions/mask/arm.rs
third_party/rust/packed_simd/src/codegen/reductions/mask/fallback.rs
third_party/rust/packed_simd/src/codegen/reductions/mask/fallback_impl.rs
third_party/rust/packed_simd/src/codegen/reductions/mask/x86.rs
third_party/rust/packed_simd/src/codegen/reductions/mask/x86/avx.rs
third_party/rust/packed_simd/src/codegen/reductions/mask/x86/avx2.rs
third_party/rust/packed_simd/src/codegen/reductions/mask/x86/sse.rs
third_party/rust/packed_simd/src/codegen/reductions/mask/x86/sse2.rs
third_party/rust/packed_simd/src/codegen/shuffle.rs
third_party/rust/packed_simd/src/codegen/shuffle1_dyn.rs
third_party/rust/packed_simd/src/codegen/swap_bytes.rs
third_party/rust/packed_simd/src/codegen/v128.rs
third_party/rust/packed_simd/src/codegen/v16.rs
third_party/rust/packed_simd/src/codegen/v256.rs
third_party/rust/packed_simd/src/codegen/v32.rs
third_party/rust/packed_simd/src/codegen/v512.rs
third_party/rust/packed_simd/src/codegen/v64.rs
third_party/rust/packed_simd/src/codegen/vPtr.rs
third_party/rust/packed_simd/src/codegen/vSize.rs
third_party/rust/packed_simd/src/lib.rs
third_party/rust/packed_simd/src/masks.rs
third_party/rust/packed_simd/src/sealed.rs
third_party/rust/packed_simd/src/testing.rs
third_party/rust/packed_simd/src/testing/macros.rs
third_party/rust/packed_simd/src/testing/utils.rs
third_party/rust/packed_simd/src/v128.rs
third_party/rust/packed_simd/src/v16.rs
third_party/rust/packed_simd/src/v256.rs
third_party/rust/packed_simd/src/v32.rs
third_party/rust/packed_simd/src/v512.rs
third_party/rust/packed_simd/src/v64.rs
third_party/rust/packed_simd/src/vPtr.rs
third_party/rust/packed_simd/src/vSize.rs
third_party/rust/packed_simd/tests/endianness.rs
third_party/rust/simd/.cargo-checksum.json
third_party/rust/simd/Cargo.toml
third_party/rust/simd/LICENSE-APACHE
third_party/rust/simd/LICENSE-MIT
third_party/rust/simd/README.md
third_party/rust/simd/benches/mandelbrot.rs
third_party/rust/simd/benches/matrix.rs
third_party/rust/simd/build.rs
third_party/rust/simd/examples/axpy.rs
third_party/rust/simd/examples/convert.rs
third_party/rust/simd/examples/dot-product.rs
third_party/rust/simd/examples/fannkuch-redux-nosimd.rs
third_party/rust/simd/examples/fannkuch-redux.rs
third_party/rust/simd/examples/mandelbrot.rs
third_party/rust/simd/examples/matrix-inverse.rs
third_party/rust/simd/examples/nbody-nosimd.rs
third_party/rust/simd/examples/nbody.rs
third_party/rust/simd/examples/ops.rs
third_party/rust/simd/examples/spectral-norm-nosimd.rs
third_party/rust/simd/examples/spectral-norm.rs
third_party/rust/simd/src/aarch64/mod.rs
third_party/rust/simd/src/aarch64/neon.rs
third_party/rust/simd/src/arm/mod.rs
third_party/rust/simd/src/arm/neon.rs
third_party/rust/simd/src/common.rs
third_party/rust/simd/src/lib.rs
third_party/rust/simd/src/sixty_four.rs
third_party/rust/simd/src/v256.rs
third_party/rust/simd/src/x86/avx.rs
third_party/rust/simd/src/x86/avx2.rs
third_party/rust/simd/src/x86/mod.rs
third_party/rust/simd/src/x86/sse2.rs
third_party/rust/simd/src/x86/sse3.rs
third_party/rust/simd/src/x86/sse4_1.rs
third_party/rust/simd/src/x86/sse4_2.rs
third_party/rust/simd/src/x86/ssse3.rs
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -141,17 +141,17 @@ dependencies = [
 ]
 
 [[package]]
 name = "backtrace"
 version = "0.3.9"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 dependencies = [
  "backtrace-sys 0.1.24 (registry+https://github.com/rust-lang/crates.io-index)",
- "cfg-if 0.1.2 (registry+https://github.com/rust-lang/crates.io-index)",
+ "cfg-if 0.1.6 (registry+https://github.com/rust-lang/crates.io-index)",
  "libc 0.2.43 (registry+https://github.com/rust-lang/crates.io-index)",
  "rustc-demangle 0.1.8 (registry+https://github.com/rust-lang/crates.io-index)",
  "winapi 0.3.6 (git+https://github.com/froydnj/winapi-rs?branch=aarch64)",
 ]
 
 [[package]]
 name = "backtrace-sys"
 version = "0.1.24"
@@ -227,17 +227,17 @@ dependencies = [
 
 [[package]]
 name = "bindgen"
 version = "0.43.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 dependencies = [
  "bitflags 1.0.4 (registry+https://github.com/rust-lang/crates.io-index)",
  "cexpr 0.3.3 (registry+https://github.com/rust-lang/crates.io-index)",
- "cfg-if 0.1.2 (registry+https://github.com/rust-lang/crates.io-index)",
+ "cfg-if 0.1.6 (registry+https://github.com/rust-lang/crates.io-index)",
  "clang-sys 0.26.1 (registry+https://github.com/rust-lang/crates.io-index)",
  "clap 2.31.2 (registry+https://github.com/rust-lang/crates.io-index)",
  "lazy_static 1.2.0 (registry+https://github.com/rust-lang/crates.io-index)",
  "peeking_take_while 0.1.2 (registry+https://github.com/rust-lang/crates.io-index)",
  "proc-macro2 0.3.5 (registry+https://github.com/rust-lang/crates.io-index)",
  "quote 0.5.2 (registry+https://github.com/rust-lang/crates.io-index)",
  "regex 1.0.0 (registry+https://github.com/rust-lang/crates.io-index)",
  "which 1.0.3 (registry+https://github.com/rust-lang/crates.io-index)",
@@ -446,17 +446,17 @@ name = "cexpr"
 version = "0.3.3"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 dependencies = [
  "nom 4.1.1 (registry+https://github.com/rust-lang/crates.io-index)",
 ]
 
 [[package]]
 name = "cfg-if"
-version = "0.1.2"
+version = "0.1.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 
 [[package]]
 name = "chrono"
 version = "0.4.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 dependencies = [
  "num-integer 0.1.39 (registry+https://github.com/rust-lang/crates.io-index)",
@@ -659,59 +659,59 @@ dependencies = [
 ]
 
 [[package]]
 name = "crossbeam-epoch"
 version = "0.3.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 dependencies = [
  "arrayvec 0.4.6 (registry+https://github.com/rust-lang/crates.io-index)",
- "cfg-if 0.1.2 (registry+https://github.com/rust-lang/crates.io-index)",
+ "cfg-if 0.1.6 (registry+https://github.com/rust-lang/crates.io-index)",
  "crossbeam-utils 0.2.2 (registry+https://github.com/rust-lang/crates.io-index)",
  "lazy_static 1.2.0 (registry+https://github.com/rust-lang/crates.io-index)",
  "memoffset 0.2.1 (registry+https://github.com/rust-lang/crates.io-index)",
  "nodrop 0.1.12 (registry+https://github.com/rust-lang/crates.io-index)",
  "scopeguard 0.3.2 (registry+https://github.com/rust-lang/crates.io-index)",
 ]
 
 [[package]]
 name = "crossbeam-epoch"
 version = "0.4.3"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 dependencies = [
  "arrayvec 0.4.6 (registry+https://github.com/rust-lang/crates.io-index)",
- "cfg-if 0.1.2 (registry+https://github.com/rust-lang/crates.io-index)",
+ "cfg-if 0.1.6 (registry+https://github.com/rust-lang/crates.io-index)",
  "crossbeam-utils 0.3.2 (registry+https://github.com/rust-lang/crates.io-index)",
  "lazy_static 1.2.0 (registry+https://github.com/rust-lang/crates.io-index)",
  "memoffset 0.2.1 (registry+https://github.com/rust-lang/crates.io-index)",
  "scopeguard 0.3.2 (registry+https://github.com/rust-lang/crates.io-index)",
 ]
 
 [[package]]
 name = "crossbeam-utils"
 version = "0.2.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 dependencies = [
- "cfg-if 0.1.2 (registry+https://github.com/rust-lang/crates.io-index)",
+ "cfg-if 0.1.6 (registry+https://github.com/rust-lang/crates.io-index)",
 ]
 
 [[package]]
 name = "crossbeam-utils"
 version = "0.3.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 dependencies = [
- "cfg-if 0.1.2 (registry+https://github.com/rust-lang/crates.io-index)",
+ "cfg-if 0.1.6 (registry+https://github.com/rust-lang/crates.io-index)",
 ]
 
 [[package]]
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 source = "registry+https://github.com/rust-lang/crates.io-index"
 dependencies = [
- "cfg-if 0.1.2 (registry+https://github.com/rust-lang/crates.io-index)",
+ "cfg-if 0.1.6 (registry+https://github.com/rust-lang/crates.io-index)",
 ]
 
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@@ -948,35 +948,35 @@ dependencies = [
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 source = "registry+https://github.com/rust-lang/crates.io-index"
 dependencies = [
- "encoding_rs 0.8.14 (registry+https://github.com/rust-lang/crates.io-index)",
+ "encoding_rs 0.8.16 (registry+https://github.com/rust-lang/crates.io-index)",
 ]
 
 [[package]]
 name = "encoding_glue"
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 dependencies = [
- "encoding_rs 0.8.14 (registry+https://github.com/rust-lang/crates.io-index)",
+ "encoding_rs 0.8.16 (registry+https://github.com/rust-lang/crates.io-index)",
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 [[package]]
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-source = "registry+https://github.com/rust-lang/crates.io-index"
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- "cfg-if 0.1.2 (registry+https://github.com/rust-lang/crates.io-index)",
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+source = "registry+https://github.com/rust-lang/crates.io-index"
+dependencies = [
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@@ -1625,17 +1625,17 @@ dependencies = [
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 dependencies = [
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@@ -1892,17 +1892,17 @@ dependencies = [
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 ]
 
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- "cfg-if 0.1.2 (registry+https://github.com/rust-lang/crates.io-index)",
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 [[package]]
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@@ -1946,17 +1946,17 @@ dependencies = [
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 [[package]]
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- "encoding_rs 0.8.14 (registry+https://github.com/rust-lang/crates.io-index)",
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 ]
 
 [[package]]
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@@ -2033,16 +2033,24 @@ source = "registry+https://github.com/ru
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 dependencies = [
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 ]
 
 [[package]]
+name = "packed_simd"
+version = "0.3.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+dependencies = [
+ "cfg-if 0.1.6 (registry+https://github.com/rust-lang/crates.io-index)",
+]
+
+[[package]]
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@@ -2546,21 +2554,16 @@ source = "registry+https://github.com/ru
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-
-[[package]]
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 [[package]]
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@@ -3153,17 +3156,17 @@ name = "utf8-ranges"
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 dependencies = [
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+ "cfg-if 0.1.6 (registry+https://github.com/rust-lang/crates.io-index)",
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 [[package]]
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@@ -3238,17 +3241,17 @@ dependencies = [
 
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@@ -3478,17 +3481,17 @@ dependencies = [
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 "checksum string_cache 0.7.3 (registry+https://github.com/rust-lang/crates.io-index)" = "25d70109977172b127fe834e5449e5ab1740b9ba49fa18a2020f509174f25423"
--- a/third_party/rust/cfg-if/.cargo-checksum.json
+++ b/third_party/rust/cfg-if/.cargo-checksum.json
@@ -1,1 +1,1 @@
-{"files":{"Cargo.toml":"764b9ce160653e841430da3919ff968b957ff811f7da42c8483c8bfc2f06be25","LICENSE-APACHE":"a60eea817514531668d7e00765731449fe14d059d3249e0bc93b36de45f759f2","LICENSE-MIT":"378f5840b258e2779c39418f3f2d7b2ba96f1c7917dd6be0713f88305dbda397","README.md":"3fa9368c60bc701dea294fbacae0469188c4be1de79f82e972bb9b321776cd52","src/lib.rs":"6915169e3ca05f28e1cb0e052379d74f2496400de1240b74c56e55c2674a6560","tests/xcrate.rs":"30dcb70fbb9c96fda2b7825592558279f534776f72e2a8a0a3e26df4dedb3caa"},"package":"d4c819a1287eb618df47cc647173c5c4c66ba19d888a6e50d605672aed3140de"}
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+{"files":{"Cargo.toml":"090d983ec20ad09e59f6b7679b48b9b54e9c0841cf2922b81cba485edcd40876","LICENSE-APACHE":"a60eea817514531668d7e00765731449fe14d059d3249e0bc93b36de45f759f2","LICENSE-MIT":"378f5840b258e2779c39418f3f2d7b2ba96f1c7917dd6be0713f88305dbda397","README.md":"1cd0ebc3b30a9c9eddb0fda5515b5a52ec2b85a087328f0ee9f4d68cbb28afc2","src/lib.rs":"f02d6e295109365cf54884e5282a3e7d1e1f62857c700f23cd013e94a56bd803","tests/xcrate.rs":"30dcb70fbb9c96fda2b7825592558279f534776f72e2a8a0a3e26df4dedb3caa"},"package":"082bb9b28e00d3c9d39cc03e64ce4cea0f1bb9b3fde493f0cbc008472d22bdf4"}
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--- a/third_party/rust/cfg-if/Cargo.toml
+++ b/third_party/rust/cfg-if/Cargo.toml
@@ -1,14 +1,24 @@
+# THIS FILE IS AUTOMATICALLY GENERATED BY CARGO
+#
+# When uploading crates to the registry Cargo will automatically
+# "normalize" Cargo.toml files for maximal compatibility
+# with all versions of Cargo and also rewrite `path` dependencies
+# to registry (e.g. crates.io) dependencies
+#
+# If you believe there's an error in this file please file an
+# issue against the rust-lang/cargo repository. If you're
+# editing this file be aware that the upstream Cargo.toml
+# will likely look very different (and much more reasonable)
+
 [package]
 name = "cfg-if"
-version = "0.1.2"
+version = "0.1.6"
 authors = ["Alex Crichton <alex@alexcrichton.com>"]
-license = "MIT/Apache-2.0"
-readme = "README.md"
-repository = "https://github.com/alexcrichton/cfg-if"
+description = "A macro to ergonomically define an item depending on a large number of #[cfg]\nparameters. Structured like an if-else chain, the first matching branch is the\nitem that gets emitted.\n"
 homepage = "https://github.com/alexcrichton/cfg-if"
-documentation = "http://alexcrichton.com/cfg-if"
-description = """
-A macro to ergonomically define an item depending on a large number of #[cfg]
-parameters. Structured like an if-else chain, the first matching branch is the
-item that gets emitted.
-"""
+documentation = "https://docs.rs/cfg-if"
+readme = "README.md"
+license = "MIT/Apache-2.0"
+repository = "https://github.com/alexcrichton/cfg-if"
+[badges.travis-ci]
+repository = "alexcrichton/cfg-if"
--- a/third_party/rust/cfg-if/README.md
+++ b/third_party/rust/cfg-if/README.md
@@ -1,13 +1,13 @@
 # cfg-if
 
 [![Build Status](https://travis-ci.org/alexcrichton/cfg-if.svg?branch=master)](https://travis-ci.org/alexcrichton/cfg-if)
 
-[Documentation](http://alexcrichton.com/cfg-if)
+[Documentation](https://docs.rs/cfg-if)
 
 A macro to ergonomically define an item depending on a large number of #[cfg]
 parameters. Structured like an if-else chain, the first matching branch is the
 item that gets emitted.
 
 ```toml
 [dependencies]
 cfg-if = "0.1"
@@ -31,14 +31,22 @@ cfg_if! {
 
 fn main() {
     foo();
 }
 ```
 
 # License
 
-`cfg-if` is primarily distributed under the terms of both the MIT license and
-the Apache License (Version 2.0), with portions covered by various BSD-like
-licenses.
+This project is licensed under either of
+
+ * Apache License, Version 2.0, ([LICENSE-APACHE](LICENSE-APACHE) or
+   http://www.apache.org/licenses/LICENSE-2.0)
+ * MIT license ([LICENSE-MIT](LICENSE-MIT) or
+   http://opensource.org/licenses/MIT)
 
-See LICENSE-APACHE, and LICENSE-MIT for details.
+at your option.
+
+### Contribution
 
+Unless you explicitly state otherwise, any contribution intentionally submitted
+for inclusion in Serde by you, as defined in the Apache-2.0 license, shall be
+dual licensed as above, without any additional terms or conditions.
--- a/third_party/rust/cfg-if/src/lib.rs
+++ b/third_party/rust/cfg-if/src/lib.rs
@@ -1,15 +1,15 @@
-//! A macro for defining #[cfg] if-else statements.
+//! A macro for defining `#[cfg]` if-else statements.
 //!
 //! The macro provided by this crate, `cfg_if`, is similar to the `if/elif` C
 //! preprocessor macro by allowing definition of a cascade of `#[cfg]` cases,
 //! emitting the implementation which matches first.
 //!
-//! This allows you to conveniently provide a long list #[cfg]'d blocks of code
+//! This allows you to conveniently provide a long list `#[cfg]`'d blocks of code
 //! without having to rewrite each clause multiple times.
 //!
 //! # Example
 //!
 //! ```
 //! #[macro_use]
 //! extern crate cfg_if;
 //!
@@ -23,64 +23,73 @@
 //!     }
 //! }
 //!
 //! # fn main() {}
 //! ```
 
 #![no_std]
 
-#![doc(html_root_url = "http://alexcrichton.com/cfg-if")]
+#![doc(html_root_url = "https://docs.rs/cfg-if")]
 #![deny(missing_docs)]
 #![cfg_attr(test, deny(warnings))]
 
-#[macro_export]
+#[macro_export(local_inner_macros)]
 macro_rules! cfg_if {
+    // match if/else chains with a final `else`
     ($(
         if #[cfg($($meta:meta),*)] { $($it:item)* }
     ) else * else {
         $($it2:item)*
     }) => {
-        __cfg_if_items! {
+        cfg_if! {
+            @__items
             () ;
             $( ( ($($meta),*) ($($it)*) ), )*
             ( () ($($it2)*) ),
         }
     };
+
+    // match if/else chains lacking a final `else`
     (
         if #[cfg($($i_met:meta),*)] { $($i_it:item)* }
         $(
             else if #[cfg($($e_met:meta),*)] { $($e_it:item)* }
         )*
     ) => {
-        __cfg_if_items! {
+        cfg_if! {
+            @__items
             () ;
             ( ($($i_met),*) ($($i_it)*) ),
             $( ( ($($e_met),*) ($($e_it)*) ), )*
             ( () () ),
         }
-    }
-}
+    };
 
-#[macro_export]
-#[doc(hidden)]
-macro_rules! __cfg_if_items {
-    (($($not:meta,)*) ; ) => {};
-    (($($not:meta,)*) ; ( ($($m:meta),*) ($($it:item)*) ), $($rest:tt)*) => {
-        __cfg_if_apply! { cfg(all($($m,)* not(any($($not),*)))), $($it)* }
-        __cfg_if_items! { ($($not,)* $($m,)*) ; $($rest)* }
-    }
-}
+    // Internal and recursive macro to emit all the items
+    //
+    // Collects all the negated cfgs in a list at the beginning and after the
+    // semicolon is all the remaining items
+    (@__items ($($not:meta,)*) ; ) => {};
+    (@__items ($($not:meta,)*) ; ( ($($m:meta),*) ($($it:item)*) ), $($rest:tt)*) => {
+        // Emit all items within one block, applying an approprate #[cfg]. The
+        // #[cfg] will require all `$m` matchers specified and must also negate
+        // all previous matchers.
+        cfg_if! { @__apply cfg(all($($m,)* not(any($($not),*)))), $($it)* }
 
-#[macro_export]
-#[doc(hidden)]
-macro_rules! __cfg_if_apply {
-    ($m:meta, $($it:item)*) => {
+        // Recurse to emit all other items in `$rest`, and when we do so add all
+        // our `$m` matchers to the list of `$not` matchers as future emissions
+        // will have to negate everything we just matched as well.
+        cfg_if! { @__items ($($not,)* $($m,)*) ; $($rest)* }
+    };
+
+    // Internal macro to Apply a cfg attribute to a list of items
+    (@__apply $m:meta, $($it:item)*) => {
         $(#[$m] $it)*
-    }
+    };
 }
 
 #[cfg(test)]
 mod tests {
     cfg_if! {
         if #[cfg(test)] {
             use core::option::Option as Option2;
             fn works1() -> Option2<u32> { Some(1) }
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\ No newline at end of file
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7c322","src/lib.rs":"e2917fb9f605662ec4705d8c0b3c179f2264697a761191c3ec8101748cf717dc","src/macros.rs":"c7a019fd81d31de77569036ac36fd4e404b3f20144bbf79747faf4ea21538d09","src/mem.rs":"5498de31e816f51348b8d298d4fc9568da6b0b9363146f87ca5503131d33397f","src/replacement.rs":"182c2093a6edb162183ca5990554fd7b199d3011924a8d80d894ba98ee7c479e","src/shift_jis.rs":"1c0c69ba6c123fcf720276646074660193bf9e6fa4327fe0d739a3e67874e081","src/simd_funcs.rs":"857e61c1bda9d65286c23a6c3910d6814680bbc3064bf0ff92de5bc4f3edb6f3","src/single_byte.rs":"383d325dedbf3295acd50d880db1cecc29b69efe332ae2a37367cf40bf138ac4","src/test_data/big5_in.txt":"4c5a8691f8dc717311889c63894026d2fb62725a86c4208ca274a9cc8d42a503","src/test_data/big5_in_ref.txt":"99d399e17750cf9c7cf30bb253dbfe35b81c4fcbdead93cfa48b1429213473c7","src/test_data/big5_out.txt":"6193ca97c297aa20e09396038d18e938bb7ea331c26f0f2454097296723a0b13","src/test_data/big5_out_ref.txt":"36567691f557df144f6cc520015a87038dfa156f296fcf103b56ae9a718be1fc","src/test_data/euc_kr_in.txt":"c86a7224f3215fa0d04e685622a752fdc72763e8ae076230c7fd62de57ec4074","src/test_data/euc_kr_in_ref.txt":"1f419f4ca47d708b54c73c461545a022ae2e20498fdbf8005a483d752a204883","src/test_data/euc_kr_out.txt":"e7f32e026f70be1e1b58e0047baf7d3d2c520269c4f9b9992e158b4decb0a1a3","src/test_data/euc_kr_out_ref.txt":"c9907857980b20b8e9e3b584482ed6567a2be6185d72237b6322f0404944924e","src/test_data/gb18030_in.txt":"ab7231b2d3e9afacdbd7d7f3b9e5361a7ff9f7e1cfdb4f3bd905b9362b309e53","src/test_data/gb18030_in_ref.txt":"dc5069421adca2043c55f5012b55a76fdff651d22e6e699fd0978f8d5706815c","src/test_data/gb18030_out.txt":"f0208d527f5ca63de7d9a0323be8d5cf12d8a104b2943d92c2701f0c3364dac1","src/test_data/gb18030_out_ref.txt":"6819fe47627e4ea01027003fc514b9f21a1322e732d7f1fb92cc6c5455bc6c07","src/test_data/iso_2022_jp_in.txt":"cd24bbdcb1834e25db54646fbf4c41560a13dc7540f6be3dba4f5d97d44513af","src/test_data/iso_2022_jp_in_ref.txt":"3dc4e6a5e06471942d086b16c9440945e78415f6f3f47e43717e4bc2eac2cdf5","src/test_data/iso_2022_jp_out.txt":"9b6f015329dda6c3f9ee5ce6dbd6fa9c89acc21283e886836c78b8d833480c21","src/test_data/iso_2022_jp_out_ref.txt":"78cb260093a20116ad9a42f43b05d1848c5ab100b6b9a850749809e943884b35","src/test_data/jis0208_in.txt":"6df3030553ffb0a6615bb33dc8ea9dca6d9623a9028e2ffec754ce3c3da824cc","src/test_data/jis0208_in_ref.txt":"3dc4e6a5e06471942d086b16c9440945e78415f6f3f47e43717e4bc2eac2cdf5","src/test_data/jis0208_out.txt":"4ec24477e1675ce750733bdc3c5add1cd27b6bd4ce1f09289564646e9654e857","src/test_data/jis0208_out_ref.txt":"c3e1cef5032b2b1d93a406f31ff940c4e2dfe8859b8b17ca2761fee7a75a0e48","src/test_data/jis0212_in.txt":"c011f0dd72bd7c8cd922df9374ef8d2769a77190514c77f6c62b415852eeb9fe","src/test_data/jis0212_in_ref.txt":"7d9458b3d2f73e7092a7f505c08ce1d233dde18aa679fbcf9889256239cc9e06","src/test_data/shift_jis_in.txt":"02e389ccef0dd2122e63f503899402cb7f797912c2444cc80ab93131116c5524","src/test_data/shift_jis_in_ref.txt":"512f985950ca902e643c88682dba9708b7c38d3c5ec2925168ab00ac94ab19f9","src/test_data/shift_jis_out.txt":"5fbc44da7bf639bf6cfe0fa1fd3eba7102b88f81919c9ea991302712f69426fb","src/test_data/shift_jis_out_ref.txt":"466322c6fed8286c64582731755290c2296508efdd258826e6279686649b481f","src/test_labels_names.rs":"c962c7aeac3d9ef2aca70c9e21983b231d4cf998cb06879374b0401e5149d1da","src/testing.rs":"b299d27055f3b068de66cc10a75c024b881c48bc093627c01e0b1f8bd7d94666","src/utf_16.rs":"1ec4e1c8ed7e42e4de401c6d0f64c2835bd80c2a306f358959957d30e6ff1501","src/utf_8.rs":"f639fc5dccd5dcc2458936baa942237d0fd58ac398c83ea3f48e51dceb5b6a81","src/variant.rs":"619a8e604d2febe6a874e3ad73cddf3ef9e6011480aecf86f23708b313415251","src/x_user_defined.rs":"da51def859b870ced29cb87987f02d27b220eac0f222876cb72a1dc616f9d8ec"},"package":"0535f350c60aac0b87ccf28319abc749391e912192255b0c00a2c12c6917bd73"}
\ No newline at end of file
--- a/third_party/rust/encoding_rs/Cargo.toml
+++ b/third_party/rust/encoding_rs/Cargo.toml
@@ -7,38 +7,38 @@
 #
 # If you believe there's an error in this file please file an
 # issue against the rust-lang/cargo repository. If you're
 # editing this file be aware that the upstream Cargo.toml
 # will likely look very different (and much more reasonable)
 
 [package]
 name = "encoding_rs"
-version = "0.8.14"
+version = "0.8.16"
 authors = ["Henri Sivonen <hsivonen@hsivonen.fi>"]
 description = "A Gecko-oriented implementation of the Encoding Standard"
 homepage = "https://docs.rs/encoding_rs/"
 documentation = "https://docs.rs/encoding_rs/"
 readme = "README.md"
 keywords = ["encoding", "web", "unicode", "charset"]
 categories = ["text-processing", "encoding", "web-programming", "internationalization"]
 license = "MIT/Apache-2.0"
 repository = "https://github.com/hsivonen/encoding_rs"
 [profile.release]
 lto = true
 [dependencies.cfg-if]
 version = "0.1.0"
 
+[dependencies.packed_simd]
+version = "0.3.3"
+optional = true
+
 [dependencies.serde]
 version = "1.0"
 optional = true
-
-[dependencies.simd]
-version = "0.2.3"
-optional = true
 [dev-dependencies.bincode]
 version = "0.8"
 
 [dev-dependencies.serde_derive]
 version = "1.0"
 
 [dev-dependencies.serde_json]
 version = "1.0"
@@ -48,11 +48,11 @@ fast-big5-hanzi-encode = []
 fast-gb-hanzi-encode = []
 fast-hangul-encode = []
 fast-hanja-encode = []
 fast-kanji-encode = []
 fast-legacy-encode = ["fast-hangul-encode", "fast-hanja-encode", "fast-kanji-encode", "fast-gb-hanzi-encode", "fast-big5-hanzi-encode"]
 less-slow-big5-hanzi-encode = []
 less-slow-gb-hanzi-encode = []
 less-slow-kanji-encode = []
-simd-accel = ["simd"]
+simd-accel = ["packed_simd", "packed_simd/into_bits"]
 [badges.travis-ci]
 repository = "hsivonen/encoding_rs"
--- a/third_party/rust/encoding_rs/README.md
+++ b/third_party/rust/encoding_rs/README.md
@@ -121,27 +121,49 @@ wrappers.
 * [C++](https://github.com/hsivonen/recode_cpp)
 
 ## Optional features
 
 There are currently these optional cargo features:
 
 ### `simd-accel`
 
-Enables SSE2 acceleration on x86 and x86_64 and NEON acceleration on Aarch64
-and ARMv7. _Enabling this cargo feature is recommended when building for x86,
-x86_64, ARMv7 or Aarch64._ The intention is for the functionality enabled by
-this feature to become the normal on-by-default behavior once
-[portable SIMD](https://github.com/rust-lang/rfcs/pull/2366) becames part of
-stable Rust.
+Enables SIMD acceleration using the nightly-dependent `packed_simd` crate.
+
+This is an opt-in feature, because enabling this feature _opts out_ of Rust's
+guarantees of future compilers compiling old code (aka. "stability story").
+
+Currently, this has not been tested to be an improvement except for these
+targets:
+
+* x86_64
+* i686
+* aarch64
+* thumbv7neon
 
-Enabling this feature breaks the build unless the target is x86 with SSE2
-(Rust's default 32-bit x86 target, `i686`, has SSE2, but Linux distros may
-use an x86 target without SSE2, i.e. `i586` in `rustup` terms), ARMv7 or
-thumbv7 with NEON (`-C target_feature=+neon`), x86_64 or Aarch64.
+If you use nightly Rust, you use targets whose first component is one of the
+above, and you are prepared _to have to revise your configuration when updating
+Rust_, you should enable this feature. Otherwise, please _do not_ enable this
+feature.
+
+_Note!_ If you are compiling for a target that does not have 128-bit SIMD
+enabled as part of the target definition and you are enabling 128-bit SIMD
+using `-C target_feature`, you need to enable the `core_arch` Cargo feature
+for `packed_simd` to compile a crates.io snapshot of `core_arch` instead of
+using the standard-library copy of `core::arch`, because the `core::arch`
+module of the pre-compiled standard library has been compiled with the
+assumption that the CPU doesn't have 128-bit SIMD. At present this applies
+mainly to 32-bit ARM targets whose first component does not include the
+substring `neon`.
+
+The encoding_rs side of things has not been properly set up for POWER,
+PowerPC, MIPS, etc., SIMD at this time, so even if you were to follow
+the advice from the previous paragraph, you probably shouldn't use
+the `simd-accel` option on the less mainstream architectures at this
+time.
 
 Used by Firefox.
 
 ### `serde`
 
 Enables support for serializing and deserializing `&'static Encoding`-typed
 struct fields using [Serde][1].
 
@@ -377,16 +399,24 @@ To regenerate the generated code:
 - [x] Investigate the use of NEON on 32-bit ARM.
 - [ ] ~Investigate Björn Höhrmann's lookup table acceleration for UTF-8 as
       adapted to Rust in rust-encoding.~
 - [x] Add actually fast CJK encode options.
 - [ ] ~Investigate [Bob Steagall's lookup table acceleration for UTF-8](https://github.com/BobSteagall/CppNow2018/blob/master/FastConversionFromUTF-8/Fast%20Conversion%20From%20UTF-8%20with%20C%2B%2B%2C%20DFAs%2C%20and%20SSE%20Intrinsics%20-%20Bob%20Steagall%20-%20C%2B%2BNow%202018.pdf).~
 
 ## Release Notes
 
+### 0.8.16
+
+* Switch from the `simd` crate to `packed_simd`.
+
+### 0.8.15
+
+* Adjust documentation for `simd-accel` (README-only release).
+
 ### 0.8.14
 
 * Made UTF-16 to UTF-8 encode conversion fill the output buffer as
   closely as possible.
 
 ### 0.8.13
 
 * Made the UTF-8 to UTF-16 decoder compare the number of code units written
--- a/third_party/rust/encoding_rs/build.rs
+++ b/third_party/rust/encoding_rs/build.rs
@@ -1,4 +1,12 @@
 fn main() {
+	// This does not enable `RUSTC_BOOTSTRAP=1` for `packed_simd`.
+	// You still need to knowingly have a setup that makes
+	// `packed_simd` compile. Therefore, having this file on
+	// crates.io is harmless in terms of users of `encoding_rs`
+	// accidentally depending on nightly features. Having this
+	// here means that if you knowingly want this, you only
+	// need to maintain a fork of `packed_simd` without _also_
+	// having to maintain a fork of `encoding_rs`.
     #[cfg(feature = "simd-accel")]
     println!("cargo:rustc-env=RUSTC_BOOTSTRAP=1");
 }
--- a/third_party/rust/encoding_rs/src/handles.rs
+++ b/third_party/rust/encoding_rs/src/handles.rs
@@ -29,17 +29,17 @@ use simd_funcs::*;
 #[cfg(all(
     feature = "simd-accel",
     any(
         target_feature = "sse2",
         all(target_endian = "little", target_arch = "aarch64"),
         all(target_endian = "little", target_feature = "neon")
     )
 ))]
-use simd::u16x8;
+use packed_simd::u16x8;
 
 use super::DecoderResult;
 use super::EncoderResult;
 use ascii::*;
 use utf_8::convert_utf8_to_utf16_up_to_invalid;
 use utf_8::utf8_valid_up_to;
 
 pub enum Space<T> {
--- a/third_party/rust/encoding_rs/src/lib.rs
+++ b/third_party/rust/encoding_rs/src/lib.rs
@@ -6,17 +6,17 @@
 // <LICENSE-MIT or https://opensource.org/licenses/MIT>, at your
 // option. This file may not be copied, modified, or distributed
 // except according to those terms.
 
 #![cfg_attr(
     feature = "cargo-clippy",
     allow(doc_markdown, inline_always, new_ret_no_self)
 )]
-#![doc(html_root_url = "https://docs.rs/encoding_rs/0.8.14")]
+#![doc(html_root_url = "https://docs.rs/encoding_rs/0.8.16")]
 
 //! encoding_rs is a Gecko-oriented Free Software / Open Source implementation
 //! of the [Encoding Standard](https://encoding.spec.whatwg.org/) in Rust.
 //! Gecko-oriented means that converting to and from UTF-16 is supported in
 //! addition to converting to and from UTF-8, that the performance and
 //! streamability goals are browser-oriented, and that FFI-friendliness is a
 //! goal.
 //!
@@ -660,30 +660,31 @@
 //! <tr><td>ISO-8859-9</td><td>windows-1254</td></tr>
 //! <tr><td>TIS-620</td><td>windows-874</td></tr>
 //! </tbody>
 //! </table>
 //!
 //! See the section [_UTF-16LE, UTF-16BE and Unicode Encoding Schemes_](#utf-16le-utf-16be-and-unicode-encoding-schemes)
 //! for discussion about the UTF-16 family.
 
-#![cfg_attr(feature = "simd-accel", feature(platform_intrinsics, core_intrinsics))]
+#![cfg_attr(feature = "simd-accel", feature(stdsimd, core_intrinsics))]
 
 #[macro_use]
 extern crate cfg_if;
 
 #[cfg(all(
     feature = "simd-accel",
     any(
         target_feature = "sse2",
         all(target_endian = "little", target_arch = "aarch64"),
         all(target_endian = "little", target_feature = "neon")
     )
 ))]
-extern crate simd;
+#[macro_use(shuffle)]
+extern crate packed_simd;
 
 #[cfg(feature = "serde")]
 extern crate serde;
 
 #[cfg(all(test, feature = "serde"))]
 extern crate bincode;
 #[cfg(all(test, feature = "serde"))]
 #[macro_use]
--- a/third_party/rust/encoding_rs/src/mem.rs
+++ b/third_party/rust/encoding_rs/src/mem.rs
@@ -223,18 +223,18 @@ macro_rules! by_unit_check_simd {
             accu < $bound
         }
     };
 }
 
 cfg_if! {
     if #[cfg(all(feature = "simd-accel", any(target_feature = "sse2", all(target_endian = "little", target_arch = "aarch64"), all(target_endian = "little", target_feature = "neon"))))] {
         use simd_funcs::*;
-        use simd::u8x16;
-        use simd::u16x8;
+        use packed_simd::u8x16;
+        use packed_simd::u16x8;
 
         const SIMD_ALIGNMENT: usize = 16;
 
         const SIMD_ALIGNMENT_MASK: usize = 15;
 
         by_unit_check_simd!(is_ascii_impl, u8, u8x16::splat(0), u8x16, 0x80, simd_is_ascii);
         by_unit_check_simd!(is_basic_latin_impl, u16, u16x8::splat(0), u16x8, 0x80, simd_is_basic_latin);
         by_unit_check_simd!(is_utf16_latin1_impl, u16, u16x8::splat(0), u16x8, 0x100, simd_is_latin1);
@@ -626,57 +626,52 @@ cfg_if! {
         }
     }
 }
 
 /// Checks whether the buffer is all-ASCII.
 ///
 /// May read the entire buffer even if it isn't all-ASCII. (I.e. the function
 /// is not guaranteed to fail fast.)
-#[inline]
 pub fn is_ascii(buffer: &[u8]) -> bool {
     is_ascii_impl(buffer)
 }
 
 /// Checks whether the buffer is all-Basic Latin (i.e. UTF-16 representing
 /// only ASCII characters).
 ///
 /// May read the entire buffer even if it isn't all-ASCII. (I.e. the function
 /// is not guaranteed to fail fast.)
-#[inline]
 pub fn is_basic_latin(buffer: &[u16]) -> bool {
     is_basic_latin_impl(buffer)
 }
 
 /// Checks whether the buffer is valid UTF-8 representing only code points
 /// less than or equal to U+00FF.
 ///
 /// Fails fast. (I.e. returns before having read the whole buffer if UTF-8
 /// invalidity or code points above U+00FF are discovered.
-#[inline]
 pub fn is_utf8_latin1(buffer: &[u8]) -> bool {
     is_utf8_latin1_impl(buffer).is_none()
 }
 
 /// Checks whether the buffer represents only code point less than or equal
 /// to U+00FF.
 ///
 /// Fails fast. (I.e. returns before having read the whole buffer if code
 /// points above U+00FF are discovered.
-#[inline]
 pub fn is_str_latin1(buffer: &str) -> bool {
     is_str_latin1_impl(buffer).is_none()
 }
 
 /// Checks whether the buffer represents only code point less than or equal
 /// to U+00FF.
 ///
 /// May read the entire buffer even if it isn't all-Latin1. (I.e. the function
 /// is not guaranteed to fail fast.)
-#[inline]
 pub fn is_utf16_latin1(buffer: &[u16]) -> bool {
     is_utf16_latin1_impl(buffer)
 }
 
 /// Checks whether a potentially-invalid UTF-8 buffer contains code points
 /// that trigger right-to-left processing.
 ///
 /// The check is done on a Unicode block basis without regard to assigned
@@ -1278,17 +1273,16 @@ pub fn is_str_bidi(buffer: &str) -> bool
 /// cause right-to-left behavior without the presence of right-to-left
 /// characters or right-to-left controls are not checked for. As a special
 /// case, U+FEFF is excluded from Arabic Presentation Forms-B.
 ///
 /// Returns `true` if the input contains an RTL character or an unpaired
 /// high surrogate that could be the high half of an RTL character.
 /// Returns `false` if the input contains neither RTL characters nor
 /// unpaired high surrogates that could be higher halves of RTL characters.
-#[inline]
 pub fn is_utf16_bidi(buffer: &[u16]) -> bool {
     is_utf16_bidi_impl(buffer)
 }
 
 /// Checks whether a code point triggers right-to-left processing.
 ///
 /// The check is done on a Unicode block basis without regard to assigned
 /// vs. unassigned code points in the block. Hebrew presentation forms in
@@ -1411,17 +1405,16 @@ pub fn is_utf16_code_unit_bidi(u: u16) -
 /// Checks whether a potentially invalid UTF-8 buffer contains code points
 /// that trigger right-to-left processing or is all-Latin1.
 ///
 /// Possibly more efficient than performing the checks separately.
 ///
 /// Returns `Latin1Bidi::Latin1` if `is_utf8_latin1()` would return `true`.
 /// Otherwise, returns `Latin1Bidi::Bidi` if `is_utf8_bidi()` would return
 /// `true`. Otherwise, returns `Latin1Bidi::LeftToRight`.
-#[inline]
 pub fn check_utf8_for_latin1_and_bidi(buffer: &[u8]) -> Latin1Bidi {
     if let Some(offset) = is_utf8_latin1_impl(buffer) {
         if is_utf8_bidi(&buffer[offset..]) {
             Latin1Bidi::Bidi
         } else {
             Latin1Bidi::LeftToRight
         }
     } else {
@@ -1432,17 +1425,16 @@ pub fn check_utf8_for_latin1_and_bidi(bu
 /// Checks whether a valid UTF-8 buffer contains code points
 /// that trigger right-to-left processing or is all-Latin1.
 ///
 /// Possibly more efficient than performing the checks separately.
 ///
 /// Returns `Latin1Bidi::Latin1` if `is_str_latin1()` would return `true`.
 /// Otherwise, returns `Latin1Bidi::Bidi` if `is_str_bidi()` would return
 /// `true`. Otherwise, returns `Latin1Bidi::LeftToRight`.
-#[inline]
 pub fn check_str_for_latin1_and_bidi(buffer: &str) -> Latin1Bidi {
     // The transition from the latin1 check to the bidi check isn't
     // optimal but not tweaking it to perfection today.
     if let Some(offset) = is_str_latin1_impl(buffer) {
         if is_str_bidi(&buffer[offset..]) {
             Latin1Bidi::Bidi
         } else {
             Latin1Bidi::LeftToRight
@@ -1455,33 +1447,31 @@ pub fn check_str_for_latin1_and_bidi(buf
 /// Checks whether a potentially invalid UTF-16 buffer contains code points
 /// that trigger right-to-left processing or is all-Latin1.
 ///
 /// Possibly more efficient than performing the checks separately.
 ///
 /// Returns `Latin1Bidi::Latin1` if `is_utf16_latin1()` would return `true`.
 /// Otherwise, returns `Latin1Bidi::Bidi` if `is_utf16_bidi()` would return
 /// `true`. Otherwise, returns `Latin1Bidi::LeftToRight`.
-#[inline]
 pub fn check_utf16_for_latin1_and_bidi(buffer: &[u16]) -> Latin1Bidi {
     check_utf16_for_latin1_and_bidi_impl(buffer)
 }
 
 /// Converts potentially-invalid UTF-8 to valid UTF-16 with errors replaced
 /// with the REPLACEMENT CHARACTER.
 ///
 /// The length of the destination buffer must be at least the length of the
 /// source buffer _plus one_.
 ///
 /// Returns the number of `u16`s written.
 ///
 /// # Panics
 ///
 /// Panics if the destination buffer is shorter than stated above.
-#[inline]
 pub fn convert_utf8_to_utf16(src: &[u8], dst: &mut [u16]) -> usize {
     // TODO: Can the requirement for dst to be at least one unit longer
     // be eliminated?
     assert!(dst.len() > src.len());
     let mut decoder = Utf8Decoder::new_inner();
     let mut total_read = 0usize;
     let mut total_written = 0usize;
     loop {
@@ -1511,17 +1501,16 @@ pub fn convert_utf8_to_utf16(src: &[u8],
 /// The length of the destination buffer must be at least the length of the
 /// source buffer.
 ///
 /// Returns the number of `u16`s written.
 ///
 /// # Panics
 ///
 /// Panics if the destination buffer is shorter than stated above.
-#[inline]
 pub fn convert_str_to_utf16(src: &str, dst: &mut [u16]) -> usize {
     assert!(
         dst.len() >= src.len(),
         "Destination must not be shorter than the source."
     );
     let bytes = src.as_bytes();
     let mut read = 0;
     let mut written = 0;
@@ -1678,17 +1667,16 @@ pub fn convert_utf16_to_utf8(src: &[u16]
 /// Returns the number of code units read and the number of bytes written.
 ///
 /// Not all code units are read if there isn't enough output space.
 ///
 /// Note  that this method isn't designed for general streamability but for
 /// not allocating memory for the worst case up front. Specifically,
 /// if the input starts with or ends with an unpaired surrogate, those are
 /// replaced with the REPLACEMENT CHARACTER.
-#[inline]
 pub fn convert_utf16_to_str_partial(src: &[u16], dst: &mut str) -> (usize, usize) {
     let bytes: &mut [u8] = unsafe { dst.as_bytes_mut() };
     let (read, written) = convert_utf16_to_utf8_partial(src, bytes);
     let len = bytes.len();
     let mut trail = written;
     while trail < len && ((bytes[trail] & 0xC0) == 0x80) {
         bytes[trail] = 0;
         trail += 1;
@@ -1722,17 +1710,16 @@ pub fn convert_utf16_to_str(src: &[u16],
 /// The length of the destination buffer must be at least the length of the
 /// source buffer.
 ///
 /// The number of `u16`s written equals the length of the source buffer.
 ///
 /// # Panics
 ///
 /// Panics if the destination buffer is shorter than stated above.
-#[inline]
 pub fn convert_latin1_to_utf16(src: &[u8], dst: &mut [u16]) {
     assert!(
         dst.len() >= src.len(),
         "Destination must not be shorter than the source."
     );
     // TODO: On aarch64, the safe version autovectorizes to the same unpacking
     // instructions and this code, but, yet, the autovectorized version is
     // faster.
@@ -1750,17 +1737,16 @@ pub fn convert_latin1_to_utf16(src: &[u8
 /// If the output isn't large enough, not all input is consumed.
 ///
 /// # Safety
 ///
 /// Note that this function may write garbage beyond the number of bytes
 /// indicated by the return value, so using a `&mut str` interpreted as
 /// `&mut [u8]` as the destination is not safe. If you want to convert into
 /// a `&mut str`, use `convert_utf16_to_str()` instead of this function.
-#[inline]
 pub fn convert_latin1_to_utf8_partial(src: &[u8], dst: &mut [u8]) -> (usize, usize) {
     let src_len = src.len();
     let src_ptr = src.as_ptr();
     let dst_ptr = dst.as_mut_ptr();
     let dst_len = dst.len();
     let mut total_read = 0usize;
     let mut total_written = 0usize;
     loop {
@@ -1889,17 +1875,16 @@ pub fn convert_latin1_to_str(src: &[u8],
 /// Returns the number of bytes written.
 ///
 /// # Panics
 ///
 /// Panics if the destination buffer is shorter than stated above.
 ///
 /// If debug assertions are enabled (and not fuzzing) and the input is
 /// not in the range U+0000 to U+00FF, inclusive.
-#[inline]
 pub fn convert_utf8_to_latin1_lossy(src: &[u8], dst: &mut [u8]) -> usize {
     assert!(
         dst.len() >= src.len(),
         "Destination must not be shorter than the source."
     );
     non_fuzz_debug_assert!(is_utf8_latin1(src));
     let src_len = src.len();
     let src_ptr = src.as_ptr();
@@ -1952,17 +1937,16 @@ pub fn convert_utf8_to_latin1_lossy(src:
 /// The number of bytes written equals the length of the source buffer.
 ///
 /// # Panics
 ///
 /// Panics if the destination buffer is shorter than stated above.
 ///
 /// (Probably in future versions if debug assertions are enabled (and not
 /// fuzzing) and the input is not in the range U+0000 to U+00FF, inclusive.)
-#[inline]
 pub fn convert_utf16_to_latin1_lossy(src: &[u16], dst: &mut [u8]) {
     assert!(
         dst.len() >= src.len(),
         "Destination must not be shorter than the source."
     );
     // non_fuzz_debug_assert!(is_utf16_latin1(src));
     unsafe {
         pack_latin1(src.as_ptr(), dst.as_mut_ptr(), src.len());
@@ -2025,17 +2009,16 @@ pub fn encode_latin1_lossy<'a>(string: &
     (&mut vec[..up_to]).copy_from_slice(head);
     let written = convert_utf8_to_latin1_lossy(tail, &mut vec[up_to..]);
     vec.truncate(up_to + written);
     Cow::Owned(vec)
 }
 
 /// Returns the index of the first unpaired surrogate or, if the input is
 /// valid UTF-16 in its entirety, the length of the input.
-#[inline]
 pub fn utf16_valid_up_to(buffer: &[u16]) -> usize {
     utf16_valid_up_to_impl(buffer)
 }
 
 /// Replaces unpaired surrogates in the input with the REPLACEMENT CHARACTER.
 #[inline]
 pub fn ensure_utf16_validity(buffer: &mut [u16]) {
     let mut offset = 0;
@@ -2055,17 +2038,16 @@ pub fn ensure_utf16_validity(buffer: &mu
 /// The length of the destination buffer must be at least the length of the
 /// source buffer.
 ///
 /// Returns the number of bytes written.
 ///
 /// # Panics
 ///
 /// Panics if the destination buffer is shorter than stated above.
-#[inline]
 pub fn copy_ascii_to_ascii(src: &[u8], dst: &mut [u8]) -> usize {
     assert!(
         dst.len() >= src.len(),
         "Destination must not be shorter than the source."
     );
     if let Some((_, consumed)) =
         unsafe { ascii_to_ascii(src.as_ptr(), dst.as_mut_ptr(), src.len()) }
     {
@@ -2082,17 +2064,16 @@ pub fn copy_ascii_to_ascii(src: &[u8], d
 /// The length of the destination buffer must be at least the length of the
 /// source buffer.
 ///
 /// Returns the number of `u16`s written.
 ///
 /// # Panics
 ///
 /// Panics if the destination buffer is shorter than stated above.
-#[inline]
 pub fn copy_ascii_to_basic_latin(src: &[u8], dst: &mut [u16]) -> usize {
     assert!(
         dst.len() >= src.len(),
         "Destination must not be shorter than the source."
     );
     if let Some((_, consumed)) =
         unsafe { ascii_to_basic_latin(src.as_ptr(), dst.as_mut_ptr(), src.len()) }
     {
@@ -2109,17 +2090,16 @@ pub fn copy_ascii_to_basic_latin(src: &[
 /// The length of the destination buffer must be at least the length of the
 /// source buffer.
 ///
 /// Returns the number of bytes written.
 ///
 /// # Panics
 ///
 /// Panics if the destination buffer is shorter than stated above.
-#[inline]
 pub fn copy_basic_latin_to_ascii(src: &[u16], dst: &mut [u8]) -> usize {
     assert!(
         dst.len() >= src.len(),
         "Destination must not be shorter than the source."
     );
     if let Some((_, consumed)) =
         unsafe { basic_latin_to_ascii(src.as_ptr(), dst.as_mut_ptr(), src.len()) }
     {
--- a/third_party/rust/encoding_rs/src/simd_funcs.rs
+++ b/third_party/rust/encoding_rs/src/simd_funcs.rs
@@ -2,19 +2,19 @@
 // file at the top-level directory of this distribution.
 //
 // Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
 // https://www.apache.org/licenses/LICENSE-2.0> or the MIT license
 // <LICENSE-MIT or https://opensource.org/licenses/MIT>, at your
 // option. This file may not be copied, modified, or distributed
 // except according to those terms.
 
-use simd::u16x8;
-use simd::u8x16;
-use simd::Simd;
+use packed_simd::u16x8;
+use packed_simd::u8x16;
+use packed_simd::FromBits;
 
 // TODO: Migrate unaligned access to stdlib code if/when the RFC
 // https://github.com/rust-lang/rfcs/pull/1725 is implemented.
 
 #[inline(always)]
 pub unsafe fn load16_unaligned(ptr: *const u8) -> u8x16 {
     let mut simd = ::std::mem::uninitialized();
     ::std::ptr::copy_nonoverlapping(ptr, &mut simd as *mut u8x16 as *mut u8, 16);
@@ -57,24 +57,39 @@ pub unsafe fn store8_unaligned(ptr: *mut
 }
 
 #[allow(dead_code)]
 #[inline(always)]
 pub unsafe fn store8_aligned(ptr: *mut u16, s: u16x8) {
     *(ptr as *mut u16x8) = s;
 }
 
-extern "platform-intrinsic" {
-    fn simd_shuffle16<T: Simd, U: Simd<Elem = T::Elem>>(x: T, y: T, idx: [u32; 16]) -> U;
+cfg_if! {
+    if #[cfg(all(target_feature = "sse2", target_arch = "x86_64"))] {
+        use std::arch::x86_64::__m128i;
+        use std::arch::x86_64::_mm_movemask_epi8;
+        use std::arch::x86_64::_mm_packus_epi16;
+    } else if #[cfg(all(target_feature = "sse2", target_arch = "x86"))] {
+        use std::arch::x86::__m128i;
+        use std::arch::x86::_mm_movemask_epi8;
+        use std::arch::x86::_mm_packus_epi16;
+    } else if #[cfg(target_arch = "aarch64")]{
+        use std::arch::aarch64::uint8x16_t;
+        use std::arch::aarch64::uint16x8_t;
+        use std::arch::aarch64::vmaxvq_u8;
+        use std::arch::aarch64::vmaxvq_u16;
+    } else {
+
+    }
 }
 
 // #[inline(always)]
 // fn simd_byte_swap_u8(s: u8x16) -> u8x16 {
 //     unsafe {
-//         simd_shuffle16(s, s, [1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14])
+//         shuffle!(s, s, [1, 0, 3, 2, 5, 4, 7, 6, 9, 8, 11, 10, 13, 12, 15, 14])
 //     }
 // }
 
 // #[inline(always)]
 // pub fn simd_byte_swap(s: u16x8) -> u16x8 {
 //     to_u16_lanes(simd_byte_swap_u8(to_u8_lanes(s)))
 // }
 
@@ -82,66 +97,49 @@ extern "platform-intrinsic" {
 pub fn simd_byte_swap(s: u16x8) -> u16x8 {
     let left = s << 8;
     let right = s >> 8;
     left | right
 }
 
 #[inline(always)]
 pub fn to_u16_lanes(s: u8x16) -> u16x8 {
-    unsafe { ::std::mem::transmute(s) }
+    u16x8::from_bits(s)
 }
 
-// #[inline(always)]
-// pub fn to_u8_lanes(s: u16x8) -> u8x16 {
-//     unsafe { ::std::mem::transmute(s) }
-// }
-
 cfg_if! {
     if #[cfg(target_feature = "sse2")] {
 
-        use simd::i16x8;
-        use simd::i8x16;
-        extern "platform-intrinsic" {
-            fn x86_mm_movemask_epi8(x: i8x16) -> i32;
-        }
-
         // Expose low-level mask instead of higher-level conclusion,
         // because the non-ASCII case would perform less well otherwise.
         #[inline(always)]
         pub fn mask_ascii(s: u8x16) -> i32 {
             unsafe {
-                let signed: i8x16 = ::std::mem::transmute_copy(&s);
-                x86_mm_movemask_epi8(signed)
+                _mm_movemask_epi8(__m128i::from_bits(s))
             }
         }
 
     } else {
 
     }
 }
 
 cfg_if! {
     if #[cfg(target_feature = "sse2")] {
         #[inline(always)]
         pub fn simd_is_ascii(s: u8x16) -> bool {
             unsafe {
-                let signed: i8x16 = ::std::mem::transmute_copy(&s);
-                x86_mm_movemask_epi8(signed) == 0
+                _mm_movemask_epi8(__m128i::from_bits(s)) == 0
             }
         }
     } else if #[cfg(target_arch = "aarch64")]{
-        extern "platform-intrinsic" {
-            fn aarch64_vmaxvq_u8(x: u8x16) -> u8;
-        }
-
         #[inline(always)]
         pub fn simd_is_ascii(s: u8x16) -> bool {
             unsafe {
-                aarch64_vmaxvq_u8(s) < 0x80
+                vmaxvq_u8(uint8x16_t::from_bits(s)) < 0x80
             }
         }
     } else {
         #[inline(always)]
         pub fn simd_is_ascii(s: u8x16) -> bool {
             // This optimizes better on ARM than
             // the lt formulation.
             let highest_ascii = u8x16::splat(0x7F);
@@ -159,45 +157,41 @@ cfg_if! {
             }
             let above_str_latin1 = u8x16::splat(0xC4);
             s.lt(above_str_latin1).all()
         }
     } else if #[cfg(target_arch = "aarch64")]{
         #[inline(always)]
         pub fn simd_is_str_latin1(s: u8x16) -> bool {
             unsafe {
-                aarch64_vmaxvq_u8(s) < 0xC4
+                vmaxvq_u8(uint8x16_t::from_bits(s)) < 0xC4
             }
         }
     } else {
         #[inline(always)]
         pub fn simd_is_str_latin1(s: u8x16) -> bool {
             let above_str_latin1 = u8x16::splat(0xC4);
             s.lt(above_str_latin1).all()
         }
     }
 }
 
 cfg_if! {
     if #[cfg(target_arch = "aarch64")]{
-        extern "platform-intrinsic" {
-            fn aarch64_vmaxvq_u16(x: u16x8) -> u16;
-        }
-
         #[inline(always)]
         pub fn simd_is_basic_latin(s: u16x8) -> bool {
             unsafe {
-                aarch64_vmaxvq_u16(s) < 0x80
+                vmaxvq_u16(uint16x8_t::from_bits(s)) < 0x80
             }
         }
 
         #[inline(always)]
         pub fn simd_is_latin1(s: u16x8) -> bool {
             unsafe {
-                aarch64_vmaxvq_u16(s) < 0x100
+                vmaxvq_u16(uint16x8_t::from_bits(s)) < 0x100
             }
         }
     } else {
         #[inline(always)]
         pub fn simd_is_basic_latin(s: u16x8) -> bool {
             let above_ascii = u16x8::splat(0x80);
             s.lt(above_ascii).all()
         }
@@ -220,17 +214,17 @@ pub fn contains_surrogates(s: u16x8) -> 
     (s & mask).eq(surrogate_bits).any()
 }
 
 cfg_if! {
     if #[cfg(target_arch = "aarch64")]{
         macro_rules! aarch64_return_false_if_below_hebrew {
             ($s:ident) => ({
                 unsafe {
-                    if aarch64_vmaxvq_u16($s) < 0x0590 {
+                    if vmaxvq_u16(uint16x8_t::from_bits($s)) < 0x0590 {
                         return false;
                     }
                 }
             })
         }
 
         macro_rules! non_aarch64_return_false_if_all {
             ($s:ident) => ()
@@ -287,57 +281,48 @@ pub fn is_u16x8_bidi(s: u16x8) -> bool {
         | s.eq(u16x8::splat(0x202E))
         | s.eq(u16x8::splat(0x2067)))
     .any()
 }
 
 #[inline(always)]
 pub fn simd_unpack(s: u8x16) -> (u16x8, u16x8) {
     unsafe {
-        let first: u8x16 = simd_shuffle16(
+        let first: u8x16 = shuffle!(
             s,
             u8x16::splat(0),
-            [0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23],
+            [0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23]
         );
-        let second: u8x16 = simd_shuffle16(
+        let second: u8x16 = shuffle!(
             s,
             u8x16::splat(0),
-            [8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31],
+            [8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31]
         );
-        (
-            ::std::mem::transmute_copy(&first),
-            ::std::mem::transmute_copy(&second),
-        )
+        (u16x8::from_bits(first), u16x8::from_bits(second))
     }
 }
 
 cfg_if! {
     if #[cfg(target_feature = "sse2")] {
-        extern "platform-intrinsic" {
-            fn x86_mm_packus_epi16(x: i16x8, y: i16x8) -> u8x16;
-        }
-
         #[inline(always)]
         pub fn simd_pack(a: u16x8, b: u16x8) -> u8x16 {
             unsafe {
-                let first: i16x8 = ::std::mem::transmute_copy(&a);
-                let second: i16x8 = ::std::mem::transmute_copy(&b);
-                x86_mm_packus_epi16(first, second)
+                u8x16::from_bits(_mm_packus_epi16(__m128i::from_bits(a), __m128i::from_bits(b)))
             }
         }
     } else {
         #[inline(always)]
         pub fn simd_pack(a: u16x8, b: u16x8) -> u8x16 {
             unsafe {
-                let first: u8x16 = ::std::mem::transmute_copy(&a);
-                let second: u8x16 = ::std::mem::transmute_copy(&b);
-                simd_shuffle16(
+                let first = u8x16::from_bits(a);
+                let second = u8x16::from_bits(b);
+                shuffle!(
                     first,
                     second,
-                    [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30],
+                    [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30]
                 )
             }
         }
     }
 }
 
 #[cfg(test)]
 mod tests {
--- a/third_party/rust/encoding_rs/src/x_user_defined.rs
+++ b/third_party/rust/encoding_rs/src/x_user_defined.rs
@@ -9,25 +9,22 @@
 
 use super::*;
 use handles::*;
 use variant::*;
 
 cfg_if! {
     if #[cfg(feature = "simd-accel")] {
         use simd_funcs::*;
-        use simd::u16x8;
+        use packed_simd::u16x8;
 
         #[inline(always)]
         fn shift_upper(unpacked: u16x8) -> u16x8 {
             let highest_ascii = u16x8::splat(0x7F);
-            let offset = u16x8::splat(0xF700);
-            let mask = unpacked.gt(highest_ascii).to_repr().to_u16();
-            unpacked + (offset & mask)
-        }
+            unpacked + unpacked.gt(highest_ascii).select(u16x8::splat(0xF700), u16x8::splat(0))        }
     } else {
     }
 }
 
 pub struct UserDefinedDecoder;
 
 impl UserDefinedDecoder {
     pub fn new() -> VariantDecoder {
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/.cargo-checksum.json
@@ -0,0 +1,1 @@
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\ No newline at end of file
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/Cargo.toml
@@ -0,0 +1,67 @@
+# THIS FILE IS AUTOMATICALLY GENERATED BY CARGO
+#
+# When uploading crates to the registry Cargo will automatically
+# "normalize" Cargo.toml files for maximal compatibility
+# with all versions of Cargo and also rewrite `path` dependencies
+# to registry (e.g. crates.io) dependencies
+#
+# If you believe there's an error in this file please file an
+# issue against the rust-lang/cargo repository. If you're
+# editing this file be aware that the upstream Cargo.toml
+# will likely look very different (and much more reasonable)
+
+[package]
+edition = "2018"
+name = "packed_simd"
+version = "0.3.3"
+authors = ["Gonzalo Brito Gadeschi <gonzalobg88@gmail.com>"]
+build = "build.rs"
+description = "Portable Packed SIMD vectors"
+homepage = "https://github.com/rust-lang-nursery/packed_simd"
+documentation = "https://docs.rs/crate/packed_simd/"
+keywords = ["simd", "vector", "portability"]
+categories = ["hardware-support", "concurrency", "no-std", "data-structures"]
+license = "MIT/Apache-2.0"
+repository = "https://github.com/rust-lang-nursery/packed_simd"
+[dependencies.cfg-if]
+version = "^0.1"
+
+[dependencies.core_arch]
+version = "^0.1.3"
+optional = true
+[dev-dependencies.arrayvec]
+version = "^0.4"
+default-features = false
+
+[dev-dependencies.paste]
+version = "^0.1.3"
+
+[features]
+default = []
+into_bits = []
+libcore_neon = []
+[target."cfg(target_arch = \"x86_64\")".dependencies.sleef-sys]
+version = "^0.1.2"
+optional = true
+[target.wasm32-unknown-unknown.dev-dependencies.wasm-bindgen]
+version = "=0.2.19"
+
+[target.wasm32-unknown-unknown.dev-dependencies.wasm-bindgen-test]
+version = "=0.2.19"
+[badges.appveyor]
+repository = "rust-lang-nursery/packed_simd"
+
+[badges.codecov]
+repository = "rust-lang-nursery/packed_simd"
+
+[badges.is-it-maintained-issue-resolution]
+repository = "rust-lang-nursery/packed_simd"
+
+[badges.is-it-maintained-open-issues]
+repository = "rust-lang-nursery/packed_simd"
+
+[badges.maintenance]
+status = "experimental"
+
+[badges.travis-ci]
+repository = "rust-lang-nursery/packed_simd"
rename from third_party/rust/simd/LICENSE-APACHE
rename to third_party/rust/packed_simd/LICENSE-APACHE
rename from third_party/rust/simd/LICENSE-MIT
rename to third_party/rust/packed_simd/LICENSE-MIT
--- a/third_party/rust/simd/LICENSE-MIT
+++ b/third_party/rust/packed_simd/LICENSE-MIT
@@ -1,9 +1,9 @@
-Copyright (c) 2014 Huon Wilson
+Copyright (c) 2014 The Rust Project Developers
 
 Permission is hereby granted, free of charge, to any
 person obtaining a copy of this software and associated
 documentation files (the "Software"), to deal in the
 Software without restriction, including without
 limitation the rights to use, copy, modify, merge,
 publish, distribute, sublicense, and/or sell copies of
 the Software, and to permit persons to whom the Software
@@ -17,9 +17,9 @@ of the Software.
 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF
 ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED
 TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
 PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT
 SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
 CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
 IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-DEALINGS IN THE SOFTWARE.
\ No newline at end of file
+DEALINGS IN THE SOFTWARE.
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/bors.toml
@@ -0,0 +1,3 @@
+status = [
+    "continuous-integration/travis-ci/push"
+]
\ No newline at end of file
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/build.rs
@@ -0,0 +1,7 @@
+fn main() {
+    let target = std::env::var("TARGET")
+        .expect("TARGET environment variable not defined");
+    if target.contains("neon") {
+        println!("cargo:rustc-cfg=libcore_neon");
+    }
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/all.sh
@@ -0,0 +1,64 @@
+#!/usr/bin/env bash
+#
+# Performs an operation on all targets
+
+set -ex
+
+: ${1?"The all.sh script requires one argument."}
+
+op=$1
+
+cargo_clean() {
+    cargo clean
+}
+
+cargo_check_fmt() {
+    cargo fmt --all -- --check
+}
+
+cargo_fmt() {
+    cargo fmt --all
+}
+
+cargo_clippy() {
+    cargo clippy --all -- -D clippy::pedantic
+}
+
+CMD="-1"
+
+case $op in
+    clean*)
+        CMD=cargo_clean
+        ;;
+    check_fmt*)
+        CMD=cargo_check_fmt
+        ;;
+    fmt*)
+        CMD=cargo_fmt
+        ;;
+    clippy)
+        CMD=cargo_clippy
+        ;;
+    *)
+        echo "Unknown operation: \"${op}\""
+        exit 1
+        ;;
+esac
+
+echo "Operation is: ${CMD}"
+
+# On src/
+$CMD
+
+# Check examples/
+for dir in examples/*/
+do
+    dir=${dir%*/}
+    cd ${dir%*/}
+    $CMD
+    cd -
+done
+
+cd verify/verify
+$CMD
+cd -
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/android-install-ndk.sh
@@ -0,0 +1,37 @@
+#!/usr/bin/env sh
+# Copyright 2016 The Rust Project Developers. See the COPYRIGHT
+# file at the top-level directory of this distribution and at
+# http://rust-lang.org/COPYRIGHT.
+#
+# Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
+# http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
+# <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
+# option. This file may not be copied, modified, or distributed
+# except according to those terms.
+
+set -ex
+
+curl --retry 5 -O https://dl.google.com/android/repository/android-ndk-r15b-linux-x86_64.zip
+unzip -q android-ndk-r15b-linux-x86_64.zip
+
+case "$1" in
+    aarch64)
+        arch=arm64
+        ;;
+
+    i686)
+        arch=x86
+        ;;
+
+    *)
+        arch=$1
+        ;;
+esac;
+
+android-ndk-r15b/build/tools/make_standalone_toolchain.py \
+    --unified-headers \
+    --install-dir "/android/ndk-${1}" \
+    --arch "${arch}" \
+    --api 24
+
+rm -rf ./android-ndk-r15b-linux-x86_64.zip ./android-ndk-r15b
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/android-install-sdk.sh
@@ -0,0 +1,60 @@
+#!/usr/bin/env sh
+# Copyright 2016 The Rust Project Developers. See the COPYRIGHT
+# file at the top-level directory of this distribution and at
+# http://rust-lang.org/COPYRIGHT.
+#
+# Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
+# http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
+# <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
+# option. This file may not be copied, modified, or distributed
+# except according to those terms.
+
+set -ex
+
+# Prep the SDK and emulator
+#
+# Note that the update process requires that we accept a bunch of licenses, and
+# we can't just pipe `yes` into it for some reason, so we take the same strategy
+# located in https://github.com/appunite/docker by just wrapping it in a script
+# which apparently magically accepts the licenses.
+
+mkdir sdk
+curl --retry 5 https://dl.google.com/android/repository/sdk-tools-linux-3859397.zip -O
+unzip -d sdk sdk-tools-linux-3859397.zip
+
+case "$1" in
+  arm | armv7)
+    abi=armeabi-v7a
+    ;;
+
+  aarch64)
+    abi=arm64-v8a
+    ;;
+
+  i686)
+    abi=x86
+    ;;
+
+  x86_64)
+    abi=x86_64
+    ;;
+
+  *)
+    echo "invalid arch: $1"
+    exit 1
+    ;;
+esac;
+
+# --no_https avoids
+     # javax.net.ssl.SSLHandshakeException: sun.security.validator.ValidatorException: No trusted certificate found
+yes | ./sdk/tools/bin/sdkmanager --licenses --no_https
+yes | ./sdk/tools/bin/sdkmanager --no_https \
+        "emulator" \
+        "platform-tools" \
+        "platforms;android-24" \
+        "system-images;android-24;default;$abi"
+
+echo "no" |
+    ./sdk/tools/bin/avdmanager create avd \
+        --name "${1}" \
+        --package "system-images;android-24;default;$abi"
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/android-sysimage.sh
@@ -0,0 +1,56 @@
+#!/usr/bin/env bash
+
+# Copyright 2017 The Rust Project Developers. See the COPYRIGHT
+# file at the top-level directory of this distribution and at
+# http://rust-lang.org/COPYRIGHT.
+#
+# Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
+# http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
+# <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
+# option. This file may not be copied, modified, or distributed
+# except according to those terms.
+
+set -ex
+
+URL=https://dl.google.com/android/repository/sys-img/android
+
+main() {
+    local arch="${1}"
+    local name="${2}"
+    local dest=/system
+    local td
+    td="$(mktemp -d)"
+
+    apt-get install --no-install-recommends e2tools
+
+    pushd "${td}"
+    curl --retry 5 -O "${URL}/${name}"
+    unzip -q "${name}"
+
+    local system
+    system="$(find . -name system.img)"
+    mkdir -p ${dest}/{bin,lib,lib64}
+
+    # Extract android linker and libraries to /system
+    # This allows android executables to be run directly (or with qemu)
+    if [ "${arch}" = "x86_64" ] || [ "${arch}" = "arm64" ]; then
+        e2cp -p "${system}:/bin/linker64" "${dest}/bin/"
+        e2cp -p "${system}:/lib64/libdl.so" "${dest}/lib64/"
+        e2cp -p "${system}:/lib64/libc.so" "${dest}/lib64/"
+        e2cp -p "${system}:/lib64/libm.so" "${dest}/lib64/"
+    else
+        e2cp -p "${system}:/bin/linker" "${dest}/bin/"
+        e2cp -p "${system}:/lib/libdl.so" "${dest}/lib/"
+        e2cp -p "${system}:/lib/libc.so" "${dest}/lib/"
+        e2cp -p "${system}:/lib/libm.so" "${dest}/lib/"
+    fi
+
+    # clean up
+    apt-get purge --auto-remove -y e2tools
+
+    popd
+
+    rm -rf "${td}"
+}
+
+main "${@}"
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/benchmark.sh
@@ -0,0 +1,32 @@
+#!/usr/bin/env bash
+#
+# Runs all benchmarks. Controlled by the following environment variables:
+#
+# FEATURES={} - cargo features to pass to all benchmarks (e.g. core_arch,sleef-sys,ispc)
+# NORUN={1}   - only builds the benchmarks
+
+set -ex
+
+if [[ ${NORUN} != 1 ]]; then
+    # Most benchmarks require hyperfine; require it upfront.
+    hash hyperfine 2>/dev/null || { echo >&2 "hyperfine is not in PATH."; exit 1; }
+fi
+
+
+# If the ispc benchmark feature is enabled, ispc must be in the path of the
+# benchmarks. 
+if echo "$FEATURES" | grep -q "ispc"; then
+    hash ispc 2>/dev/null || { echo >&2 "ispc is not in PATH."; exit 1; }
+fi
+
+# An example with a benchmark.sh is a benchmark:
+for dir in examples/*/
+do
+    dir=${dir%*/}
+    cd ${dir%*/}
+    if [ -f "benchmark.sh" ]; then
+        ./benchmark.sh
+    fi
+    cd -
+done
+
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/deploy_and_run_on_ios_simulator.rs
@@ -0,0 +1,176 @@
+// Copyright 2017 The Rust Project Developers. See the COPYRIGHT
+// file at the top-level directory of this distribution and at
+// http://rust-lang.org/COPYRIGHT.
+//
+// Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
+// http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
+// <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
+// option. This file may not be copied, modified, or distributed
+// except according to those terms.
+
+// This is a script to deploy and execute a binary on an iOS simulator.
+// The primary use of this is to be able to run unit tests on the simulator and
+// retrieve the results.
+//
+// To do this through Cargo instead, use Dinghy
+// (https://github.com/snipsco/dinghy): cargo dinghy install, then cargo dinghy
+// test.
+
+use std::env;
+use std::fs::{self, File};
+use std::io::Write;
+use std::path::Path;
+use std::process;
+use std::process::Command;
+
+macro_rules! t {
+    ($e:expr) => (match $e {
+        Ok(e) => e,
+        Err(e) => panic!("{} failed with: {}", stringify!($e), e),
+    })
+}
+
+// Step one: Wrap as an app
+fn package_as_simulator_app(crate_name: &str, test_binary_path: &Path) {
+    println!("Packaging simulator app");
+    drop(fs::remove_dir_all("ios_simulator_app"));
+    t!(fs::create_dir("ios_simulator_app"));
+    t!(fs::copy(test_binary_path,
+                Path::new("ios_simulator_app").join(crate_name)));
+
+    let mut f = t!(File::create("ios_simulator_app/Info.plist"));
+    t!(f.write_all(format!(r#"
+        <?xml version="1.0" encoding="UTF-8"?>
+        <!DOCTYPE plist PUBLIC
+                "-//Apple//DTD PLIST 1.0//EN"
+                "http://www.apple.com/DTDs/PropertyList-1.0.dtd">
+        <plist version="1.0">
+            <dict>
+                <key>CFBundleExecutable</key>
+                <string>{}</string>
+                <key>CFBundleIdentifier</key>
+                <string>com.rust.unittests</string>
+            </dict>
+        </plist>
+    "#, crate_name).as_bytes()));
+}
+
+// Step two: Start the iOS simulator
+fn start_simulator() {
+    println!("Looking for iOS simulator");
+    let output = t!(Command::new("xcrun").arg("simctl").arg("list").output());
+    assert!(output.status.success());
+    let mut simulator_exists = false;
+    let mut simulator_booted = false;
+    let mut found_rust_sim = false;
+    let stdout = t!(String::from_utf8(output.stdout));
+    for line in stdout.lines() {
+        if line.contains("rust_ios") {
+            if found_rust_sim {
+                panic!("Duplicate rust_ios simulators found. Please \
+                        double-check xcrun simctl list.");
+            }
+            simulator_exists = true;
+            simulator_booted = line.contains("(Booted)");
+            found_rust_sim = true;
+        }
+    }
+
+    if simulator_exists == false {
+        println!("Creating iOS simulator");
+        Command::new("xcrun")
+                .arg("simctl")
+                .arg("create")
+                .arg("rust_ios")
+                .arg("com.apple.CoreSimulator.SimDeviceType.iPhone-SE")
+                .arg("com.apple.CoreSimulator.SimRuntime.iOS-10-2")
+                .check_status();
+    } else if simulator_booted == true {
+        println!("Shutting down already-booted simulator");
+        Command::new("xcrun")
+                .arg("simctl")
+                .arg("shutdown")
+                .arg("rust_ios")
+                .check_status();
+    }
+
+    println!("Starting iOS simulator");
+    // We can't uninstall the app (if present) as that will hang if the
+    // simulator isn't completely booted; just erase the simulator instead.
+    Command::new("xcrun").arg("simctl").arg("erase").arg("rust_ios").check_status();
+    Command::new("xcrun").arg("simctl").arg("boot").arg("rust_ios").check_status();
+}
+
+// Step three: Install the app
+fn install_app_to_simulator() {
+    println!("Installing app to simulator");
+    Command::new("xcrun")
+            .arg("simctl")
+            .arg("install")
+            .arg("booted")
+            .arg("ios_simulator_app/")
+            .check_status();
+}
+
+// Step four: Run the app
+fn run_app_on_simulator() {
+    println!("Running app");
+    let output = t!(Command::new("xcrun")
+                    .arg("simctl")
+                    .arg("launch")
+                    .arg("--console")
+                    .arg("booted")
+                    .arg("com.rust.unittests")
+                    .output());
+
+    println!("stdout --\n{}\n", String::from_utf8_lossy(&output.stdout));
+    println!("stderr --\n{}\n", String::from_utf8_lossy(&output.stderr));
+
+    let stdout = String::from_utf8_lossy(&output.stdout);
+    let failed = stdout.lines()
+        .find(|l| l.contains("FAILED"))
+        .map(|l| l.contains("FAILED"))
+        .unwrap_or(false);
+
+    let passed = stdout.lines()
+        .find(|l| l.contains("test result: ok"))
+        .map(|l| l.contains("test result: ok"))
+        .unwrap_or(false);
+
+    println!("Shutting down simulator");
+    Command::new("xcrun")
+        .arg("simctl")
+        .arg("shutdown")
+        .arg("rust_ios")
+        .check_status();
+    if !(passed && !failed) {
+        panic!("tests didn't pass");
+    }
+}
+
+trait CheckStatus {
+    fn check_status(&mut self);
+}
+
+impl CheckStatus for Command {
+    fn check_status(&mut self) {
+        println!("\trunning: {:?}", self);
+        assert!(t!(self.status()).success());
+    }
+}
+
+fn main() {
+    let args: Vec<String> = env::args().collect();
+    if args.len() != 2 {
+        println!("Usage: {} <executable>", args[0]);
+        process::exit(-1);
+    }
+
+    let test_binary_path = Path::new(&args[1]);
+    let crate_name = test_binary_path.file_name().unwrap();
+
+    package_as_simulator_app(crate_name.to_str().unwrap(), test_binary_path);
+    start_simulator();
+    install_app_to_simulator();
+    run_app_on_simulator();
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/aarch64-linux-android/Dockerfile
@@ -0,0 +1,47 @@
+FROM ubuntu:16.04
+
+RUN dpkg --add-architecture i386 && \
+    apt-get update && \
+    apt-get install -y --no-install-recommends \
+  file \
+  make \
+  curl \
+  ca-certificates \
+  python \
+  unzip \
+  expect \
+  openjdk-9-jre \
+  libstdc++6:i386 \
+  libpulse0 \
+  gcc \
+  libc6-dev
+
+WORKDIR /android/
+COPY android* /android/
+
+ENV ANDROID_ARCH=aarch64
+ENV PATH=$PATH:/android/ndk-$ANDROID_ARCH/bin:/android/sdk/tools:/android/sdk/platform-tools
+
+RUN sh /android/android-install-ndk.sh $ANDROID_ARCH
+RUN sh /android/android-install-sdk.sh $ANDROID_ARCH
+RUN mv /root/.android /tmp
+RUN chmod 777 -R /tmp/.android
+RUN chmod 755 /android/sdk/tools/* /android/sdk/emulator/qemu/linux-x86_64/*
+
+ENV PATH=$PATH:/rust/bin \
+    CARGO_TARGET_AARCH64_LINUX_ANDROID_LINKER=aarch64-linux-android-gcc \
+    CARGO_TARGET_AARCH64_LINUX_ANDROID_RUNNER=/tmp/runtest \
+    OBJDUMP=aarch64-linux-android-objdump \
+    HOME=/tmp
+
+ADD runtest-android.rs /tmp/runtest.rs
+ENTRYPOINT [ \
+  "bash", \
+  "-c", \
+  # set SHELL so android can detect a 64bits system, see
+  # http://stackoverflow.com/a/41789144
+  "SHELL=/bin/dash /android/sdk/emulator/emulator @aarch64 -no-window & \
+   rustc /tmp/runtest.rs -o /tmp/runtest && \
+   exec \"$@\"", \
+  "--" \
+]
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/aarch64-unknown-linux-gnu/Dockerfile
@@ -0,0 +1,14 @@
+FROM ubuntu:17.10
+RUN apt-get update && apt-get install -y --no-install-recommends \
+  gcc \
+  ca-certificates \
+  libc6-dev \
+  gcc-aarch64-linux-gnu \
+  libc6-dev-arm64-cross \
+  qemu-user \
+  make \
+  file
+
+ENV CARGO_TARGET_AARCH64_UNKNOWN_LINUX_GNU_LINKER=aarch64-linux-gnu-gcc \
+    CARGO_TARGET_AARCH64_UNKNOWN_LINUX_GNU_RUNNER="qemu-aarch64 -L /usr/aarch64-linux-gnu" \
+    OBJDUMP=aarch64-linux-gnu-objdump
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/arm-linux-androideabi/Dockerfile
@@ -0,0 +1,47 @@
+FROM ubuntu:16.04
+
+RUN dpkg --add-architecture i386 && \
+    apt-get update && \
+    apt-get install -y --no-install-recommends \
+  file \
+  make \
+  curl \
+  ca-certificates \
+  python \
+  unzip \
+  expect \
+  openjdk-9-jre \
+  libstdc++6:i386 \
+  libpulse0 \
+  gcc \
+  libc6-dev
+
+WORKDIR /android/
+COPY android* /android/
+
+ENV ANDROID_ARCH=arm
+ENV PATH=$PATH:/android/ndk-$ANDROID_ARCH/bin:/android/sdk/tools:/android/sdk/platform-tools
+
+RUN sh /android/android-install-ndk.sh $ANDROID_ARCH
+RUN sh /android/android-install-sdk.sh $ANDROID_ARCH
+RUN mv /root/.android /tmp
+RUN chmod 777 -R /tmp/.android
+RUN chmod 755 /android/sdk/tools/* /android/sdk/emulator/qemu/linux-x86_64/*
+
+ENV PATH=$PATH:/rust/bin \
+    CARGO_TARGET_ARM_LINUX_ANDROIDEABI_LINKER=arm-linux-androideabi-gcc \
+    CARGO_TARGET_ARM_LINUX_ANDROIDEABI_RUNNER=/tmp/runtest \
+    OBJDUMP=arm-linux-androideabi-objdump \
+    HOME=/tmp
+
+ADD runtest-android.rs /tmp/runtest.rs
+ENTRYPOINT [ \
+  "bash", \
+  "-c", \
+  # set SHELL so android can detect a 64bits system, see
+  # http://stackoverflow.com/a/41789144
+  "SHELL=/bin/dash /android/sdk/emulator/emulator @arm -no-window & \
+   rustc /tmp/runtest.rs -o /tmp/runtest && \
+   exec \"$@\"", \
+  "--" \
+]
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/arm-unknown-linux-gnueabi/Dockerfile
@@ -0,0 +1,15 @@
+FROM ubuntu:17.10
+RUN apt-get update && apt-get install -y --no-install-recommends \
+  gcc \
+  ca-certificates \
+  libc6-dev \
+  libc6-armel-cross \
+  libc6-dev-armel-cross \
+  binutils-arm-linux-gnueabi \
+  gcc-arm-linux-gnueabi \
+  qemu-user \
+  make \
+  file
+ENV CARGO_TARGET_ARM_UNKNOWN_LINUX_GNUEABI_LINKER=arm-linux-gnueabi-gcc \
+    CARGO_TARGET_ARM_UNKNOWN_LINUX_GNUEABI_RUNNER="qemu-arm -L /usr/arm-linux-gnueabi" \
+    OBJDUMP=arm-linux-gnueabi-objdump
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/arm-unknown-linux-gnueabihf/Dockerfile
@@ -0,0 +1,13 @@
+FROM ubuntu:17.10
+RUN apt-get update && apt-get install -y --no-install-recommends \
+  gcc \
+  ca-certificates \
+  libc6-dev \
+  gcc-arm-linux-gnueabihf \
+  libc6-dev-armhf-cross \
+  qemu-user \
+  make \
+  file
+ENV CARGO_TARGET_ARM_UNKNOWN_LINUX_GNUEABIHF_LINKER=arm-linux-gnueabihf-gcc \
+    CARGO_TARGET_ARM_UNKNOWN_LINUX_GNUEABIHF_RUNNER="qemu-arm -L /usr/arm-linux-gnueabihf" \
+    OBJDUMP=arm-linux-gnueabihf-objdump
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/armv7-unknown-linux-gnueabihf/Dockerfile
@@ -0,0 +1,13 @@
+FROM ubuntu:17.10
+RUN apt-get update && apt-get install -y --no-install-recommends \
+  gcc \
+  ca-certificates \
+  libc6-dev \
+  gcc-arm-linux-gnueabihf \
+  libc6-dev-armhf-cross \
+  qemu-user \
+  make \
+  file
+ENV CARGO_TARGET_ARMV7_UNKNOWN_LINUX_GNUEABIHF_LINKER=arm-linux-gnueabihf-gcc \
+    CARGO_TARGET_ARMV7_UNKNOWN_LINUX_GNUEABIHF_RUNNER="qemu-arm -L /usr/arm-linux-gnueabihf" \
+    OBJDUMP=arm-linux-gnueabihf-objdump
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/i586-unknown-linux-gnu/Dockerfile
@@ -0,0 +1,7 @@
+FROM ubuntu:17.10
+RUN apt-get update && apt-get install -y --no-install-recommends \
+  gcc-multilib \
+  libc6-dev \
+  file \
+  make \
+  ca-certificates
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/i686-unknown-linux-gnu/Dockerfile
@@ -0,0 +1,7 @@
+FROM ubuntu:17.10
+RUN apt-get update && apt-get install -y --no-install-recommends \
+  gcc-multilib \
+  libc6-dev \
+  file \
+  make \
+  ca-certificates
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/mips-unknown-linux-gnu/Dockerfile
@@ -0,0 +1,13 @@
+FROM ubuntu:17.10
+
+RUN apt-get update && apt-get install -y --no-install-recommends \
+        gcc libc6-dev qemu-user ca-certificates \
+        gcc-mips-linux-gnu libc6-dev-mips-cross \
+        qemu-system-mips \
+        qemu-user \
+        make \
+        file
+
+ENV CARGO_TARGET_MIPS_UNKNOWN_LINUX_GNU_LINKER=mips-linux-gnu-gcc \
+    CARGO_TARGET_MIPS_UNKNOWN_LINUX_GNU_RUNNER="qemu-mips -L /usr/mips-linux-gnu" \
+    OBJDUMP=mips-linux-gnu-objdump
\ No newline at end of file
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/mips64-unknown-linux-gnuabi64/Dockerfile
@@ -0,0 +1,10 @@
+FROM ubuntu:17.10
+
+RUN apt-get update && apt-get install -y --no-install-recommends \
+        gcc libc6-dev qemu-user ca-certificates \
+        gcc-mips64-linux-gnuabi64 libc6-dev-mips64-cross \
+        qemu-system-mips64 qemu-user
+
+ENV CARGO_TARGET_MIPS64_UNKNOWN_LINUX_GNUABI64_LINKER=mips64-linux-gnuabi64-gcc \
+    CARGO_TARGET_MIPS64_UNKNOWN_LINUX_GNUABI64_RUNNER="qemu-mips64 -L /usr/mips64-linux-gnuabi64" \
+    OBJDUMP=mips64-linux-gnuabi64-objdump
\ No newline at end of file
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/mips64el-unknown-linux-gnuabi64/Dockerfile
@@ -0,0 +1,10 @@
+FROM ubuntu:17.10
+
+RUN apt-get update && apt-get install -y --no-install-recommends \
+        gcc libc6-dev qemu-user ca-certificates \
+        gcc-mips64el-linux-gnuabi64 libc6-dev-mips64el-cross \
+        qemu-system-mips64el
+
+ENV CARGO_TARGET_MIPS64EL_UNKNOWN_LINUX_GNUABI64_LINKER=mips64el-linux-gnuabi64-gcc \
+    CARGO_TARGET_MIPS64EL_UNKNOWN_LINUX_GNUABI64_RUNNER="qemu-mips64el -L /usr/mips64el-linux-gnuabi64" \
+    OBJDUMP=mips64el-linux-gnuabi64-objdump
\ No newline at end of file
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/mipsel-unknown-linux-musl/Dockerfile
@@ -0,0 +1,25 @@
+FROM ubuntu:18.10
+
+RUN apt-get update && \
+    apt-get install -y --no-install-recommends \
+    ca-certificates \
+    gcc \
+    libc6-dev \
+    make \
+    qemu-user \
+    qemu-system-mips \
+    bzip2 \
+    curl \
+    file
+
+RUN mkdir /toolchain
+
+# Note that this originally came from:
+# https://downloads.openwrt.org/snapshots/trunk/malta/generic/OpenWrt-Toolchain-malta-le_gcc-5.3.0_musl-1.1.15.Linux-x86_64.tar.bz2
+RUN curl -L https://s3-us-west-1.amazonaws.com/rust-lang-ci2/libc/OpenWrt-Toolchain-malta-le_gcc-5.3.0_musl-1.1.15.Linux-x86_64.tar.bz2 | \
+      tar xjf - -C /toolchain --strip-components=2
+
+ENV PATH=$PATH:/rust/bin:/toolchain/bin \
+    CC_mipsel_unknown_linux_musl=mipsel-openwrt-linux-gcc \
+    CARGO_TARGET_MIPSEL_UNKNOWN_LINUX_MUSL_LINKER=mipsel-openwrt-linux-gcc \
+    CARGO_TARGET_MIPSEL_UNKNOWN_LINUX_MUSL_RUNNER="qemu-mipsel -L /toolchain"
\ No newline at end of file
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/powerpc-unknown-linux-gnu/Dockerfile
@@ -0,0 +1,12 @@
+FROM ubuntu:17.10
+
+RUN apt-get update && apt-get install -y --no-install-recommends \
+        gcc libc6-dev qemu-user ca-certificates \
+        gcc-powerpc-linux-gnu libc6-dev-powerpc-cross \
+        qemu-system-ppc \
+        make \
+        file
+
+ENV CARGO_TARGET_POWERPC_UNKNOWN_LINUX_GNU_LINKER=powerpc-linux-gnu-gcc \
+    CARGO_TARGET_POWERPC_UNKNOWN_LINUX_GNU_RUNNER="qemu-ppc -cpu Vger -L /usr/powerpc-linux-gnu" \
+    OBJDUMP=powerpc-linux-gnu-objdump
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/powerpc64-unknown-linux-gnu/Dockerfile
@@ -0,0 +1,17 @@
+FROM ubuntu:17.10
+
+RUN apt-get update && apt-get install -y --no-install-recommends \
+    gcc \
+    ca-certificates \
+    libc6-dev \
+    gcc-powerpc64-linux-gnu \
+    libc6-dev-ppc64-cross \
+    qemu-user  \
+    qemu-system-ppc \
+    make \
+    file 
+
+ENV CARGO_TARGET_POWERPC64_UNKNOWN_LINUX_GNU_LINKER=powerpc64-linux-gnu-gcc \
+    CARGO_TARGET_POWERPC64_UNKNOWN_LINUX_GNU_RUNNER="qemu-ppc64 -L /usr/powerpc64-linux-gnu" \
+    CC=powerpc64-linux-gnu-gcc \
+    OBJDUMP=powerpc64-linux-gnu-objdump
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/powerpc64le-unknown-linux-gnu/Dockerfile
@@ -0,0 +1,11 @@
+FROM ubuntu:17.10
+
+RUN apt-get update && apt-get install -y --no-install-recommends \
+        gcc libc6-dev qemu-user ca-certificates \
+        gcc-powerpc64le-linux-gnu libc6-dev-ppc64el-cross \
+        qemu-system-ppc file make
+
+ENV CARGO_TARGET_POWERPC64LE_UNKNOWN_LINUX_GNU_LINKER=powerpc64le-linux-gnu-gcc \
+    CARGO_TARGET_POWERPC64LE_UNKNOWN_LINUX_GNU_RUNNER="qemu-ppc64le -L /usr/powerpc64le-linux-gnu" \
+    CC=powerpc64le-linux-gnu-gcc \
+    OBJDUMP=powerpc64le-linux-gnu-objdump
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/s390x-unknown-linux-gnu/Dockerfile
@@ -0,0 +1,20 @@
+FROM ubuntu:18.10
+
+RUN apt-get update && \
+    apt-get install -y --no-install-recommends \
+    ca-certificates \
+    curl \
+    cmake \
+    gcc \
+    libc6-dev \
+    g++-s390x-linux-gnu \
+    libc6-dev-s390x-cross \
+    qemu-user \
+    make \
+    file
+
+ENV CARGO_TARGET_S390X_UNKNOWN_LINUX_GNU_LINKER=s390x-linux-gnu-gcc \
+    CARGO_TARGET_S390X_UNKNOWN_LINUX_GNU_RUNNER="qemu-s390x -L /usr/s390x-linux-gnu" \
+    CC_s390x_unknown_linux_gnu=s390x-linux-gnu-gcc \
+    CXX_s390x_unknown_linux_gnu=s390x-linux-gnu-g++ \
+    OBJDUMP=s390x-linux-gnu-objdump
\ No newline at end of file
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/sparc64-unknown-linux-gnu/Dockerfile
@@ -0,0 +1,18 @@
+FROM debian:stretch
+
+RUN apt-get update && apt-get install -y --no-install-recommends \
+        curl ca-certificates \
+        gcc libc6-dev \
+        gcc-sparc64-linux-gnu libc6-dev-sparc64-cross \
+        qemu-system-sparc64 openbios-sparc seabios ipxe-qemu \
+        p7zip-full cpio
+
+COPY linux-sparc64.sh /
+RUN bash /linux-sparc64.sh
+
+COPY test-runner-linux /
+
+ENV CARGO_TARGET_SPARC64_UNKNOWN_LINUX_GNU_LINKER=sparc64-linux-gnu-gcc \
+    CARGO_TARGET_SPARC64_UNKNOWN_LINUX_GNU_RUNNER="/test-runner-linux sparc64" \
+    CC_sparc64_unknown_linux_gnu=sparc64-linux-gnu-gcc \
+    PATH=$PATH:/rust/bin
\ No newline at end of file
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/thumbv7neon-linux-androideabi/Dockerfile
@@ -0,0 +1,47 @@
+FROM ubuntu:16.04
+
+RUN dpkg --add-architecture i386 && \
+    apt-get update && \
+    apt-get install -y --no-install-recommends \
+  file \
+  make \
+  curl \
+  ca-certificates \
+  python \
+  unzip \
+  expect \
+  openjdk-9-jre \
+  libstdc++6:i386 \
+  libpulse0 \
+  gcc \
+  libc6-dev
+
+WORKDIR /android/
+COPY android* /android/
+
+ENV ANDROID_ARCH=arm
+ENV PATH=$PATH:/android/ndk-$ANDROID_ARCH/bin:/android/sdk/tools:/android/sdk/platform-tools
+
+RUN sh /android/android-install-ndk.sh $ANDROID_ARCH
+RUN sh /android/android-install-sdk.sh $ANDROID_ARCH
+RUN mv /root/.android /tmp
+RUN chmod 777 -R /tmp/.android
+RUN chmod 755 /android/sdk/tools/* /android/sdk/emulator/qemu/linux-x86_64/*
+
+ENV PATH=$PATH:/rust/bin \
+    CARGO_TARGET_THUMBV7NEON_LINUX_ANDROIDEABI_LINKER=arm-linux-androideabi-gcc \
+    CARGO_TARGET_THUMBV7NEON_LINUX_ANDROIDEABI_RUNNER=/tmp/runtest \
+    OBJDUMP=arm-linux-androideabi-objdump \
+    HOME=/tmp
+
+ADD runtest-android.rs /tmp/runtest.rs
+ENTRYPOINT [ \
+  "bash", \
+  "-c", \
+  # set SHELL so android can detect a 64bits system, see
+  # http://stackoverflow.com/a/41789144
+  "SHELL=/bin/dash /android/sdk/emulator/emulator @arm -no-window & \
+   rustc /tmp/runtest.rs -o /tmp/runtest && \
+   exec \"$@\"", \
+  "--" \
+]
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/thumbv7neon-unknown-linux-gnueabihf/Dockerfile
@@ -0,0 +1,13 @@
+FROM ubuntu:17.10
+RUN apt-get update && apt-get install -y --no-install-recommends \
+  gcc \
+  ca-certificates \
+  libc6-dev \
+  gcc-arm-linux-gnueabihf \
+  libc6-dev-armhf-cross \
+  qemu-user \
+  make \
+  file
+ENV CARGO_TARGET_THUMBV7NEON_UNKNOWN_LINUX_GNUEABIHF_LINKER=arm-linux-gnueabihf-gcc \
+    CARGO_TARGET_THUMBV7NEON_UNKNOWN_LINUX_GNUEABIHF_RUNNER="qemu-arm -L /usr/arm-linux-gnueabihf" \
+    OBJDUMP=arm-linux-gnueabihf-objdump
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/wasm32-unknown-unknown/Dockerfile
@@ -0,0 +1,37 @@
+FROM ubuntu:18.04
+
+RUN apt-get update -y && apt-get install -y --no-install-recommends \
+  ca-certificates \
+  clang \
+  cmake \
+  curl \
+  git \
+  libc6-dev \
+  make \
+  python \
+  xz-utils
+
+# Install `wasm2wat`
+RUN git clone --recursive https://github.com/WebAssembly/wabt
+RUN make -C wabt -j$(nproc)
+ENV PATH=$PATH:/wabt/bin
+
+# Install `wasm-bindgen-test-runner`
+RUN curl -L https://github.com/rustwasm/wasm-bindgen/releases/download/0.2.19/wasm-bindgen-0.2.19-x86_64-unknown-linux-musl.tar.gz \
+  | tar xzf -
+ENV PATH=$PATH:/wasm-bindgen-0.2.19-x86_64-unknown-linux-musl
+ENV CARGO_TARGET_WASM32_UNKNOWN_UNKNOWN_RUNNER=wasm-bindgen-test-runner
+
+# Install `node`
+RUN curl https://nodejs.org/dist/v10.8.0/node-v10.8.0-linux-x64.tar.xz | tar xJf -
+ENV PATH=$PATH:/node-v10.8.0-linux-x64/bin
+
+# We use a shim linker that removes `--strip-debug` when passed to LLD. While
+# this typically results in invalid debug information in release mode it doesn't
+# result in an invalid names section which is what we're interested in.
+COPY lld-shim.rs /
+ENV CARGO_TARGET_WASM32_UNKNOWN_UNKNOWN_LINKER=/tmp/lld-shim
+
+# Rustc isn't available until this container starts, so defer compilation of the
+# shim.
+ENTRYPOINT /rust/bin/rustc /lld-shim.rs -o /tmp/lld-shim && exec bash "$@"
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/x86_64-linux-android/Dockerfile
@@ -0,0 +1,29 @@
+FROM ubuntu:16.04
+
+RUN apt-get update && \
+    apt-get install -y --no-install-recommends \
+  ca-certificates \
+  curl \
+  gcc \
+  libc-dev \
+  python \
+  unzip \
+  file \
+  make
+
+WORKDIR /android/
+ENV ANDROID_ARCH=x86_64
+COPY android-install-ndk.sh /android/
+RUN sh /android/android-install-ndk.sh $ANDROID_ARCH
+
+# We do not run x86_64-linux-android tests on an android emulator.
+# See ci/android-sysimage.sh for informations about how tests are run.
+COPY android-sysimage.sh /android/
+RUN bash /android/android-sysimage.sh x86_64 x86_64-24_r07.zip
+
+ENV PATH=$PATH:/rust/bin:/android/ndk-$ANDROID_ARCH/bin \
+    CARGO_TARGET_X86_64_LINUX_ANDROID_LINKER=x86_64-linux-android-gcc \
+    CC_x86_64_linux_android=x86_64-linux-android-gcc \
+    CXX_x86_64_linux_android=x86_64-linux-android-g++ \
+    OBJDUMP=x86_64-linux-android-objdump \
+    HOME=/tmp
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/x86_64-unknown-linux-gnu-emulated/Dockerfile
@@ -0,0 +1,16 @@
+FROM ubuntu:18.04
+RUN apt-get update && apt-get install -y --no-install-recommends \
+  gcc \
+  libc6-dev \
+  file \
+  make \
+  ca-certificates \
+  wget \
+  bzip2 \
+  cmake \
+  libclang-dev \
+  clang
+
+RUN wget https://github.com/gnzlbg/intel_sde/raw/master/sde-external-8.16.0-2018-01-30-lin.tar.bz2
+RUN tar -xjf sde-external-8.16.0-2018-01-30-lin.tar.bz2
+ENV CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="/sde-external-8.16.0-2018-01-30-lin/sde64 --"
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/docker/x86_64-unknown-linux-gnu/Dockerfile
@@ -0,0 +1,10 @@
+FROM ubuntu:17.10
+RUN apt-get update && apt-get install -y --no-install-recommends \
+  gcc \
+  libc6-dev \
+  file \
+  make \
+  ca-certificates \
+  cmake \
+  libclang-dev \
+  clang
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/dox.sh
@@ -0,0 +1,24 @@
+#!/bin/sh
+
+set -ex
+
+rm -rf target/doc
+mkdir -p target/doc
+
+# Build API documentation
+cargo doc --features=into_bits
+
+# Build Performance Guide
+# FIXME: https://github.com/rust-lang-nursery/mdBook/issues/780
+# mdbook build perf-guide -d target/doc/perf-guide
+cd perf-guide
+mdbook build
+cd -
+cp -r perf-guide/book target/doc/perf-guide
+
+# If we're on travis, not a PR, and on the right branch, publish!
+if [ "$TRAVIS_PULL_REQUEST" = "false" ] && [ "$TRAVIS_BRANCH" = "master" ]; then
+  pip install ghp_import --install-option="--prefix=$HOME/.local"
+  $HOME/.local/bin/ghp-import -n target/doc
+  git push -qf https://${GH_PAGES}@github.com/${TRAVIS_REPO_SLUG}.git gh-pages
+fi
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/linux-s390x.sh
@@ -0,0 +1,18 @@
+set -ex
+
+mkdir -m 777 /qemu
+cd /qemu
+
+curl -LO https://github.com/qemu/qemu/raw/master/pc-bios/s390-ccw.img
+curl -LO http://ftp.debian.org/debian/dists/testing/main/installer-s390x/20170828/images/generic/kernel.debian
+curl -LO http://ftp.debian.org/debian/dists/testing/main/installer-s390x/20170828/images/generic/initrd.debian
+
+mv kernel.debian kernel
+mv initrd.debian initrd.gz
+
+mkdir init
+cd init
+gunzip -c ../initrd.gz | cpio -id
+rm ../initrd.gz
+cp /usr/s390x-linux-gnu/lib/libgcc_s.so.1 usr/lib/
+chmod a+w .
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/linux-sparc64.sh
@@ -0,0 +1,17 @@
+set -ex
+
+mkdir -m 777 /qemu
+cd /qemu
+
+curl -LO https://cdimage.debian.org/cdimage/ports/9.0/sparc64/iso-cd/debian-9.0-sparc64-NETINST-1.iso
+7z e debian-9.0-sparc64-NETINST-1.iso boot/initrd.gz
+7z e debian-9.0-sparc64-NETINST-1.iso boot/sparc64
+mv sparc64 kernel
+rm debian-9.0-sparc64-NETINST-1.iso
+
+mkdir init
+cd init
+gunzip -c ../initrd.gz | cpio -id
+rm ../initrd.gz
+cp /usr/sparc64-linux-gnu/lib/libgcc_s.so.1 usr/lib/
+chmod a+w .
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/lld-shim.rs
@@ -0,0 +1,11 @@
+use std::os::unix::prelude::*;
+use std::process::Command;
+use std::env;
+
+fn main() {
+    let args = env::args()
+        .skip(1)
+        .filter(|s| s != "--strip-debug")
+        .collect::<Vec<_>>();
+    panic!("failed to exec: {}", Command::new("rust-lld").args(&args).exec());
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/max_line_width.sh
@@ -0,0 +1,17 @@
+#!/usr/bin/env sh
+
+set -x
+
+export success=true
+
+find . -iname '*.rs' | while read -r file; do
+    result=$(grep '.\{79\}' "${file}" | grep --invert 'http')
+    if [ "${result}" = "" ]
+    then
+        :
+    else
+        echo "file \"${file}\": $result"
+        exit 1
+    fi
+done
+
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/run-docker.sh
@@ -0,0 +1,38 @@
+# Small script to run tests for a target (or all targets) inside all the
+# respective docker images.
+
+set -ex
+
+run() {
+    echo "Building docker container for TARGET=${TARGET} RUSTFLAGS=${RUSTFLAGS}"
+    docker build -t packed_simd -f ci/docker/${TARGET}/Dockerfile ci/
+    mkdir -p target
+    target=$(echo "${TARGET}" | sed 's/-emulated//')
+    echo "Running docker"
+    docker run \
+      --user `id -u`:`id -g` \
+      --rm \
+      --init \
+      --volume $HOME/.cargo:/cargo \
+      --env CARGO_HOME=/cargo \
+      --volume `rustc --print sysroot`:/rust:ro \
+      --env TARGET=$target \
+      --env NORUN \
+      --env NOVERIFY \
+      --env RUSTFLAGS \
+      --volume `pwd`:/checkout:ro \
+      --volume `pwd`/target:/checkout/target \
+      --workdir /checkout \
+      --privileged \
+      packed_simd \
+      bash \
+      -c 'PATH=$PATH:/rust/bin exec ci/run.sh'
+}
+
+if [ -z "${TARGET}" ]; then
+  for d in `ls ci/docker/`; do
+    run $d
+  done
+else
+  run ${TARGET}
+fi
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/run.sh
@@ -0,0 +1,96 @@
+#!/usr/bin/env bash
+
+set -ex
+
+: ${TARGET?"The TARGET environment variable must be set."}
+
+# Tests are all super fast anyway, and they fault often enough on travis that
+# having only one thread increases debuggability to be worth it.
+#export RUST_TEST_THREADS=1
+#export RUST_BACKTRACE=full
+#export RUST_TEST_NOCAPTURE=1
+
+# Some appveyor builds run out-of-memory; this attempts to mitigate that:
+# https://github.com/rust-lang-nursery/packed_simd/issues/39
+# export RUSTFLAGS="${RUSTFLAGS} -C codegen-units=1"
+# export CARGO_BUILD_JOBS=1
+
+export CARGO_SUBCMD=test
+if [[ "${NORUN}" == "1" ]]; then
+    export CARGO_SUBCMD=build
+fi
+
+if [[ ${TARGET} == "x86_64-apple-ios" ]] || [[ ${TARGET} == "i386-apple-ios" ]]; then
+    export RUSTFLAGS="${RUSTFLAGS} -Clink-arg=-mios-simulator-version-min=7.0"
+    rustc ./ci/deploy_and_run_on_ios_simulator.rs -o $HOME/runtest
+    export CARGO_TARGET_X86_64_APPLE_IOS_RUNNER=$HOME/runtest
+    export CARGO_TARGET_I386_APPLE_IOS_RUNNER=$HOME/runtest
+fi
+
+# The source directory is read-only. Need to copy internal crates to the target
+# directory for their Cargo.lock to be properly written.
+mkdir target || true
+
+rustc --version
+cargo --version
+echo "TARGET=${TARGET}"
+echo "HOST=${HOST}"
+echo "RUSTFLAGS=${RUSTFLAGS}"
+echo "NORUN=${NORUN}"
+echo "NOVERIFY=${NOVERIFY}"
+echo "CARGO_SUBCMD=${CARGO_SUBCMD}"
+echo "CARGO_BUILD_JOBS=${CARGO_BUILD_JOBS}"
+echo "CARGO_INCREMENTAL=${CARGO_INCREMENTAL}"
+echo "RUST_TEST_THREADS=${RUST_TEST_THREADS}"
+echo "RUST_BACKTRACE=${RUST_BACKTRACE}"
+echo "RUST_TEST_NOCAPTURE=${RUST_TEST_NOCAPTURE}"
+
+cargo_test() {
+    cmd="cargo ${CARGO_SUBCMD} --verbose --target=${TARGET} ${@}"
+    if [ "${NORUN}" != "1" ]
+    then
+        if [ "$TARGET" != "wasm32-unknown-unknown" ]
+        then
+            cmd="$cmd -- --quiet"
+        fi
+    fi
+    mkdir target || true
+    ${cmd} 2>&1 | tee > target/output
+    if [[ ${PIPESTATUS[0]} != 0 ]]; then
+        cat target/output
+        return 1
+    fi
+}
+
+cargo_test_impl() {
+    ORIGINAL_RUSTFLAGS=${RUSTFLAGS}
+    RUSTFLAGS="${ORIGINAL_RUSTFLAGS} --cfg test_v16  --cfg test_v32 --cfg test_v64" cargo_test ${@}
+    RUSTFLAGS="${ORIGINAL_RUSTFLAGS} --cfg test_v128 --cfg test_v256" cargo_test ${@}
+    RUSTFLAGS="${ORIGINAL_RUSTFLAGS} --cfg test_v512" cargo_test ${@}
+    RUSTFLAGS=${ORIGINAL_RUSTFLAGS}
+}
+
+# Debug run:
+if [[ "${TARGET}" != "wasm32-unknown-unknown" ]]; then
+   # Run wasm32-unknown-unknown in release mode only
+   cargo_test_impl
+fi
+
+if [[ "${TARGET}" == "x86_64-unknown-linux-gnu" ]] || [[ "${TARGET}" == "x86_64-pc-windows-msvc" ]]; then
+    # use sleef on linux and windows x86_64 builds
+    cargo_test_impl --release --features=into_bits,core_arch,sleef-sys
+else
+    cargo_test_impl --release --features=into_bits,core_arch
+fi
+
+# Verify code generation
+if [[ "${NOVERIFY}" != "1" ]]; then
+    cp -r verify/verify target/verify
+    export STDSIMD_ASSERT_INSTR_LIMIT=30
+    if [[ "${TARGET}" == "i586-unknown-linux-gnu" ]]; then
+        export STDSIMD_ASSERT_INSTR_LIMIT=50
+    fi
+    cargo_test --release --manifest-path=target/verify/Cargo.toml
+fi
+
+. ci/run_examples.sh
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/run_examples.sh
@@ -0,0 +1,51 @@
+# Runs all examples.
+
+# FIXME: https://github.com/rust-lang-nursery/packed_simd/issues/55
+# All examples fail to build for `armv7-apple-ios`.
+if [[ ${TARGET} == "armv7-apple-ios" ]]; then
+    exit 0
+fi
+
+# FIXME: travis exceeds 50 minutes on these targets
+# Skipping the examples is an attempt at preventing travis from timing-out
+if [[ ${TARGET} == "arm-linux-androidabi" ]] || [[ ${TARGET} == "aarch64-linux-androidabi" ]] \
+    || [[ ${TARGET} == "sparc64-unknown-linux-gnu" ]]; then
+    exit 0
+fi
+
+if [[ ${TARGET} == "wasm32-unknown-unknown" ]]; then
+    exit 0
+fi
+
+cp -r examples/aobench target/aobench
+cargo_test --manifest-path=target/aobench/Cargo.toml --release --no-default-features
+cargo_test --manifest-path=target/aobench/Cargo.toml --release --features=256bit
+
+cp -r examples/dot_product target/dot_product
+cargo_test --manifest-path=target/dot_product/Cargo.toml --release
+
+cp -r examples/fannkuch_redux target/fannkuch_redux
+cargo_test --manifest-path=target/fannkuch_redux/Cargo.toml --release
+
+# FIXME: https://github.com/rust-lang-nursery/packed_simd/issues/56
+if [[ ${TARGET} != "i586-unknown-linux-gnu" ]]; then
+    cp -r examples/mandelbrot target/mandelbrot
+    cargo_test --manifest-path=target/mandelbrot/Cargo.toml --release
+fi
+
+cp -r examples/matrix_inverse target/matrix_inverse
+cargo_test --manifest-path=target/matrix_inverse/Cargo.toml --release
+
+cp -r examples/nbody target/nbody
+cargo_test --manifest-path=target/nbody/Cargo.toml --release
+
+cp -r examples/spectral_norm target/spectral_norm
+cargo_test --manifest-path=target/spectral_norm/Cargo.toml --release
+
+if [[ ${TARGET} != "i586-unknown-linux-gnu" ]]; then
+    cp -r examples/stencil target/stencil
+    cargo_test --manifest-path=target/stencil/Cargo.toml --release
+fi
+
+cp -r examples/triangle_xform target/triangle_xform
+cargo_test --manifest-path=target/triangle_xform/Cargo.toml --release
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/runtest-android.rs
@@ -0,0 +1,45 @@
+use std::env;
+use std::process::Command;
+use std::path::{Path, PathBuf};
+
+fn main() {
+    let args = env::args_os()
+        .skip(1)
+        .filter(|arg| arg != "--quiet")
+        .collect::<Vec<_>>();
+    assert_eq!(args.len(), 1);
+    let test = PathBuf::from(&args[0]);
+    let dst = Path::new("/data/local/tmp").join(test.file_name().unwrap());
+
+    let status = Command::new("adb")
+        .arg("wait-for-device")
+        .status()
+        .expect("failed to run: adb wait-for-device");
+    assert!(status.success());
+
+    let status = Command::new("adb")
+        .arg("push")
+        .arg(&test)
+        .arg(&dst)
+        .status()
+        .expect("failed to run: adb pushr");
+    assert!(status.success());
+
+    let output = Command::new("adb")
+        .arg("shell")
+        .arg(&dst)
+        .output()
+        .expect("failed to run: adb shell");
+    assert!(status.success());
+
+    println!("status: {}\nstdout ---\n{}\nstderr ---\n{}",
+             output.status,
+             String::from_utf8_lossy(&output.stdout),
+             String::from_utf8_lossy(&output.stderr));
+
+    let stdout = String::from_utf8_lossy(&output.stdout);
+    let mut lines = stdout.lines().filter(|l| l.starts_with("test result"));
+    if !lines.all(|l| l.contains("test result: ok") && l.contains("0 failed")) {
+        panic!("failed to find successful test run");
+    }
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/setup_benchmarks.sh
@@ -0,0 +1,10 @@
+#!/usr/bin/env bash
+
+set -ex
+
+# Get latest ISPC binary for the target and put it in the path
+git clone https://github.com/gnzlbg/ispc-binaries
+cp ispc-binaries/ispc-${TARGET} ispc
+
+# Rust-bindgen requires RUSTFMT
+rustup component add rustfmt-preview
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/ci/test-runner-linux
@@ -0,0 +1,24 @@
+#!/bin/sh
+
+set -e
+
+arch=$1
+prog=$2
+
+cd /qemu/init
+cp -f $2 prog
+find . | cpio --create --format='newc' --quiet | gzip > ../initrd.gz
+cd ..
+
+timeout 30s qemu-system-$arch \
+        -m 1024 \
+        -nographic \
+        -kernel kernel \
+        -initrd initrd.gz \
+        -append init=/prog > output || true
+
+# remove kernel messages
+tr -d '\r' < output | egrep -v '^\['
+
+# if the output contains a failure, return error
+! grep FAILED output > /dev/null
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/contributing.md
@@ -0,0 +1,67 @@
+# Contributing to `packed_simd`
+
+Welcome! If you are reading this document, it means you are interested in contributing
+to the `packed_simd` crate.
+
+## Reporting issues
+
+All issues with this crate are tracked using GitHub's [Issue Tracker].
+
+You can use issues to bring bugs to the attention of the maintainers, to discuss
+certain problems encountered with the crate, or to request new features (although
+feature requests should be limited to things mentioned in the [RFC]).
+
+One thing to keep in mind is to always use the **latest** nightly toolchain when
+working on this crate. Due to the nature of this project, we use a lot of unstable
+features, meaning breakage happens often.
+
+[Issue Tracker]: https://github.com/rust-lang-nursery/packed_simd/issues
+[RFC]: https://github.com/rust-lang/rfcs/pull/2366
+
+### LLVM issues
+
+The Rust compiler relies on [LLVM](https://llvm.org/) for machine code generation,
+and quite a few LLVM bugs have been discovered during the development of this project.
+
+If you encounter issues with incorrect/suboptimal codegen, which you do not encounter
+when using the [SIMD vendor intrinsics](https://doc.rust-lang.org/nightly/std/arch/),
+it is likely the issue is with LLVM, or this crate's interaction with it.
+
+You should first open an issue **in this repo** to help us track the problem, and we
+will help determine what is the exact cause of the problem.
+If LLVM is indeed the cause, the issue will be reported upstream to the
+[LLVM bugtracker](https://bugs.llvm.org/).
+
+## Submitting Pull Requests
+
+New code is submitted to the crate using GitHub's [pull request] mechanism.
+You should first fork this repository, make your changes (preferrably in a new
+branch), then use GitHub's web UI to create a new PR.
+
+[pull request]: https://help.github.com/articles/about-pull-requests/
+
+### Examples
+
+The `examples` directory contains code showcasing SIMD code written with this crate,
+usually in comparison to scalar or ISPC code. If you have a project / idea which
+uses SIMD, we'd love to add it to the examples list.
+
+Every example should include a small `README`, describing the example code's purpose.
+If your example could potentially work as a benchmark, then add a `benchmark.sh`
+script to allow running the example benchmark code in CI. See an existing example's
+[`benchmark.sh`](examples/aobench/benchmark.sh) for a sample.
+
+Don't forget to update the crate's top-level `README` with a link to your example.
+
+### Perf guide
+
+The objective of the [performance guide][perf-guide] is to be a comprehensive
+resource detailing the process of optimizing Rust code with SIMD support.
+
+If you believe a certain section could be reworded, or if you have any tips & tricks
+related to SIMD which you'd like to share, please open a PR.
+
+[mdBook] is used to manage the formatting of the guide as a book.
+
+[perf-guide]: https://rust-lang-nursery.github.io/packed_simd/perf-guide/
+[mdBook]: https://github.com/rust-lang-nursery/mdBook
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/perf-guide/book.toml
@@ -0,0 +1,12 @@
+[book]
+authors = ["Gonzalo Brito Gadeschi", "Gabriel Majeri"]
+multilingual = false
+src = "src"
+title = "Rust SIMD Performance Guide"
+description = "This book describes how to write performant SIMD code in Rust."
+
+[build]
+create-missing = false
+
+[output.html]
+additional-css = ["./src/ascii.css"]
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/perf-guide/src/SUMMARY.md
@@ -0,0 +1,21 @@
+# Summary
+
+[Introduction](./introduction.md)
+
+- [Floating-point Math](./float-math/fp.md)
+  - [Short-vector Math Library](./float-math/svml.md)
+  - [Approximate functions](./float-math/approx.md)
+  - [Fused multiply-accumulate](./float-math/fma.md)
+
+- [Target features](./target-feature/features.md)
+  - [Using `RUSTFLAGS`](./target-feature/rustflags.md)
+  - [Using the `target_feature` attribute](./target-feature/attribute.md)
+  - [Interaction with inlining](./target-feature/inlining.md)
+  - [Detecting features at runtime](./target-feature/runtime.md)
+
+- [Bounds checking](./bound_checks.md)
+- [Vertical and horizontal operations](./vert-hor-ops.md)
+
+- [Performance profiling](./prof/profiling.md)
+  - [Profiling on Linux](./prof/linux.md)
+  - [Using machine code analyzers](./prof/mca.md)
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/perf-guide/src/ascii.css
@@ -0,0 +1,4 @@
+code {
+    /* "Source Code Pro" breaks ASCII art */
+    font-family: Consolas, "Ubuntu Mono", Menlo, "DejaVu Sans Mono", monospace;
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/perf-guide/src/bound_checks.md
@@ -0,0 +1,22 @@
+# Bounds checking
+
+Reading and writing packed vectors to/from slices is checked by default.
+Independently of the configuration options used, the safe functions:
+
+* `Simd<[T; N]>::from_slice_aligned(& s[..])`
+* `Simd<[T; N]>::write_to_slice_aligned(&mut s[..])`
+
+always check that:
+
+* the slice is big enough to hold the vector
+* the slice is suitably aligned to perform an aligned load/store for a `Simd<[T;
+  N]>` (this alignment is often much larger than that of `T`).
+
+There are `_unaligned` versions that use unaligned load and stores, as well as
+`unsafe` `_unchecked` that do not perform any checks iff `debug-assertions =
+false` / `debug = false`. That is, the `_unchecked` methods do still assert size
+and alignment in debug builds and could also do so in release builds depending
+on the configuration options.
+
+These assertions do often significantly impact performance and you should be
+aware of them.
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/perf-guide/src/float-math/approx.md
@@ -0,0 +1,8 @@
+# Approximate functions
+
+<!-- TODO:
+
+Explain that they exists, that they are often _much_ faster, how to use them,
+that people should check whether the error is good enough for their
+applications. Explain that this error is currently unstable and might change.
+-->
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/perf-guide/src/float-math/fma.md
@@ -0,0 +1,6 @@
+# Fused Multiply Add
+
+<!-- TODO:
+Explain that this is a compound operation, infinite precision, difference
+between `mul_add` and `mul_adde`, that LLVM cannot do this by itself, etc.
+-->
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/perf-guide/src/float-math/fp.md
@@ -0,0 +1,3 @@
+# Floating-point math
+
+This chapter contains information pertaining to working with floating-point numbers.
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/perf-guide/src/float-math/svml.md
@@ -0,0 +1,7 @@
+# Short Vector Math Library
+
+<!-- TODO:
+Explain how is short-vector math performed by default (just scalarized libm calls).
+
+Explain how to enable `sleef`, etc.
+-->
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/perf-guide/src/introduction.md
@@ -0,0 +1,26 @@
+# Introduction
+
+## What is SIMD
+
+<!-- TODO:
+describe what SIMD is, which algorithms can benefit from it,
+give usage examples
+-->
+
+## History of SIMD in Rust
+
+<!-- TODO:
+discuss history of unstable std::simd,
+stabilization of std::arch, etc.
+-->
+
+## Discover packed_simd
+
+<!-- TODO: describe scope of this project -->
+
+Writing fast and portable SIMD algorithms using `packed_simd` is, unfortunately,
+not trivial. There are many pitfals that one should be aware of, and some idioms
+that help avoid those pitfalls.
+
+This book attempts to document these best practices and provides practical examples
+on how to apply the tips to _your_ code.
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/perf-guide/src/prof/linux.md
@@ -0,0 +1,107 @@
+# Performance profiling on Linux
+
+## Using `perf`
+
+[perf](https://perf.wiki.kernel.org/) is the most powerful performance profiler
+for Linux, featuring support for various hardware Performance Monitoring Units,
+as well as integration with the kernel's performance events framework.
+
+We will only look at how can the `perf` command can be used to profile SIMD code.
+Full system profiling is outside of the scope of this book.
+
+### Recording
+
+The first step is to record a program's execution during an average workload.
+It helps if you can isolate the parts of your program which have performance
+issues, and set up a benchmark which can be easily (re)run.
+
+Build the benchmark binary in release mode, after having enabled debug info:
+
+```sh
+$ cargo build --release
+Finished release [optimized + debuginfo] target(s) in 0.02s
+```
+
+Then use the `perf record` subcommand:
+
+```sh
+$ perf record --call-graph=dwarf ./target/release/my-program
+[ perf record: Woken up 10 times to write data ]
+[ perf record: Captured and wrote 2,356 MB perf.data (292 samples) ]
+```
+
+Instead of using `--call-graph=dwarf`, which can become pretty slow, you can use
+`--call-graph=lbr` if you have a processor with support for Last Branch Record
+(i.e. Intel Haswell and newer).
+
+`perf` will, by default, record the count of CPU cycles it takes to execute
+various parts of your program. You can use the `-e` command line option
+to enable other performance events, such as `cache-misses`. Use `perf list`
+to get a list of all hardware counters supported by your CPU.
+
+### Viewing the report
+
+The next step is getting a bird's eye view of the program's execution.
+`perf` provides a `ncurses`-based interface which will get you started.
+
+Use `perf report` to open a visualization of your program's performance:
+
+```sh
+perf report --hierarchy -M intel
+```
+
+`--hierarchy` will display a tree-like structure of where your program spent
+most of its time. `-M intel` enables disassembly output with Intel syntax, which
+is subjectively more readable than the default AT&T syntax.
+
+Here is the output from profiling the `nbody` benchmark:
+
+```
+- 100,00% nbody
+  - 94,18% nbody
+    + 93,48% [.] nbody_lib::simd::advance
+    + 0,70% [.] nbody_lib::run
+    + 5,06% libc-2.28.so
+```
+
+If you move with the arrow keys to any node in the tree, you can the press `a`
+to have `perf` _annotate_ that node. This means it will:
+
+- disassemble the function
+
+- associate every instruction with the percentage of time which was spent executing it
+
+- interleaves the disassembly with the source code,
+  assuming it found the debug symbols
+  (you can use `s` to toggle this behaviour)
+
+`perf` will, by default, open the instruction which it identified as being the
+hottest spot in the function:
+
+```
+0,76  │ movapd xmm2,xmm0
+0,38  │ movhlps xmm2,xmm0
+      │ addpd  xmm2,xmm0
+      │ unpcklpd xmm1,xmm2
+12,50 │ sqrtpd xmm0,xmm1
+1,52  │ mulpd  xmm0,xmm1
+```
+
+In this case, `sqrtpd` will be highlighted in red, since that's the instruction
+which the CPU spends most of its time executing.
+
+## Using Valgrind
+
+Valgrind is a set of tools which initially helped C/C++ programmers find unsafe
+memory accesses in their code. Nowadays the project also has
+
+- a heap profiler called `massif`
+
+- a cache utilization profiler called `cachegrind`
+
+- a call-graph performance profiler called `callgrind`
+
+<!--
+TODO: explain valgrind's dynamic binary translation, warn about massive
+slowdown, talk about `kcachegrind` for a GUI
+-->
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/perf-guide/src/prof/mca.md
@@ -0,0 +1,100 @@
+# Machine code analysis tools
+
+## The microarchitecture of modern CPUs
+
+While you might have heard of Instruction Set Architectures, such as `x86` or
+`arm` or `mips`, the term _microarchitecture_ (also written here as _µ-arch_),
+refers to the internal details of an actual family of CPUs, such as Intel's
+_Haswell_ or AMD's _Jaguar_.
+
+Replacing scalar code with SIMD code will improve performance on all CPUs
+supporting the required vector extensions.
+However, due to microarchitectural differences, the actual speed-up at
+runtime might vary.
+
+**Example**: a simple example arises when optimizing for AMD K8 CPUs.
+The assembly generated for an empty function should look like this:
+
+```asm
+nop
+ret
+```
+
+The `nop` is used to align the `ret` instruction for better performance.
+However, the compiler will actually generated the following code:
+
+```asm
+repz ret
+```
+
+The `repz` instruction will repeat the following instruction until a certain
+condition. Of course, in this situation, the function will simply immediately
+return, and the `ret` instruction is still aligned.
+However, AMD K8's branch predictor performs better with the latter code.
+
+For those looking to absolutely maximize performance for a certain target µ-arch,
+you will have to read some CPU manuals, or ask the compiler to do it for you
+with `-C target-cpu`.
+
+### Summary of CPU internals
+
+Modern processors are able to execute instructions out-of-order for better performance,
+by utilizing tricks such as [branch prediction], [instruction pipelining],
+or [superscalar execution].
+
+[branch prediction]: https://en.wikipedia.org/wiki/Branch_predictor
+[instruction pipelining]: https://en.wikipedia.org/wiki/Instruction_pipelining
+[superscalar execution]: https://en.wikipedia.org/wiki/Superscalar_processor
+
+SIMD instructions are also subject to these optimizations, meaning it can get pretty
+difficult to determine where the slowdown happens.
+For example, if the profiler reports a store operation is slow, one of two things
+could be happening:
+
+- the store is limited by the CPU's memory bandwidth, which is actually an ideal
+  scenario, all things considered;
+
+- memory bandwidth is nowhere near its peak, but the value to be stored is at the
+  end of a long chain of operations, and this store is where the profiler
+  encountered the pipeline stall;
+
+Since most profilers are simple tools which don't understand the subtleties of
+instruction scheduling, you
+
+## Analyzing the machine code
+
+Certain tools have knowledge of internal CPU microarchitecture, i.e. they know
+
+- how many physical [register files] a CPU actually has
+
+- what is the latency / throughtput of an instruction
+
+- what [µ-ops] are generated for a set of instructions
+
+and many other architectural details.
+
+[register files]: https://en.wikipedia.org/wiki/Register_file
+[µ-ops]: https://en.wikipedia.org/wiki/Micro-operation
+
+These tools are therefore able to provide accurate information as to why some
+instructions are inefficient, and where the bottleneck is.
+
+The disadvantage is that the output of these tools requires advanced knowledge
+of the target architecture to understand, i.e. they **cannot** point out what
+the cause of the issue is explicitly.
+
+## Intel's Architecture Code Analyzer (IACA)
+
+[IACA] is a free tool offered by Intel for analyzing the performance of various
+computational kernels.
+
+Being a proprietary, closed source tool, it _only_ supports Intel's µ-arches.
+
+[IACA]: https://software.intel.com/en-us/articles/intel-architecture-code-analyzer
+
+## llvm-mca
+
+<!--
+TODO: once LLVM 7 gets released, write a chapter on using llvm-mca
+with SIMD disassembly.
+-->
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/perf-guide/src/prof/profiling.md
@@ -0,0 +1,14 @@
+# Performance profiling
+
+While the rest of the book provides practical advice on how to improve the performance
+of SIMD code, this chapter is dedicated to [**performance profiling**][profiling].
+Profiling consists of recording a program's execution in order to identify program
+hotspots.
+
+**Important**: most profilers require debug information in order to accurately
+link the program hotspots back to the corresponding source code lines. Rust will
+disable debug info generation by default for optimized builds, but you can change
+that [in your `Cargo.toml`][cargo-ref].
+
+[profiling]: https://en.wikipedia.org/wiki/Profiling_(computer_programming)
+[cargo-ref]: https://doc.rust-lang.org/cargo/reference/manifest.html#the-profile-sections
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/perf-guide/src/target-feature/attribute.md
@@ -0,0 +1,5 @@
+# The `target_feature` attribute
+
+<!-- TODO:
+Explain the `#[target_feature]` attribute
+-->
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/perf-guide/src/target-feature/features.md
@@ -0,0 +1,13 @@
+# Enabling target features
+
+Not all processors of a certain architecture will have SIMD processing units,
+and using a SIMD instruction which is not supported will trigger undefined behavior.
+
+To allow building safe, portable programs, the Rust compiler will **not**, by default,
+generate any sort of vector instructions, unless it can statically determine
+they are supported. For example, on AMD64, SSE2 support is architecturally guaranteed.
+The `x86_64-apple-darwin` target enables up to SSSE3. The get a defintive list of
+which features are enabled by default on various platforms, refer to the target
+specifications [in the compiler's source code][targets].
+
+[targets]: https://github.com/rust-lang/rust/tree/master/src/librustc_target/spec
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/perf-guide/src/target-feature/inlining.md
@@ -0,0 +1,5 @@
+# Inlining
+
+<!-- TODO:
+Explain how the `#[target_feature]` attribute interacts with inlining
+-->
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/perf-guide/src/target-feature/practice.md
@@ -0,0 +1,31 @@
+# Target features in practice
+
+Using `RUSTFLAGS` will allow the crate being compiled, as well as all its
+transitive dependencies to use certain target features.
+
+A tehnique used to avoid undefined behavior at runtime is to compile and
+ship multiple binaries, each compiled with a certain set of features.
+This might not be feasible in some cases, and can quickly get out of hand
+as more and more vector extensions are added to an architecture.
+
+Rust can be more flexible: you can build a single binary/library which automatically
+picks the best supported vector instructions depending on the host machine.
+The trick consists of monomorphizing parts of the code during building, and then
+using run-time feature detection to select the right code path when running.
+
+<!-- TODO
+Explain how to create efficient functions that dispatch to different
+implementations at run-time without issues (e.g. using `#[inline(always)]` for
+the impls, wrapping in `#[target_feature]`, and the wrapping those in a function
+that does run-time feature detection).
+-->
+
+**NOTE** (x86 specific): because the AVX (256-bit) registers extend the existing
+SSE (128-bit) registers, mixing SSE and AVX instructions in a program can cause
+performance issues.
+
+The solution is to compile all code, even the code written with 128-bit vectors,
+with the AVX target feature enabled. This will cause the compiler to prefix the
+generated instructions with the [VEX] prefix.
+
+[VEX]: https://en.wikipedia.org/wiki/VEX_prefix
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/perf-guide/src/target-feature/runtime.md
@@ -0,0 +1,5 @@
+# Detecting host features at runtime
+
+<!-- TODO:
+Explain cost (how it works).
+-->
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/perf-guide/src/target-feature/rustflags.md
@@ -0,0 +1,77 @@
+# Using RUSTFLAGS
+
+One of the easiest ways to benefit from SIMD is to allow the compiler
+to generate code using certain vector instruction extensions.
+
+The environment variable `RUSTFLAGS` can be used to pass options for code
+generation to the Rust compiler. These flags will affect **all** compiled crates.
+
+There are two flags which can be used to enable specific vector extensions:
+
+## target-feature
+
+- Syntax: `-C target-feature=<features>`
+
+- Provides the compiler with a comma-separated set of instruction extensions
+  to enable.
+
+  **Example**: Use `-C target-features=+sse3,+avx` to enable generating instructions
+  for [Streaming SIMD Extensions 3](https://en.wikipedia.org/wiki/SSE3) and
+  [Advanced Vector Extensions](https://en.wikipedia.org/wiki/Advanced_Vector_Extensions).
+
+- To list target triples for all targets supported by Rust, use:
+
+  ```sh
+  rustc --print target-list
+  ```
+
+- To list all support target features for a certain target triple, use:
+
+  ```sh
+  rustc --target=${TRIPLE} --print target-features
+  ```
+
+- Note that all CPU features are independent, and will have to be enabled individually.
+
+  **Example**: Setting `-C target-features=+avx2` will _not_ enable `fma`, even though
+  all CPUs which support AVX2 also support FMA. To enable both, one has to use
+  `-C target-features=+avx2,+fma`
+
+- Some features also depend on other features, which need to be enabled for the
+  target instructions to be generated.
+
+  **Example**: Unless `v7` is specified as the target CPU (see below), to enable
+  NEON on ARM it is necessary to use `-C target-feature=+v7,+neon`.
+
+## target-cpu
+
+- Syntax: `-C target-cpu=<cpu>`
+
+- Sets the identifier of a CPU family / model for which to build and optimize the code.
+
+  **Example**: `RUSTFLAGS='-C target-cpu=cortex-a75'`
+
+- To list all supported target CPUs for a certain target triple, use:
+
+  ```sh
+  rustc --target=${TRIPLE} --print target-cpus
+  ```
+
+  **Example**:
+
+  ```sh
+  rustc --target=i686-pc-windows-msvc --print target-cpus
+  ```
+
+- The compiler will translate this into a list of target features. Therefore,
+  individual feature checks (`#[cfg(target_feature = "...")]`) will still
+  work properly.
+
+- It will cause the code generator to optimize the generated code for that
+  specific CPU model.
+
+- Using `native` as the CPU model will cause Rust to generate and optimize code
+  for the CPU running the compiler. It is useful when building programs which you
+  plan to only use locally. This should never be used when the generated programs
+  are meant to be run on other computers, such as when packaging for distribution
+  or cross-compiling.
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/perf-guide/src/vert-hor-ops.md
@@ -0,0 +1,76 @@
+# Vertical and horizontal operations
+
+In SIMD terminology, each vector has a certain "width" (number of lanes).
+A vector processor is able to perform two kinds of operations on a vector:
+
+- Vertical operations:
+  operate on two vectors of the same width, result has same width
+
+**Example**: vertical addition of two `f32x4` vectors
+
+      %0     == | 2 | -3.5 |  0 | 7 |
+                  +     +     +   +
+      %1     == | 4 |  1.5 | -1 | 0 |
+                  =     =     =   =
+    %0 + %1  == | 6 |  -2  | -1 | 7 |
+
+- Horizontal operations:
+  reduce the elements of two vectors in some way,
+  the result's elements combine information from the two original ones
+
+**Example**: horizontal addition of two `u64x2` vectors
+
+      %0     == | 1 |  3 |
+                  └─+───┘
+                    └───────┐
+                            │
+      %1     == | 4 | -1 |  │
+                  └─+──┘    │
+                    └───┐   │
+                        │   │
+                  ┌─────│───┘
+                  ▼     ▼
+    %0 + %1  == | 4 |   3 |
+
+## Performance consideration of horizontal operations
+
+The result of vertical operations, like vector negation: `-a`, for a given lane,
+does not depend on the result of the operation for the other lanes. The result
+of horizontal operations, like the vector `sum` reduction: `a.sum()`, depends on
+the value of all vector lanes.
+
+In virtually all architectures vertical operations are fast, while horizontal
+operations are, by comparison, very slow.
+
+Consider the following two functions for computing the sum of all `f32` values
+in a slice:
+
+```rust
+fn fast_sum(x: &[f32]) -> f32 {
+    assert!(x.len() % 4 == 0);
+    let mut sum = f32x4::splat(0.); // [0., 0., 0., 0.]
+    for i in (0..x.len()).step_by(4) {
+        sum += f32x4::from_slice_unaligned(&x[i..]);
+    }
+    sum.sum()
+}
+
+fn slow_sum(x: &[f32]) -> f32 {
+    assert!(x.len() % 4 == 0);
+    let mut sum: f32 = 0.;
+    for i in (0..x.len()).step_by(4) {
+        sum += f32x4::from_slice_unaligned(&x[i..]).sum();
+    }
+    sum
+}
+```
+
+The inner loop over the slice is where the bulk of the work actually happens.
+There, the `fast_sum` function perform vertical operations into a vector, doing
+a single horizontal reduction at the end, while the `slow_sum` function performs
+horizontal vector operations inside of the loop.
+
+On all widely-used architectures, `fast_sum` is a large constant factor faster
+than `slow_sum`. You can run the [slice_sum]() example and see for yourself. On
+the particular machine tested there the algorithm using the horizontal vector
+addition is 2.7x slower than the one using vertical vector operations!
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/readme.md
@@ -0,0 +1,180 @@
+# `Simd<[T; N]>`
+
+## Implementation of [Rust RFC #2366: `std::simd`][rfc2366]
+
+[![Travis-CI Status]][travis] [![Appveyor Status]][appveyor] [![Latest Version]][crates.io] [![docs]][master_docs]
+
+> This aims to be a 100% conforming implementation of Rust RFC 2366 for stabilization.
+
+**WARNING**: this crate only supports the most recent nightly Rust toolchain.
+
+## Documentation
+
+* [API docs (`master` branch)][master_docs]
+* [Performance guide][perf_guide]
+* [API docs (`docs.rs`)][docs.rs]: **CURRENTLY DOWN** due to
+  https://github.com/rust-lang-nursery/packed_simd/issues/110
+* [RFC2366 `std::simd`][rfc2366]: - contains motivation, design rationale,
+  discussion, etc.
+
+## Examples
+
+Most of the examples come with both a scalar and a vectorized implementation.
+
+* [`aobench`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/aobench)
+* [`fannkuch_redux`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/fannkuch_redux)
+* [`matrix inverse`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/matrix_inverse)
+* [`mandelbrot`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/mandelbrot)
+* [`n-body`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/nbody)
+* [`options_pricing`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/options_pricing)
+* [`spectral_norm`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/spectral_norm)
+* [`triangle transform`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/triangle_xform)
+* [`stencil`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/stencil)
+* [`vector dot product`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/dot_product)
+
+## Cargo features
+
+* `into_bits` (default: disabled): enables `FromBits`/`IntoBits` trait
+  implementations for the vector types. These allow reinterpreting the bits of a
+  vector type as those of another vector type safely by just using the
+  `.into_bits()` method.
+
+* `core_arch` (default: disabled): enable this feature to recompile `core::arch`
+  for the target-features enabled. `packed_simd` includes optimizations for some
+  target feature combinations that are enabled by this feature. Note, however,
+  that this is an unstable dependency, that rustc might break at any time.
+
+* `sleef-sys` (default: disabled - `x86_64` only): internally uses the [SLEEF]
+  short-vector math library when profitable via the [`sleef-sys`][sleef_sys]
+  crate. [SLEEF] is licensed under the [Boost Software License
+  v1.0][boost_license], an extremely permissive license, and can be statically
+  linked without issues.
+
+## Performance
+
+The following [ISPC] examples are also part of `packed_simd`'s
+[`examples/`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/)
+directory, where `packed_simd`+[`rayon`][rayon] are used to emulate [ISPC]'s
+Single-Program-Multiple-Data (SPMD) programming model. The performance results
+on different hardware is shown in the `readme.md` of each example. The following
+table summarizes the performance ranges, where `+` means speed-up and `-`
+slowdown:
+
+* `aobench`: `[-1.02x, +1.53x]`,
+* `stencil`: `[+1.06x, +1.72x]`,
+* `mandelbrot`: `[-1.74x, +1.2x]`,
+* `options_pricing`:
+   * `black_scholes`: `+1.0x`
+   * `binomial_put`: `+1.4x`
+
+ While SPMD is not the intended use case for `packed_simd`, it is possible to
+ combine the library with [`rayon`][rayon] to poorly emulate [ISPC]'s SPMD programming
+ model in Rust. Writing performant code is not as straightforward as with
+ [ISPC], but with some care (e.g. see the [Performance Guide][perf_guide]) one
+ can easily match and often out-perform [ISPC]'s "default performance".
+
+## Platform support
+
+The following table describes the supported platforms: `build` shows whether the
+library compiles without issues for a given target, while `run` shows whether
+the full testsuite passes on the target.
+
+| Linux targets:                    | build     | run     |
+|-----------------------------------|-----------|---------|
+| `i586-unknown-linux-gnu`          | ✓         | ✓       |
+| `i686-unknown-linux-gnu`          | ✓         | ✓       |
+| `x86_64-unknown-linux-gnu`        | ✓         | ✓       |
+| `arm-unknown-linux-gnueabi`       | ✗         | ✗       |
+| `arm-unknown-linux-gnueabihf`     | ✓         | ✓       |
+| `armv7-unknown-linux-gnueabi`     | ✓         | ✓       |
+| `aarch64-unknown-linux-gnu`       | ✓         | ✓       |
+| `mips-unknown-linux-gnu`          | ✓         | ✓       |
+| `mipsel-unknown-linux-musl`       | ✓         | ✓       |
+| `mips64-unknown-linux-gnuabi64`   | ✓         | ✓       |
+| `mips64el-unknown-linux-gnuabi64` | ✓         | ✓       |
+| `powerpc-unknown-linux-gnu`       | ✗         | ✗       |
+| `powerpc64-unknown-linux-gnu`     | ✗         | ✗       |
+| `powerpc64le-unknown-linux-gnu`   | ✗         | ✗       |
+| `s390x-unknown-linux-gnu`         | ✓         | ✓*      |
+| `sparc64-unknown-linux-gnu`       | ✓         | ✓*      |
+| **MacOSX targets:**               | **build** | **run** |
+| `x86_64-apple-darwin`             | ✓         | ✓       |
+| `i686-apple-darwin`               | ✓         | ✓       |
+| **Windows targets:**              | **build** | **run** |
+| `x86_64-pc-windows-msvc`          | ✓         | ✓       |
+| `i686-pc-windows-msvc`            | ✓         | ✓       |
+| `x86_64-pc-windows-gnu`           | ✗          | ✗        |
+| `i686-pc-windows-gnu`             | ✗          | ✗        |
+| **WebAssembly targets:**          | **build** | **run** |
+| `wasm32-unknown-unknown`          | ✓         | ✓      |
+| **Android targets:**              | **build** | **run** |
+| `x86_64-linux-android`            | ✓         | ✓       |
+| `arm-linux-androideabi`           | ✓         | ✓       |
+| `aarch64-linux-android`           | ✓         | ✗       |
+| **iOS targets:**                  | **build** | **run** |
+| `i386-apple-ios`                  | ✓         | ✗       |
+| `x86_64-apple-ios`                | ✓         | ✗       |
+| `armv7-apple-ios`                 | ✓         | ✗**     |
+| `aarch64-apple-ios`               | ✓         | ✗**     |
+| **xBSD targets:**                 | **build** | **run** |
+| `i686-unknown-freebsd`            | ✗         | ✗**     |
+| `x86_64-unknown-freebsd`          | ✗         | ✗**     |
+| `x86_64-unknown-netbsd`           | ✗         | ✗**     |
+| **Solaris targets:**              | **build** | **run** |
+| `x86_64-sun-solaris`              | ✗         | ✗**     |
+
+[*] most of the test suite passes correctly on these platform but
+there are correctness bugs open in the issue tracker.
+
+[**] it is currently not easily possible to run these platforms on CI.
+
+## Machine code verification
+
+The
+[`verify/`](https://github.com/rust-lang-nursery/packed_simd/tree/master/verify)
+crate tests disassembles the portable packed vector APIs at run-time and
+compares the generated machine code against the desired one to make sure that
+this crate remains efficient.
+
+## License
+
+This project is licensed under either of
+
+* [Apache License, Version 2.0](http://www.apache.org/licenses/LICENSE-2.0)
+  ([LICENSE-APACHE](LICENSE-APACHE))
+
+* [MIT License](http://opensource.org/licenses/MIT)
+  ([LICENSE-MIT](LICENSE-MIT))
+
+at your option.
+
+## Contributing
+
+We welcome all people who want to contribute.
+Please see the [contributing instructions] for more information.
+
+Contributions in any form (issues, pull requests, etc.) to this project
+must adhere to Rust's [Code of Conduct].
+
+Unless you explicitly state otherwise, any contribution intentionally submitted
+for inclusion in `packed_simd` by you, as defined in the Apache-2.0 license, shall be
+dual licensed as above, without any additional terms or conditions.
+
+[travis]: https://travis-ci.org/rust-lang-nursery/packed_simd
+[Travis-CI Status]: https://travis-ci.org/rust-lang-nursery/packed_simd.svg?branch=master
+[appveyor]: https://ci.appveyor.com/project/gnzlbg/packed-simd
+[Appveyor Status]: https://ci.appveyor.com/api/projects/status/hd7v9dvr442hgdix?svg=true
+[Latest Version]: https://img.shields.io/crates/v/packed_simd.svg
+[crates.io]: https://crates.io/crates/packed_simd
+[docs]: https://docs.rs/packed_simd/badge.svg
+[docs.rs]: https://docs.rs/packed_simd/
+[master_docs]: https://rust-lang-nursery.github.io/packed_simd/packed_simd/
+[perf_guide]: https://rust-lang-nursery.github.io/packed_simd/perf-guide/
+[rfc2366]: https://github.com/rust-lang/rfcs/pull/2366
+[ISPC]: https://ispc.github.io/
+[rayon]: https://crates.io/crates/rayon
+[boost_license]: https://www.boost.org/LICENSE_1_0.txt
+[SLEEF]: https://sleef.org/
+[sleef_sys]: https://crates.io/crates/sleef-sys
+[contributing instructions]: contributing.md
+[Code of Conduct]: https://www.rust-lang.org/en-US/conduct.html
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/rust-toolchain
@@ -0,0 +1,1 @@
+nightly
\ No newline at end of file
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/rustfmt.toml
@@ -0,0 +1,7 @@
+max_width = 79
+use_small_heuristics = "Max"
+wrap_comments = true
+comment_width = 79
+fn_args_density = "Compressed"
+edition = "2018"
+error_on_line_overflow = true
\ No newline at end of file
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api.rs
@@ -0,0 +1,308 @@
+//! Implements the Simd<[T; N]> APIs
+
+#[macro_use]
+mod bitmask;
+crate mod cast;
+#[macro_use]
+mod cmp;
+#[macro_use]
+mod default;
+#[macro_use]
+mod fmt;
+#[macro_use]
+mod from;
+#[macro_use]
+mod hash;
+#[macro_use]
+mod math;
+#[macro_use]
+mod minimal;
+#[macro_use]
+mod ops;
+#[macro_use]
+mod ptr;
+#[macro_use]
+mod reductions;
+#[macro_use]
+mod select;
+#[macro_use]
+mod shuffle;
+#[macro_use]
+mod shuffle1_dyn;
+#[macro_use]
+mod slice;
+#[macro_use]
+mod swap_bytes;
+#[macro_use]
+mod bit_manip;
+
+#[cfg(feature = "into_bits")]
+crate mod into_bits;
+
+macro_rules! impl_i {
+    ([$elem_ty:ident; $elem_n:expr]: $tuple_id:ident, $mask_ty:ident
+     | $ielem_ty:ident, $ibitmask_ty:ident | $test_tt:tt | $($elem_ids:ident),*
+     | From: $($from_vec_ty:ident),* | $(#[$doc:meta])*) => {
+        impl_minimal_iuf!([$elem_ty; $elem_n]: $tuple_id | $ielem_ty | $test_tt
+                          | $($elem_ids),* | $(#[$doc])*);
+        impl_ops_vector_arithmetic!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_ops_scalar_arithmetic!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_ops_vector_bitwise!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt | (!(0 as $elem_ty), 0)
+        );
+        impl_ops_scalar_bitwise!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt | (!(0 as $elem_ty), 0)
+        );
+        impl_ops_vector_shifts!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_ops_scalar_shifts!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_ops_vector_rotates!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_ops_vector_neg!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_ops_vector_int_min_max!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt
+        );
+        impl_reduction_integer_arithmetic!(
+            [$elem_ty; $elem_n]: $tuple_id | $ielem_ty | $test_tt
+        );
+        impl_reduction_min_max!(
+            [$elem_ty; $elem_n]: $tuple_id | $ielem_ty | $test_tt
+        );
+        impl_reduction_bitwise!(
+            [$elem_ty; $elem_n]: $tuple_id | $ielem_ty | $test_tt
+            | (|x|{ x as $elem_ty }) | (!(0 as $elem_ty), 0)
+        );
+        impl_fmt_debug!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_fmt_lower_hex!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_fmt_upper_hex!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_fmt_octal!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_fmt_binary!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_from_array!([$elem_ty; $elem_n]: $tuple_id | $test_tt | (1, 1));
+        impl_from_vectors!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt | $($from_vec_ty),*
+        );
+        impl_default!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_hash!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_slice_from_slice!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_slice_write_to_slice!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_swap_bytes!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_bit_manip!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_shuffle1_dyn!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_cmp_partial_eq!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt | (0, 1)
+        );
+        impl_cmp_eq!([$elem_ty; $elem_n]: $tuple_id | $test_tt | (0, 1));
+        impl_cmp_vertical!(
+            [$elem_ty; $elem_n]: $tuple_id, $mask_ty, false, (1, 0) | $test_tt
+        );
+        impl_cmp_partial_ord!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_cmp_ord!([$elem_ty; $elem_n]: $tuple_id | $test_tt | (0, 1));
+        impl_bitmask!($tuple_id | $ibitmask_ty | (-1, 0) | $test_tt);
+
+        test_select!($elem_ty, $mask_ty, $tuple_id, (1, 2) | $test_tt);
+        test_cmp_partial_ord_int!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        test_shuffle1_dyn!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+    }
+}
+
+macro_rules! impl_u {
+    ([$elem_ty:ident; $elem_n:expr]: $tuple_id:ident, $mask_ty:ident
+     | $ielem_ty:ident, $ibitmask_ty:ident | $test_tt:tt | $($elem_ids:ident),*
+     | From: $($from_vec_ty:ident),* | $(#[$doc:meta])*) => {
+        impl_minimal_iuf!([$elem_ty; $elem_n]: $tuple_id | $ielem_ty | $test_tt
+                          | $($elem_ids),* | $(#[$doc])*);
+        impl_ops_vector_arithmetic!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_ops_scalar_arithmetic!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_ops_vector_bitwise!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt | (!(0 as $elem_ty), 0)
+        );
+        impl_ops_scalar_bitwise!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt | (!(0 as $elem_ty), 0)
+        );
+        impl_ops_vector_shifts!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_ops_scalar_shifts!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_ops_vector_rotates!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_ops_vector_int_min_max!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt
+        );
+        impl_reduction_integer_arithmetic!(
+            [$elem_ty; $elem_n]: $tuple_id | $ielem_ty | $test_tt
+        );
+        impl_reduction_min_max!(
+            [$elem_ty; $elem_n]: $tuple_id | $ielem_ty | $test_tt
+        );
+        impl_reduction_bitwise!(
+            [$elem_ty; $elem_n]: $tuple_id | $ielem_ty | $test_tt
+            | (|x|{ x as $elem_ty }) | (!(0 as $elem_ty), 0)
+        );
+        impl_fmt_debug!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_fmt_lower_hex!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_fmt_upper_hex!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_fmt_octal!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_fmt_binary!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_from_array!([$elem_ty; $elem_n]: $tuple_id | $test_tt | (1, 1));
+        impl_from_vectors!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt | $($from_vec_ty),*
+        );
+        impl_default!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_hash!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_slice_from_slice!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_slice_write_to_slice!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_swap_bytes!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_bit_manip!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_shuffle1_dyn!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_cmp_partial_eq!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt | (1, 0)
+        );
+        impl_cmp_eq!([$elem_ty; $elem_n]: $tuple_id | $test_tt | (0, 1));
+        impl_cmp_vertical!(
+            [$elem_ty; $elem_n]: $tuple_id, $mask_ty, false, (1, 0) | $test_tt
+        );
+        impl_cmp_partial_ord!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_cmp_ord!([$elem_ty; $elem_n]: $tuple_id | $test_tt | (0, 1));
+        impl_bitmask!($tuple_id | $ibitmask_ty | ($ielem_ty::max_value(), 0) |
+                      $test_tt);
+
+        test_select!($elem_ty, $mask_ty, $tuple_id, (1, 2) | $test_tt);
+        test_cmp_partial_ord_int!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        test_shuffle1_dyn!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+    }
+}
+
+macro_rules! impl_f {
+    ([$elem_ty:ident; $elem_n:expr]: $tuple_id:ident, $mask_ty:ident
+     | $ielem_ty:ident | $test_tt:tt | $($elem_ids:ident),*
+     | From: $($from_vec_ty:ident),* | $(#[$doc:meta])*) => {
+        impl_minimal_iuf!([$elem_ty; $elem_n]: $tuple_id | $ielem_ty | $test_tt
+                          | $($elem_ids),* | $(#[$doc])*);
+        impl_ops_vector_arithmetic!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_ops_scalar_arithmetic!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_ops_vector_neg!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_ops_vector_float_min_max!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt
+        );
+        impl_reduction_float_arithmetic!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_reduction_min_max!(
+            [$elem_ty; $elem_n]: $tuple_id | $ielem_ty | $test_tt
+        );
+        impl_fmt_debug!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_from_array!([$elem_ty; $elem_n]: $tuple_id | $test_tt | (1., 1.));
+        impl_from_vectors!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt | $($from_vec_ty),*
+        );
+        impl_default!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_cmp_partial_eq!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt | (1., 0.)
+        );
+        impl_slice_from_slice!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_slice_write_to_slice!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_shuffle1_dyn!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+
+        impl_float_consts!([$elem_ty; $elem_n]: $tuple_id);
+        impl_float_category!([$elem_ty; $elem_n]: $tuple_id, $mask_ty);
+
+        // floating-point math
+        impl_math_float_abs!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_math_float_cos!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_math_float_exp!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_math_float_ln!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_math_float_mul_add!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_math_float_mul_adde!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_math_float_powf!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_math_float_recpre!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_math_float_rsqrte!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_math_float_sin!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_math_float_sqrt!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_math_float_sqrte!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_cmp_vertical!(
+            [$elem_ty; $elem_n]: $tuple_id, $mask_ty, false, (1., 0.)
+                | $test_tt
+        );
+
+        test_select!($elem_ty, $mask_ty, $tuple_id, (1., 2.) | $test_tt);
+        test_reduction_float_min_max!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt
+        );
+        test_shuffle1_dyn!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+    }
+}
+
+macro_rules! impl_m {
+    ([$elem_ty:ident; $elem_n:expr]: $tuple_id:ident
+     | $ielem_ty:ident, $ibitmask_ty:ident
+     | $test_tt:tt | $($elem_ids:ident),* | From: $($from_vec_ty:ident),*
+     | $(#[$doc:meta])*) => {
+        impl_minimal_mask!(
+            [$elem_ty; $elem_n]: $tuple_id | $ielem_ty | $test_tt
+            | $($elem_ids),* | $(#[$doc])*
+        );
+        impl_ops_vector_mask_bitwise!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt | (true, false)
+        );
+        impl_ops_scalar_mask_bitwise!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt | (true, false)
+        );
+        impl_reduction_bitwise!(
+            [bool; $elem_n]: $tuple_id | $ielem_ty | $test_tt
+                | (|x|{ x != 0 }) | (true, false)
+        );
+        impl_reduction_mask!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_fmt_debug!([bool; $elem_n]: $tuple_id | $test_tt);
+        impl_from_array!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt
+            | (crate::$elem_ty::new(true), true)
+        );
+        impl_from_vectors!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt | $($from_vec_ty),*
+        );
+        impl_default!([bool; $elem_n]: $tuple_id | $test_tt);
+        impl_cmp_partial_eq!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt | (true, false)
+        );
+        impl_cmp_eq!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt | (true, false)
+        );
+        impl_cmp_vertical!(
+            [$elem_ty; $elem_n]: $tuple_id, $tuple_id, true, (true, false)
+            | $test_tt
+        );
+        impl_select!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_cmp_partial_ord!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_cmp_ord!(
+            [$elem_ty; $elem_n]: $tuple_id | $test_tt | (false, true)
+        );
+        impl_shuffle1_dyn!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        impl_bitmask!($tuple_id | $ibitmask_ty | (true, false) | $test_tt);
+
+        test_cmp_partial_ord_mask!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+        test_shuffle1_dyn_mask!([$elem_ty; $elem_n]: $tuple_id | $test_tt);
+    }
+}
+
+macro_rules! impl_const_p {
+    ([$elem_ty:ty; $elem_n:expr]: $tuple_id:ident, $mask_ty:ident,
+     $usize_ty:ident, $isize_ty:ident
+     | $test_tt:tt | $($elem_ids:ident),*
+     | From: $($from_vec_ty:ident),* | $(#[$doc:meta])*) => {
+        impl_minimal_p!(
+            [$elem_ty; $elem_n]: $tuple_id, $mask_ty, $usize_ty, $isize_ty
+                | ref_ | $test_tt | $($elem_ids),*
+                | (1 as $elem_ty, 0 as $elem_ty) | $(#[$doc])*
+        );
+        impl_ptr_read!([$elem_ty; $elem_n]: $tuple_id, $mask_ty | $test_tt);
+    }
+}
+
+macro_rules! impl_mut_p {
+    ([$elem_ty:ty; $elem_n:expr]: $tuple_id:ident, $mask_ty:ident,
+     $usize_ty:ident, $isize_ty:ident
+     | $test_tt:tt | $($elem_ids:ident),*
+     | From: $($from_vec_ty:ident),* | $(#[$doc:meta])*) => {
+        impl_minimal_p!(
+            [$elem_ty; $elem_n]: $tuple_id, $mask_ty, $usize_ty, $isize_ty
+                | ref_mut_ | $test_tt | $($elem_ids),*
+                | (1 as $elem_ty, 0 as $elem_ty) | $(#[$doc])*
+        );
+        impl_ptr_read!([$elem_ty; $elem_n]: $tuple_id, $mask_ty | $test_tt);
+        impl_ptr_write!([$elem_ty; $elem_n]: $tuple_id, $mask_ty | $test_tt);
+    }
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/bit_manip.rs
@@ -0,0 +1,128 @@
+//! Bit manipulations.
+
+macro_rules! impl_bit_manip {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident | $test_tt:tt) => {
+        impl $id {
+            /// Returns the number of ones in the binary representation of
+            /// the lanes of `self`.
+            #[inline]
+            pub fn count_ones(self) -> Self {
+                super::codegen::bit_manip::BitManip::ctpop(self)
+            }
+
+            /// Returns the number of zeros in the binary representation of
+            /// the lanes of `self`.
+            #[inline]
+            pub fn count_zeros(self) -> Self {
+                super::codegen::bit_manip::BitManip::ctpop(!self)
+            }
+
+            /// Returns the number of leading zeros in the binary
+            /// representation of the lanes of `self`.
+            #[inline]
+            pub fn leading_zeros(self) -> Self {
+                super::codegen::bit_manip::BitManip::ctlz(self)
+            }
+
+            /// Returns the number of trailing zeros in the binary
+            /// representation of the lanes of `self`.
+            #[inline]
+            pub fn trailing_zeros(self) -> Self {
+                super::codegen::bit_manip::BitManip::cttz(self)
+            }
+        }
+
+        test_if! {
+            $test_tt:
+            paste::item_with_macros! {
+                #[allow(overflowing_literals)]
+                pub mod [<$id _bit_manip>] {
+                    use super::*;
+
+                    const LANE_WIDTH: usize = mem::size_of::<$elem_ty>() * 8;
+
+                    macro_rules! test_func {
+                        ($x:expr, $func:ident) => {{
+                            let mut actual = $x;
+                            for i in 0..$id::lanes() {
+                                actual = actual.replace(
+                                    i,
+                                    $x.extract(i).$func() as $elem_ty
+                                );
+                            }
+                            let expected = $x.$func();
+                            assert_eq!(actual, expected);
+                        }};
+                    }
+
+                    const BYTES: [u8; 64] = [
+                        0, 1, 2, 3, 4, 5, 6, 7,
+                        8, 9, 10, 11, 12, 13, 14, 15,
+                        16, 17, 18, 19, 20, 21, 22, 23,
+                        24, 25, 26, 27, 28, 29, 30, 31,
+                        32, 33, 34, 35, 36, 37, 38, 39,
+                        40, 41, 42, 43, 44, 45, 46, 47,
+                        48, 49, 50, 51, 52, 53, 54, 55,
+                        56, 57, 58, 59, 60, 61, 62, 63,
+                    ];
+
+                    fn load_bytes() -> $id {
+                        let elems: &mut [$elem_ty] = unsafe {
+                            slice::from_raw_parts_mut(
+                                BYTES.as_mut_ptr() as *mut $elem_ty,
+                                $id::lanes(),
+                            )
+                        };
+                        $id::from_slice_unaligned(elems)
+                    }
+
+                    #[cfg_attr(not(target_arch = "wasm32"), test)]
+                    #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn count_ones() {
+                        test_func!($id::splat(0), count_ones);
+                        test_func!($id::splat(!0), count_ones);
+                        test_func!(load_bytes(), count_ones);
+                    }
+
+                    #[cfg_attr(not(target_arch = "wasm32"), test)]
+                    #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn count_zeros() {
+                        test_func!($id::splat(0), count_zeros);
+                        test_func!($id::splat(!0), count_zeros);
+                        test_func!(load_bytes(), count_zeros);
+                    }
+
+                    #[cfg_attr(not(target_arch = "wasm32"), test)]
+                    #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn leading_zeros() {
+                        test_func!($id::splat(0), leading_zeros);
+                        test_func!($id::splat(1), leading_zeros);
+                        // some implementations use `pshufb` which has unique
+                        // behavior when the 8th bit is set.
+                        test_func!($id::splat(0b1000_0010), leading_zeros);
+                        test_func!($id::splat(!0), leading_zeros);
+                        test_func!(
+                            $id::splat(1 << (LANE_WIDTH - 1)),
+                            leading_zeros
+                        );
+                        test_func!(load_bytes(), leading_zeros);
+                    }
+
+                    #[cfg_attr(not(target_arch = "wasm32"), test)]
+                    #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn trailing_zeros() {
+                        test_func!($id::splat(0), trailing_zeros);
+                        test_func!($id::splat(1), trailing_zeros);
+                        test_func!($id::splat(0b1000_0010), trailing_zeros);
+                        test_func!($id::splat(!0), trailing_zeros);
+                        test_func!(
+                            $id::splat(1 << (LANE_WIDTH - 1)),
+                            trailing_zeros
+                        );
+                        test_func!(load_bytes(), trailing_zeros);
+                    }
+                }
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/bitmask.rs
@@ -0,0 +1,82 @@
+//! Bitmask API
+
+macro_rules! impl_bitmask {
+    ($id:ident | $ibitmask_ty:ident | ($set:expr, $clear:expr)
+     | $test_tt:tt) => {
+        impl $id {
+            /// Creates a bitmask with the MSB of each vector lane.
+            ///
+            /// If the vector has less than 8 lanes, the bits that do not
+            /// correspond to any vector lanes are cleared.
+            #[inline]
+            pub fn bitmask(self) -> $ibitmask_ty {
+                unsafe { codegen::llvm::simd_bitmask(self.0) }
+            }
+        }
+
+        test_if! {
+            $test_tt:
+            paste::item! {
+                #[cfg(not(any(
+                    // FIXME: https://github.com/rust-lang-nursery/packed_simd/issues/210
+                    all(target_arch = "mips", target_endian = "big"),
+                    all(target_arch = "mips64", target_endian = "big"),
+                    target_arch = "sparc64",
+                    target_arch = "s390x",
+                )))]
+                pub mod [<$id _bitmask>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)]
+                    #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn bitmask() {
+                        // clear all lanes
+                        let vec = $id::splat($clear as _);
+                        let bitmask: $ibitmask_ty = 0;
+                        assert_eq!(vec.bitmask(), bitmask);
+
+                        // set even lanes
+                        let mut vec = $id::splat($clear as _);
+                        for i in 0..$id::lanes() {
+                            if i % 2 == 0 {
+                                vec = vec.replace(i, $set as _);
+                            }
+                        }
+                        // create bitmask with even lanes set:
+                        let mut bitmask: $ibitmask_ty = 0;
+                        for i in 0..$id::lanes() {
+                            if i % 2 == 0 {
+                                bitmask |= 1 << i;
+                            }
+                        }
+                        assert_eq!(vec.bitmask(), bitmask);
+
+
+                        // set odd lanes
+                        let mut vec = $id::splat($clear as _);
+                        for i in 0..$id::lanes() {
+                            if i % 2 != 0 {
+                                vec = vec.replace(i, $set as _);
+                            }
+                        }
+                        // create bitmask with odd lanes set:
+                        let mut bitmask: $ibitmask_ty = 0;
+                        for i in 0..$id::lanes() {
+                            if i % 2 != 0 {
+                                bitmask |= 1 << i;
+                            }
+                        }
+                        assert_eq!(vec.bitmask(), bitmask);
+
+                        // set all lanes
+                        let vec = $id::splat($set as _);
+                        let mut bitmask: $ibitmask_ty = 0;
+                        for i in 0..$id::lanes() {
+                            bitmask |= 1 << i;
+                        }
+                        assert_eq!(vec.bitmask(), bitmask);
+                    }
+                }
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/cast.rs
@@ -0,0 +1,114 @@
+//! Implementation of `FromCast` and `IntoCast`.
+#![cfg_attr(
+    feature = "cargo-clippy",
+    allow(
+        clippy::module_name_repetitions,
+        clippy::stutter
+    )
+)]
+
+/// Numeric cast from `T` to `Self`.
+///
+/// > Note: This is a temporary workaround until the conversion traits
+/// specified > in [RFC2484] are implemented.
+///
+/// Numeric cast between vectors with the same number of lanes, such that:
+///
+/// * casting integer vectors whose lane types have the same size (e.g. `i32xN`
+/// -> `u32xN`) is a **no-op**,
+///
+/// * casting from a larger integer to a smaller integer (e.g. `u32xN` ->
+/// `u8xN`) will **truncate**,
+///
+/// * casting from a smaller integer to a larger integer   (e.g. `u8xN` ->
+///   `u32xN`) will:
+///    * **zero-extend** if the source is unsigned, or
+///    * **sign-extend** if the source is signed,
+///
+/// * casting from a float to an integer will **round the float towards zero**,
+///
+/// * casting from an integer to float will produce the floating point
+/// representation of the integer, **rounding to nearest, ties to even**,
+///
+/// * casting from an `f32` to an `f64` is perfect and lossless,
+///
+/// * casting from an `f64` to an `f32` **rounds to nearest, ties to even**.
+///
+/// [RFC2484]: https://github.com/rust-lang/rfcs/pull/2484
+pub trait FromCast<T>: crate::marker::Sized {
+    /// Numeric cast from `T` to `Self`.
+    fn from_cast(_: T) -> Self;
+}
+
+/// Numeric cast from `Self` to `T`.
+///
+/// > Note: This is a temporary workaround until the conversion traits
+/// specified > in [RFC2484] are implemented.
+///
+/// Numeric cast between vectors with the same number of lanes, such that:
+///
+/// * casting integer vectors whose lane types have the same size (e.g. `i32xN`
+/// -> `u32xN`) is a **no-op**,
+///
+/// * casting from a larger integer to a smaller integer (e.g. `u32xN` ->
+/// `u8xN`) will **truncate**,
+///
+/// * casting from a smaller integer to a larger integer   (e.g. `u8xN` ->
+///   `u32xN`) will:
+///    * **zero-extend** if the source is unsigned, or
+///    * **sign-extend** if the source is signed,
+///
+/// * casting from a float to an integer will **round the float towards zero**,
+///
+/// * casting from an integer to float will produce the floating point
+/// representation of the integer, **rounding to nearest, ties to even**,
+///
+/// * casting from an `f32` to an `f64` is perfect and lossless,
+///
+/// * casting from an `f64` to an `f32` **rounds to nearest, ties to even**.
+///
+/// [RFC2484]: https://github.com/rust-lang/rfcs/pull/2484
+pub trait Cast<T>: crate::marker::Sized {
+    /// Numeric cast from `self` to `T`.
+    fn cast(self) -> T;
+}
+
+/// `FromCast` implies `Cast`.
+impl<T, U> Cast<U> for T
+where
+    U: FromCast<T>,
+{
+    #[inline]
+    fn cast(self) -> U {
+        U::from_cast(self)
+    }
+}
+
+/// `FromCast` and `Cast` are reflexive
+impl<T> FromCast<T> for T {
+    #[inline]
+    fn from_cast(t: Self) -> Self {
+        t
+    }
+}
+
+#[macro_use]
+mod macros;
+
+mod v16;
+pub use self::v16::*;
+
+mod v32;
+pub use self::v32::*;
+
+mod v64;
+pub use self::v64::*;
+
+mod v128;
+pub use self::v128::*;
+
+mod v256;
+pub use self::v256::*;
+
+mod v512;
+pub use self::v512::*;
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/cast/macros.rs
@@ -0,0 +1,82 @@
+//! Macros implementing `FromCast`
+
+macro_rules! impl_from_cast_ {
+    ($id:ident[$test_tt:tt]: $from_ty:ident) => {
+        impl crate::api::cast::FromCast<$from_ty> for $id {
+            #[inline]
+            fn from_cast(x: $from_ty) -> Self {
+                use crate::llvm::simd_cast;
+                debug_assert_eq!($from_ty::lanes(), $id::lanes());
+                Simd(unsafe { simd_cast(x.0) })
+            }
+        }
+
+        test_if!{
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _from_cast_ $from_ty>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn test() {
+                        assert_eq!($id::lanes(), $from_ty::lanes());
+                    }
+                }
+            }
+        }
+    };
+}
+
+macro_rules! impl_from_cast {
+    ($id:ident[$test_tt:tt]: $($from_ty:ident),*) => {
+        $(
+            impl_from_cast_!($id[$test_tt]: $from_ty);
+        )*
+    }
+}
+
+macro_rules! impl_from_cast_mask_ {
+    ($id:ident[$test_tt:tt]: $from_ty:ident) => {
+        impl crate::api::cast::FromCast<$from_ty> for $id {
+            #[inline]
+            fn from_cast(x: $from_ty) -> Self {
+                debug_assert_eq!($from_ty::lanes(), $id::lanes());
+                x.ne($from_ty::default())
+                    .select($id::splat(true), $id::splat(false))
+            }
+        }
+
+        test_if!{
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _from_cast_ $from_ty>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn test() {
+                        assert_eq!($id::lanes(), $from_ty::lanes());
+
+                        let x = $from_ty::default();
+                        let m: $id = x.cast();
+                        assert!(m.none());
+                    }
+                }
+            }
+        }
+    };
+}
+
+macro_rules! impl_from_cast_mask {
+    ($id:ident[$test_tt:tt]: $($from_ty:ident),*) => {
+        $(
+            impl_from_cast_mask_!($id[$test_tt]: $from_ty);
+        )*
+    }
+}
+
+#[allow(unused)]
+macro_rules! impl_into_cast {
+    ($id:ident[$test_tt:tt]: $($from_ty:ident),*) => {
+        $(
+            impl_from_cast_!($from_ty[$test_tt]: $id);
+        )*
+    }
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/cast/v128.rs
@@ -0,0 +1,79 @@
+//! `FromCast` and `IntoCast` implementations for portable 128-bit wide vectors
+#![rustfmt::skip]
+
+use crate::*;
+
+impl_from_cast!(
+    i8x16[test_v128]: u8x16, m8x16, i16x16, u16x16, m16x16, i32x16, u32x16, f32x16, m32x16
+);
+impl_from_cast!(
+    u8x16[test_v128]: i8x16, m8x16, i16x16, u16x16, m16x16, i32x16, u32x16, f32x16, m32x16
+);
+impl_from_cast_mask!(
+    m8x16[test_v128]: i8x16, u8x16, i16x16, u16x16, m16x16, i32x16, u32x16, f32x16, m32x16
+);
+
+impl_from_cast!(
+    i16x8[test_v128]: i8x8, u8x8, m8x8, u16x8, m16x8, i32x8, u32x8, f32x8, m32x8,
+    i64x8, u64x8, f64x8, m64x8, isizex8, usizex8, msizex8
+);
+impl_from_cast!(
+    u16x8[test_v128]: i8x8, u8x8, m8x8, i16x8, m16x8, i32x8, u32x8, f32x8, m32x8,
+    i64x8, u64x8, f64x8, m64x8, isizex8, usizex8, msizex8
+);
+impl_from_cast_mask!(
+    m16x8[test_v128]: i8x8, u8x8, m8x8, i16x8, u16x8, i32x8, u32x8, f32x8, m32x8,
+    i64x8, u64x8, f64x8, m64x8, isizex8, usizex8, msizex8
+);
+
+impl_from_cast!(
+    i32x4[test_v128]: i8x4, u8x4, m8x4, i16x4, u16x4, m16x4, u32x4, f32x4, m32x4,
+    i64x4, u64x4, f64x4, m64x4, i128x4, u128x4, m128x4, isizex4, usizex4, msizex4
+);
+impl_from_cast!(
+    u32x4[test_v128]: i8x4, u8x4, m8x4, i16x4, u16x4, m16x4, i32x4, f32x4, m32x4,
+    i64x4, u64x4, f64x4, m64x4, i128x4, u128x4, m128x4, isizex4, usizex4, msizex4
+);
+impl_from_cast!(
+    f32x4[test_v128]: i8x4, u8x4, m8x4, i16x4, u16x4, m16x4, i32x4, u32x4, m32x4,
+    i64x4, u64x4, f64x4, m64x4, i128x4, u128x4, m128x4, isizex4, usizex4, msizex4
+);
+impl_from_cast_mask!(
+    m32x4[test_v128]: i8x4, u8x4, m8x4, i16x4, u16x4, m16x4, i32x4, u32x4, f32x4,
+    i64x4, u64x4, f64x4, m64x4, i128x4, u128x4, m128x4, isizex4, usizex4, msizex4
+);
+
+impl_from_cast!(
+    i64x2[test_v128]: i8x2, u8x2, m8x2, i16x2, u16x2, m16x2, i32x2, u32x2, f32x2, m32x2,
+    u64x2, f64x2, m64x2, i128x2, u128x2, m128x2, isizex2, usizex2, msizex2
+);
+impl_from_cast!(
+    u64x2[test_v128]: i8x2, u8x2, m8x2, i16x2, u16x2, m16x2, i32x2, u32x2, f32x2, m32x2,
+    i64x2, f64x2, m64x2, i128x2, u128x2, m128x2, isizex2, usizex2, msizex2
+);
+impl_from_cast!(
+    f64x2[test_v128]: i8x2, u8x2, m8x2, i16x2, u16x2, m16x2, i32x2, u32x2, f32x2, m32x2,
+    i64x2, u64x2, m64x2, i128x2, u128x2, m128x2, isizex2, usizex2, msizex2
+);
+impl_from_cast_mask!(
+    m64x2[test_v128]: i8x2, u8x2, m8x2, i16x2, u16x2, m16x2, i32x2, u32x2, f32x2, m32x2,
+    i64x2, u64x2, f64x2, i128x2, u128x2, m128x2, isizex2, usizex2, msizex2
+);
+
+impl_from_cast!(
+    isizex2[test_v128]: i8x2, u8x2, m8x2, i16x2, u16x2, m16x2, i32x2, u32x2, f32x2, m32x2,
+    i64x2, u64x2, f64x2, m64x2, i128x2, u128x2, m128x2, usizex2, msizex2
+);
+impl_from_cast!(
+    usizex2[test_v128]: i8x2, u8x2, m8x2, i16x2, u16x2, m16x2, i32x2, u32x2, f32x2, m32x2,
+    i64x2, u64x2, f64x2, m64x2, i128x2, u128x2, m128x2, isizex2, msizex2
+);
+impl_from_cast_mask!(
+    msizex2[test_v128]: i8x2, u8x2, m8x2, i16x2, u16x2, m16x2, i32x2, u32x2, f32x2, m32x2,
+    i64x2, u64x2, f64x2, m64x2, i128x2, u128x2, m128x2, isizex2, usizex2
+);
+
+// FIXME[test_v128]: 64-bit single element vectors into_cast impls
+impl_from_cast!(i128x1[test_v128]: u128x1, m128x1);
+impl_from_cast!(u128x1[test_v128]: i128x1, m128x1);
+impl_from_cast!(m128x1[test_v128]: i128x1, u128x1);
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/cast/v16.rs
@@ -0,0 +1,17 @@
+//! `FromCast` and `IntoCast` implementations for portable 16-bit wide vectors
+#![rustfmt::skip]
+
+use crate::*;
+
+impl_from_cast!(
+    i8x2[test_v16]: u8x2, m8x2, i16x2, u16x2, m16x2, i32x2, u32x2, f32x2, m32x2,
+    i64x2, u64x2, f64x2, m64x2, i128x2, u128x2, m128x2, isizex2, usizex2, msizex2
+);
+impl_from_cast!(
+    u8x2[test_v16]: i8x2, m8x2, i16x2, u16x2, m16x2, i32x2, u32x2, f32x2, m32x2,
+    i64x2, u64x2, f64x2, m64x2, i128x2, u128x2, m128x2, isizex2, usizex2, msizex2
+);
+impl_from_cast_mask!(
+    m8x2[test_v16]: i8x2, u8x2, i16x2, u16x2, m16x2, i32x2, u32x2, f32x2, m32x2,
+    i64x2, u64x2, f64x2, m64x2, i128x2, u128x2, m128x2, isizex2, usizex2, msizex2
+);
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/cast/v256.rs
@@ -0,0 +1,81 @@
+//! `FromCast` and `IntoCast` implementations for portable 256-bit wide vectors
+#![rustfmt::skip]
+
+use crate::*;
+
+impl_from_cast!(i8x32[test_v256]: u8x32, m8x32, i16x32, u16x32, m16x32);
+impl_from_cast!(u8x32[test_v256]: i8x32, m8x32, i16x32, u16x32, m16x32);
+impl_from_cast_mask!(m8x32[test_v256]: i8x32, u8x32, i16x32, u16x32, m16x32);
+
+impl_from_cast!(
+    i16x16[test_v256]: i8x16, u8x16, m8x16, u16x16, m16x16,
+    i32x16, u32x16, f32x16, m32x16
+);
+impl_from_cast!(
+    u16x16[test_v256]: i8x16, u8x16, m8x16, i16x16, m16x16,
+    i32x16, u32x16, f32x16, m32x16
+);
+impl_from_cast_mask!(
+    m16x16[test_v256]: i8x16, u8x16, m8x16, i16x16, u16x16,
+    i32x16, u32x16, f32x16, m32x16
+);
+
+impl_from_cast!(
+    i32x8[test_v256]: i8x8, u8x8, m8x8, i16x8, u16x8, m16x8, u32x8, f32x8, m32x8,
+    i64x8, u64x8, f64x8, m64x8, isizex8, usizex8, msizex8
+);
+impl_from_cast!(
+    u32x8[test_v256]: i8x8, u8x8, m8x8, i16x8, u16x8, m16x8, i32x8, f32x8, m32x8,
+    i64x8, u64x8, f64x8, m64x8, isizex8, usizex8, msizex8
+);
+impl_from_cast!(
+    f32x8[test_v256]: i8x8, u8x8, m8x8, i16x8, u16x8, m16x8, i32x8, u32x8, m32x8,
+    i64x8, u64x8, f64x8, m64x8, isizex8, usizex8, msizex8
+);
+impl_from_cast_mask!(
+    m32x8[test_v256]: i8x8, u8x8, m8x8, i16x8, u16x8, m16x8, i32x8, u32x8, f32x8,
+    i64x8, u64x8, f64x8, m64x8, isizex8, usizex8, msizex8
+);
+
+impl_from_cast!(
+    i64x4[test_v256]: i8x4, u8x4, m8x4, i16x4, u16x4, m16x4, i32x4, u32x4, f32x4, m32x4,
+    u64x4, f64x4, m64x4, i128x4, u128x4, m128x4, isizex4, usizex4, msizex4
+);
+impl_from_cast!(
+    u64x4[test_v256]: i8x4, u8x4, m8x4, i16x4, u16x4, m16x4, i32x4, u32x4, f32x4, m32x4,
+    i64x4, f64x4, m64x4, i128x4, u128x4, m128x4, isizex4, usizex4, msizex4
+);
+impl_from_cast!(
+    f64x4[test_v256]: i8x4, u8x4, m8x4, i16x4, u16x4, m16x4, i32x4, u32x4, f32x4, m32x4,
+    i64x4, u64x4, m64x4, i128x4, u128x4, m128x4, isizex4, usizex4, msizex4
+);
+impl_from_cast_mask!(
+    m64x4[test_v256]: i8x4, u8x4, m8x4, i16x4, u16x4, m16x4, i32x4, u32x4, f32x4, m32x4,
+    i64x4, u64x4, f64x4, i128x4, u128x4, m128x4, isizex4, usizex4, msizex4
+);
+
+impl_from_cast!(
+    i128x2[test_v256]: i8x2, u8x2, m8x2, i16x2, u16x2, m16x2, i32x2, u32x2, f32x2, m32x2,
+    i64x2, u64x2, f64x2, m64x2, u128x2, m128x2, isizex2, usizex2, msizex2
+);
+impl_from_cast!(
+    u128x2[test_v256]: i8x2, u8x2, m8x2, i16x2, u16x2, m16x2, i32x2, u32x2, f32x2, m32x2,
+    i64x2, u64x2, f64x2, m64x2, i128x2, m128x2, isizex2, usizex2, msizex2
+);
+impl_from_cast_mask!(
+    m128x2[test_v256]: i8x2, u8x2, m8x2, i16x2, u16x2, m16x2, i32x2, u32x2, f32x2, m32x2,
+    i64x2, u64x2, m64x2, f64x2, i128x2, u128x2, isizex2, usizex2, msizex2
+);
+
+impl_from_cast!(
+    isizex4[test_v256]: i8x4, u8x4, m8x4, i16x4, u16x4, m16x4, i32x4, u32x4, f32x4, m32x4,
+    i64x4, u64x4, f64x4, m64x4, i128x4, u128x4, m128x4, usizex4, msizex4
+);
+impl_from_cast!(
+    usizex4[test_v256]: i8x4, u8x4, m8x4, i16x4, u16x4, m16x4, i32x4, u32x4, f32x4, m32x4,
+    i64x4, u64x4, f64x4, m64x4, i128x4, u128x4, m128x4, isizex4, msizex4
+);
+impl_from_cast_mask!(
+    msizex4[test_v256]: i8x4, u8x4, m8x4, i16x4, u16x4, m16x4, i32x4, u32x4, f32x4, m32x4,
+    i64x4, u64x4, f64x4, m64x4, i128x4, u128x4, m128x4, isizex4, usizex4
+);
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/cast/v32.rs
@@ -0,0 +1,30 @@
+//! `FromCast` and `IntoCast` implementations for portable 32-bit wide vectors
+#![rustfmt::skip]
+
+use crate::*;
+
+impl_from_cast!(
+    i8x4[test_v32]: u8x4, m8x4, i16x4, u16x4, m16x4, i32x4, u32x4, f32x4, m32x4,
+    i64x4, u64x4, f64x4, m64x4, i128x4, u128x4, m128x4, isizex4, usizex4, msizex4
+);
+impl_from_cast!(
+    u8x4[test_v32]: i8x4, m8x4, i16x4, u16x4, m16x4, i32x4, u32x4, f32x4, m32x4,
+    i64x4, u64x4, f64x4, m64x4, i128x4, u128x4, m128x4, isizex4, usizex4, msizex4
+);
+impl_from_cast_mask!(
+    m8x4[test_v32]: i8x4, u8x4, i16x4, u16x4, m16x4, i32x4, u32x4, f32x4, m32x4,
+    i64x4, u64x4, f64x4, m64x4, i128x4, u128x4, m128x4, isizex4, usizex4, msizex4
+);
+
+impl_from_cast!(
+    i16x2[test_v32]: i8x2, u8x2, m8x2, u16x2, m16x2, i32x2, u32x2, f32x2, m32x2,
+    i64x2, u64x2, f64x2, m64x2, i128x2, u128x2, m128x2, isizex2, usizex2, msizex2
+);
+impl_from_cast!(
+    u16x2[test_v32]: i8x2, u8x2, m8x2, i16x2, m16x2, i32x2, u32x2, f32x2, m32x2,
+    i64x2, u64x2, f64x2, m64x2, i128x2, u128x2, m128x2, isizex2, usizex2, msizex2
+);
+impl_from_cast_mask!(
+    m16x2[test_v32]: i8x2, u8x2, m8x2, i16x2, u16x2, i32x2, u32x2, f32x2, m32x2,
+    i64x2, u64x2, f64x2, m64x2, i128x2, u128x2, m128x2, isizex2, usizex2, msizex2
+);
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/cast/v512.rs
@@ -0,0 +1,68 @@
+//! `FromCast` and `IntoCast` implementations for portable 512-bit wide vectors
+#![rustfmt::skip]
+
+use crate::*;
+
+impl_from_cast!(i8x64[test_v512]: u8x64, m8x64);
+impl_from_cast!(u8x64[test_v512]: i8x64, m8x64);
+impl_from_cast_mask!(m8x64[test_v512]: i8x64, u8x64);
+
+impl_from_cast!(i16x32[test_v512]: i8x32, u8x32, m8x32, u16x32, m16x32);
+impl_from_cast!(u16x32[test_v512]: i8x32, u8x32, m8x32, i16x32, m16x32);
+impl_from_cast_mask!(m16x32[test_v512]: i8x32, u8x32, m8x32, i16x32, u16x32);
+
+impl_from_cast!(
+    i32x16[test_v512]: i8x16, u8x16, m8x16, i16x16, u16x16, m16x16, u32x16, f32x16, m32x16
+);
+impl_from_cast!(
+    u32x16[test_v512]: i8x16, u8x16, m8x16, i16x16, u16x16, m16x16, i32x16, f32x16, m32x16
+);
+impl_from_cast!(
+    f32x16[test_v512]: i8x16, u8x16, m8x16, i16x16, u16x16, m16x16, i32x16, u32x16, m32x16
+);
+impl_from_cast_mask!(
+    m32x16[test_v512]: i8x16, u8x16, m8x16, i16x16, u16x16, m16x16, i32x16, u32x16, f32x16
+);
+
+impl_from_cast!(
+    i64x8[test_v512]: i8x8, u8x8, m8x8, i16x8, u16x8, m16x8, i32x8, u32x8, f32x8, m32x8,
+    u64x8, f64x8, m64x8, isizex8, usizex8, msizex8
+);
+impl_from_cast!(
+    u64x8[test_v512]: i8x8, u8x8, m8x8, i16x8, u16x8, m16x8, i32x8, u32x8, f32x8, m32x8,
+    i64x8, f64x8, m64x8, isizex8, usizex8, msizex8
+);
+impl_from_cast!(
+    f64x8[test_v512]: i8x8, u8x8, m8x8, i16x8, u16x8, m16x8, i32x8, u32x8, f32x8, m32x8,
+    i64x8, u64x8, m64x8, isizex8, usizex8, msizex8
+);
+impl_from_cast_mask!(
+    m64x8[test_v512]: i8x8, u8x8, m8x8, i16x8, u16x8, m16x8, i32x8, u32x8, f32x8, m32x8,
+    i64x8, u64x8, f64x8, isizex8, usizex8, msizex8
+);
+
+impl_from_cast!(
+    i128x4[test_v512]: i8x4, u8x4, m8x4, i16x4, u16x4, m16x4, i32x4, u32x4, f32x4, m32x4,
+    i64x4, u64x4, f64x4, m64x4, u128x4, m128x4, isizex4, usizex4, msizex4
+);
+impl_from_cast!(
+    u128x4[test_v512]: i8x4, u8x4, m8x4, i16x4, u16x4, m16x4, i32x4, u32x4, f32x4, m32x4,
+    i64x4, u64x4, f64x4, m64x4, i128x4, m128x4, isizex4, usizex4, msizex4
+);
+impl_from_cast_mask!(
+    m128x4[test_v512]: i8x4, u8x4, m8x4, i16x4, u16x4, m16x4, i32x4, u32x4, f32x4, m32x4,
+    i64x4, u64x4, m64x4, f64x4, i128x4, u128x4, isizex4, usizex4, msizex4
+);
+
+impl_from_cast!(
+    isizex8[test_v512]: i8x8, u8x8, m8x8, i16x8, u16x8, m16x8, i32x8, u32x8, f32x8, m32x8,
+    i64x8, u64x8, f64x8, m64x8, usizex8, msizex8
+);
+impl_from_cast!(
+    usizex8[test_v512]: i8x8, u8x8, m8x8, i16x8, u16x8, m16x8, i32x8, u32x8, f32x8, m32x8,
+    i64x8, u64x8, f64x8, m64x8, isizex8, msizex8
+);
+impl_from_cast_mask!(
+    msizex8[test_v512]: i8x8, u8x8, m8x8, i16x8, u16x8, m16x8, i32x8, u32x8, f32x8, m32x8,
+    i64x8, u64x8, f64x8, m64x8, isizex8, usizex8
+);
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/cast/v64.rs
@@ -0,0 +1,47 @@
+//! `FromCast` and `IntoCast` implementations for portable 64-bit wide vectors
+#![rustfmt::skip]
+
+use crate::*;
+
+impl_from_cast!(
+    i8x8[test_v64]: u8x8, m8x8, i16x8, u16x8, m16x8, i32x8, u32x8, f32x8, m32x8,
+    i64x8, u64x8, f64x8, m64x8, isizex8, usizex8, msizex8
+);
+impl_from_cast!(
+    u8x8[test_v64]: i8x8, m8x8, i16x8, u16x8, m16x8, i32x8, u32x8, f32x8, m32x8,
+    i64x8, u64x8, f64x8, m64x8, isizex8, usizex8, msizex8
+);
+impl_from_cast_mask!(
+    m8x8[test_v64]: i8x8, u8x8, i16x8, u16x8, m16x8, i32x8, u32x8, f32x8, m32x8,
+    i64x8, u64x8, f64x8, m64x8, isizex8, usizex8, msizex8
+);
+
+impl_from_cast!(
+    i16x4[test_v64]: i8x4, u8x4, m8x4, u16x4, m16x4, i32x4, u32x4, f32x4, m32x4,
+    i64x4, u64x4, f64x4, m64x4, i128x4, u128x4, m128x4, isizex4, usizex4, msizex4
+);
+impl_from_cast!(
+    u16x4[test_v64]: i8x4, u8x4, m8x4, i16x4, m16x4, i32x4, u32x4, f32x4, m32x4,
+    i64x4, u64x4, f64x4, m64x4, i128x4, u128x4, m128x4, isizex4, usizex4, msizex4
+);
+impl_from_cast_mask!(
+    m16x4[test_v64]: i8x4, u8x4, m8x4, i16x4, u16x4, i32x4, u32x4, f32x4, m32x4,
+    i64x4, u64x4, f64x4, m64x4, i128x4, u128x4, m128x4, isizex4, usizex4, msizex4
+);
+
+impl_from_cast!(
+    i32x2[test_v64]: i8x2, u8x2, m8x2, i16x2, u16x2, m16x2, u32x2, f32x2, m32x2,
+    i64x2, u64x2, f64x2, m64x2, i128x2, u128x2, m128x2, isizex2, usizex2, msizex2
+);
+impl_from_cast!(
+    u32x2[test_v64]: i8x2, u8x2, m8x2, i16x2, u16x2, m16x2, i32x2, f32x2, m32x2,
+    i64x2, u64x2, f64x2, m64x2, i128x2, u128x2, m128x2, isizex2, usizex2, msizex2
+);
+impl_from_cast!(
+    f32x2[test_v64]: i8x2, u8x2, m8x2, i16x2, u16x2, m16x2, i32x2, u32x2, m32x2,
+    i64x2, u64x2, f64x2, m64x2, i128x2, u128x2, m128x2, isizex2, usizex2, msizex2
+);
+impl_from_cast_mask!(
+    m32x2[test_v64]: i8x2, u8x2, m8x2, i16x2, u16x2, m16x2, i32x2, u32x2, f32x2,
+    i64x2, u64x2, f64x2, m64x2, i128x2, u128x2, m128x2, isizex2, usizex2, msizex2
+);
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/cmp.rs
@@ -0,0 +1,16 @@
+//! Implement cmp traits for vector types
+
+#[macro_use]
+mod partial_eq;
+
+#[macro_use]
+mod eq;
+
+#[macro_use]
+mod partial_ord;
+
+#[macro_use]
+mod ord;
+
+#[macro_use]
+mod vertical;
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/cmp/eq.rs
@@ -0,0 +1,27 @@
+//! Implements `Eq` for vector types.
+
+macro_rules! impl_cmp_eq {
+    (
+        [$elem_ty:ident; $elem_count:expr]:
+        $id:ident | $test_tt:tt |
+        ($true:expr, $false:expr)
+    ) => {
+        impl crate::cmp::Eq for $id {}
+        impl crate::cmp::Eq for LexicographicallyOrdered<$id> {}
+
+        test_if!{
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _cmp_eq>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn eq() {
+                        fn foo<E: crate::cmp::Eq>(_: E) {}
+                        let a = $id::splat($false);
+                        foo(a);
+                    }
+                }
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/cmp/ord.rs
@@ -0,0 +1,43 @@
+//! Implements `Ord` for vector types.
+
+macro_rules! impl_cmp_ord {
+    (
+        [$elem_ty:ident; $elem_count:expr]:
+        $id:ident | $test_tt:tt |
+        ($true:expr, $false:expr)
+    ) => {
+        impl $id {
+            /// Returns a wrapper that implements `Ord`.
+            #[inline]
+            pub fn lex_ord(&self) -> LexicographicallyOrdered<$id> {
+                LexicographicallyOrdered(*self)
+            }
+        }
+
+        impl crate::cmp::Ord for LexicographicallyOrdered<$id> {
+            #[inline]
+            fn cmp(&self, other: &Self) -> crate::cmp::Ordering {
+                match self.partial_cmp(other) {
+                    Some(x) => x,
+                    None => unsafe { crate::hint::unreachable_unchecked() },
+                }
+            }
+        }
+
+        test_if!{
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _cmp_ord>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn eq() {
+                        fn foo<E: crate::cmp::Ord>(_: E) {}
+                        let a = $id::splat($false);
+                        foo(a.partial_lex_ord());
+                        foo(a.lex_ord());
+                    }
+                }
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/cmp/partial_eq.rs
@@ -0,0 +1,66 @@
+//! Implements `PartialEq` for vector types.
+
+macro_rules! impl_cmp_partial_eq {
+    (
+        [$elem_ty:ident; $elem_count:expr]:
+        $id:ident | $test_tt:tt |
+        ($true:expr, $false:expr)
+    ) => {
+        // FIXME: https://github.com/rust-lang-nursery/rust-clippy/issues/2892
+        #[cfg_attr(feature = "cargo-clippy", allow(clippy::partialeq_ne_impl))]
+        impl crate::cmp::PartialEq<$id> for $id {
+            #[inline]
+            fn eq(&self, other: &Self) -> bool {
+                $id::eq(*self, *other).all()
+            }
+            #[inline]
+            fn ne(&self, other: &Self) -> bool {
+                $id::ne(*self, *other).any()
+            }
+        }
+
+        // FIXME: https://github.com/rust-lang-nursery/rust-clippy/issues/2892
+        #[cfg_attr(feature = "cargo-clippy", allow(clippy::partialeq_ne_impl))]
+        impl crate::cmp::PartialEq<LexicographicallyOrdered<$id>>
+            for LexicographicallyOrdered<$id>
+        {
+            #[inline]
+            fn eq(&self, other: &Self) -> bool {
+                self.0 == other.0
+            }
+            #[inline]
+            fn ne(&self, other: &Self) -> bool {
+                self.0 != other.0
+            }
+        }
+
+        test_if!{
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _cmp_PartialEq>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn partial_eq() {
+                        let a = $id::splat($false);
+                        let b = $id::splat($true);
+
+                        assert!(a != b);
+                        assert!(!(a == b));
+                        assert!(a == a);
+                        assert!(!(a != a));
+
+                        if $id::lanes() > 1 {
+                            let a = $id::splat($false).replace(0, $true);
+                            let b = $id::splat($true);
+
+                            assert!(a != b);
+                            assert!(!(a == b));
+                            assert!(a == a);
+                            assert!(!(a != a));
+                        }
+                    }
+                }
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/cmp/partial_ord.rs
@@ -0,0 +1,234 @@
+//! Implements `PartialOrd` for vector types.
+//!
+//! This implements a lexicographical order.
+
+macro_rules! impl_cmp_partial_ord {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident | $test_tt:tt) => {
+        impl $id {
+            /// Returns a wrapper that implements `PartialOrd`.
+            #[inline]
+            pub fn partial_lex_ord(&self) -> LexicographicallyOrdered<$id> {
+                LexicographicallyOrdered(*self)
+            }
+        }
+
+        impl crate::cmp::PartialOrd<LexicographicallyOrdered<$id>>
+            for LexicographicallyOrdered<$id>
+        {
+            #[inline]
+            fn partial_cmp(
+                &self, other: &Self,
+            ) -> Option<crate::cmp::Ordering> {
+                if PartialEq::eq(self, other) {
+                    Some(crate::cmp::Ordering::Equal)
+                } else if PartialOrd::lt(self, other) {
+                    Some(crate::cmp::Ordering::Less)
+                } else if PartialOrd::gt(self, other) {
+                    Some(crate::cmp::Ordering::Greater)
+                } else {
+                    None
+                }
+            }
+            #[inline]
+            fn lt(&self, other: &Self) -> bool {
+                let m_lt = self.0.lt(other.0);
+                let m_eq = self.0.eq(other.0);
+                for i in 0..$id::lanes() {
+                    if m_eq.extract(i) {
+                        continue;
+                    }
+                    return m_lt.extract(i);
+                }
+                false
+            }
+            #[inline]
+            fn le(&self, other: &Self) -> bool {
+                self.lt(other) | PartialEq::eq(self, other)
+            }
+            #[inline]
+            fn ge(&self, other: &Self) -> bool {
+                self.gt(other) | PartialEq::eq(self, other)
+            }
+            #[inline]
+            fn gt(&self, other: &Self) -> bool {
+                let m_gt = self.0.gt(other.0);
+                let m_eq = self.0.eq(other.0);
+                for i in 0..$id::lanes() {
+                    if m_eq.extract(i) {
+                        continue;
+                    }
+                    return m_gt.extract(i);
+                }
+                false
+            }
+        }
+    };
+}
+
+macro_rules! test_cmp_partial_ord_int {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident | $test_tt:tt) => {
+        test_if!{
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _cmp_PartialOrd>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn partial_lex_ord() {
+                        use crate::testing::utils::{test_cmp};
+                        // constant values
+                        let a = $id::splat(0);
+                        let b = $id::splat(1);
+
+                        test_cmp(a.partial_lex_ord(), b.partial_lex_ord(),
+                                 Some(crate::cmp::Ordering::Less));
+                        test_cmp(b.partial_lex_ord(), a.partial_lex_ord(),
+                                 Some(crate::cmp::Ordering::Greater));
+                        test_cmp(a.partial_lex_ord(), a.partial_lex_ord(),
+                                 Some(crate::cmp::Ordering::Equal));
+                        test_cmp(b.partial_lex_ord(), b.partial_lex_ord(),
+                                 Some(crate::cmp::Ordering::Equal));
+
+                        // variable values: a = [0, 1, 2, 3]; b = [3, 2, 1, 0]
+                        let mut a = $id::splat(0);
+                        let mut b = $id::splat(0);
+                        for i in 0..$id::lanes() {
+                            a = a.replace(i, i as $elem_ty);
+                            b = b.replace(i, ($id::lanes() - i) as $elem_ty);
+                        }
+                        test_cmp(a.partial_lex_ord(), b.partial_lex_ord(),
+                                 Some(crate::cmp::Ordering::Less));
+                        test_cmp(b.partial_lex_ord(), a.partial_lex_ord(),
+                                 Some(crate::cmp::Ordering::Greater));
+                        test_cmp(a.partial_lex_ord(), a.partial_lex_ord(),
+                                 Some(crate::cmp::Ordering::Equal));
+                        test_cmp(b.partial_lex_ord(), b.partial_lex_ord(),
+                                 Some(crate::cmp::Ordering::Equal));
+
+                        // variable values: a = [0, 1, 2, 3]; b = [0, 1, 2, 4]
+                        let mut b = a;
+                        b = b.replace(
+                            $id::lanes() - 1,
+                            a.extract($id::lanes() - 1) + 1 as $elem_ty
+                        );
+                        test_cmp(a.partial_lex_ord(), b.partial_lex_ord(),
+                                 Some(crate::cmp::Ordering::Less));
+                        test_cmp(b.partial_lex_ord(), a.partial_lex_ord(),
+                                 Some(crate::cmp::Ordering::Greater));
+                        test_cmp(a.partial_lex_ord(), a.partial_lex_ord(),
+                                 Some(crate::cmp::Ordering::Equal));
+                        test_cmp(b.partial_lex_ord(), b.partial_lex_ord(),
+                                 Some(crate::cmp::Ordering::Equal));
+
+                        if $id::lanes() > 2 {
+                            // variable values a = [0, 1, 0, 0]; b = [0, 1, 2, 3]
+                            let b = a;
+                            let mut a = $id::splat(0);
+                            a = a.replace(1, 1 as $elem_ty);
+                            test_cmp(a.partial_lex_ord(), b.partial_lex_ord(),
+                                     Some(crate::cmp::Ordering::Less));
+                            test_cmp(b.partial_lex_ord(), a.partial_lex_ord(),
+                                     Some(crate::cmp::Ordering::Greater));
+                            test_cmp(a.partial_lex_ord(), a.partial_lex_ord(),
+                                     Some(crate::cmp::Ordering::Equal));
+                            test_cmp(b.partial_lex_ord(), b.partial_lex_ord(),
+                                     Some(crate::cmp::Ordering::Equal));
+
+                            // variable values: a = [0, 1, 2, 3]; b = [0, 1, 3, 2]
+                            let mut b = a;
+                            b = b.replace(
+                                2, a.extract($id::lanes() - 1) + 1 as $elem_ty
+                            );
+                            test_cmp(a.partial_lex_ord(), b.partial_lex_ord(),
+                                     Some(crate::cmp::Ordering::Less));
+                            test_cmp(b.partial_lex_ord(), a.partial_lex_ord(),
+                                     Some(crate::cmp::Ordering::Greater));
+                            test_cmp(a.partial_lex_ord(), a.partial_lex_ord(),
+                                     Some(crate::cmp::Ordering::Equal));
+                            test_cmp(b.partial_lex_ord(), b.partial_lex_ord(),
+                                     Some(crate::cmp::Ordering::Equal));
+                        }
+                    }
+                }
+            }
+        }
+    };
+}
+
+macro_rules! test_cmp_partial_ord_mask {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident | $test_tt:tt) => {
+        test_if!{
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _cmp_PartialOrd>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn partial_lex_ord() {
+                        use crate::testing::utils::{test_cmp};
+                        use crate::cmp::Ordering;
+
+                        // constant values
+                        let a = $id::splat(false);
+                        let b = $id::splat(true);
+
+                        test_cmp(a.partial_lex_ord(), b.partial_lex_ord(),
+                                 Some(Ordering::Less));
+                        test_cmp(b.partial_lex_ord(), a.partial_lex_ord(),
+                                 Some(Ordering::Greater));
+                        test_cmp(a.partial_lex_ord(), a.partial_lex_ord(),
+                                 Some(Ordering::Equal));
+                        test_cmp(b.partial_lex_ord(), b.partial_lex_ord(),
+                                 Some(Ordering::Equal));
+
+                        // variable values:
+                        // a = [false, false, false, false];
+                        // b = [false, false, false, true]
+                        let a = $id::splat(false);
+                        let mut b = $id::splat(false);
+                        b = b.replace($id::lanes() - 1, true);
+                        test_cmp(a.partial_lex_ord(), b.partial_lex_ord(),
+                                 Some(Ordering::Less));
+                        test_cmp(b.partial_lex_ord(), a.partial_lex_ord(),
+                                 Some(Ordering::Greater));
+                        test_cmp(a.partial_lex_ord(), a.partial_lex_ord(),
+                                 Some(Ordering::Equal));
+                        test_cmp(b.partial_lex_ord(), b.partial_lex_ord(),
+                                 Some(Ordering::Equal));
+
+                        // variable values:
+                        // a = [true, true, true, false];
+                        // b = [true, true, true, true]
+                        let mut a = $id::splat(true);
+                        let b = $id::splat(true);
+                        a = a.replace($id::lanes() - 1, false);
+                        test_cmp(a.partial_lex_ord(), b.partial_lex_ord(),
+                                 Some(Ordering::Less));
+                        test_cmp(b.partial_lex_ord(), a.partial_lex_ord(),
+                                 Some(Ordering::Greater));
+                        test_cmp(a.partial_lex_ord(), a.partial_lex_ord(),
+                                 Some(Ordering::Equal));
+                        test_cmp(b.partial_lex_ord(), b.partial_lex_ord(),
+                                 Some(Ordering::Equal));
+
+                        if $id::lanes() > 2 {
+                            // variable values
+                            // a = [false, true, false, false];
+                            // b = [false, true, true, true]
+                            let mut a = $id::splat(false);
+                            let mut b = $id::splat(true);
+                            a = a.replace(1, true);
+                            b = b.replace(0, false);
+                            test_cmp(a.partial_lex_ord(), b.partial_lex_ord(),
+                                     Some(Ordering::Less));
+                            test_cmp(b.partial_lex_ord(), a.partial_lex_ord(),
+                                     Some(Ordering::Greater));
+                            test_cmp(a.partial_lex_ord(), a.partial_lex_ord(),
+                                     Some(Ordering::Equal));
+                            test_cmp(b.partial_lex_ord(), b.partial_lex_ord(),
+                                     Some(Ordering::Equal));
+                        }
+                    }
+                }
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/cmp/vertical.rs
@@ -0,0 +1,114 @@
+//! Vertical (lane-wise) vector comparisons returning vector masks.
+
+macro_rules! impl_cmp_vertical {
+    (
+        [$elem_ty:ident; $elem_count:expr]:
+        $id:ident,
+        $mask_ty:ident,
+        $is_mask:expr,($true:expr, $false:expr) | $test_tt:tt
+    ) => {
+        impl $id {
+            /// Lane-wise equality comparison.
+            #[inline]
+            pub fn eq(self, other: Self) -> $mask_ty {
+                use crate::llvm::simd_eq;
+                Simd(unsafe { simd_eq(self.0, other.0) })
+            }
+
+            /// Lane-wise inequality comparison.
+            #[inline]
+            pub fn ne(self, other: Self) -> $mask_ty {
+                use crate::llvm::simd_ne;
+                Simd(unsafe { simd_ne(self.0, other.0) })
+            }
+
+            /// Lane-wise less-than comparison.
+            #[inline]
+            pub fn lt(self, other: Self) -> $mask_ty {
+                use crate::llvm::{simd_gt, simd_lt};
+                if $is_mask {
+                    Simd(unsafe { simd_gt(self.0, other.0) })
+                } else {
+                    Simd(unsafe { simd_lt(self.0, other.0) })
+                }
+            }
+
+            /// Lane-wise less-than-or-equals comparison.
+            #[inline]
+            pub fn le(self, other: Self) -> $mask_ty {
+                use crate::llvm::{simd_ge, simd_le};
+                if $is_mask {
+                    Simd(unsafe { simd_ge(self.0, other.0) })
+                } else {
+                    Simd(unsafe { simd_le(self.0, other.0) })
+                }
+            }
+
+            /// Lane-wise greater-than comparison.
+            #[inline]
+            pub fn gt(self, other: Self) -> $mask_ty {
+                use crate::llvm::{simd_gt, simd_lt};
+                if $is_mask {
+                    Simd(unsafe { simd_lt(self.0, other.0) })
+                } else {
+                    Simd(unsafe { simd_gt(self.0, other.0) })
+                }
+            }
+
+            /// Lane-wise greater-than-or-equals comparison.
+            #[inline]
+            pub fn ge(self, other: Self) -> $mask_ty {
+                use crate::llvm::{simd_ge, simd_le};
+                if $is_mask {
+                    Simd(unsafe { simd_le(self.0, other.0) })
+                } else {
+                    Simd(unsafe { simd_ge(self.0, other.0) })
+                }
+            }
+        }
+        test_if!{
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _cmp_vertical>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn cmp() {
+                        let a = $id::splat($false);
+                        let b = $id::splat($true);
+
+                        let r = a.lt(b);
+                        let e = $mask_ty::splat(true);
+                        assert!(r == e);
+                        let r = a.le(b);
+                        assert!(r == e);
+
+                        let e = $mask_ty::splat(false);
+                        let r = a.gt(b);
+                        assert!(r == e);
+                        let r = a.ge(b);
+                        assert!(r == e);
+                        let r = a.eq(b);
+                        assert!(r == e);
+
+                        let mut a = a;
+                        let mut b = b;
+                        let mut e = e;
+                        for i in 0..$id::lanes() {
+                            if i % 2 == 0 {
+                                a = a.replace(i, $false);
+                                b = b.replace(i, $true);
+                                e = e.replace(i, true);
+                            } else {
+                                a = a.replace(i, $true);
+                                b = b.replace(i, $false);
+                                e = e.replace(i, false);
+                            }
+                        }
+                        let r = a.lt(b);
+                        assert!(r == e);
+                    }
+                }
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/default.rs
@@ -0,0 +1,28 @@
+//! Implements `Default` for vector types.
+
+macro_rules! impl_default {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident | $test_tt:tt) => {
+        impl Default for $id {
+            #[inline]
+            fn default() -> Self {
+                Self::splat($elem_ty::default())
+            }
+        }
+
+        test_if!{
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _default>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn default() {
+                        let a = $id::default();
+                        for i in 0..$id::lanes() {
+                            assert_eq!(a.extract(i), $elem_ty::default());
+                        }
+                    }
+                }
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/fmt.rs
@@ -0,0 +1,12 @@
+//! Implements formatting APIs
+
+#[macro_use]
+mod debug;
+#[macro_use]
+mod lower_hex;
+#[macro_use]
+mod upper_hex;
+#[macro_use]
+mod octal;
+#[macro_use]
+mod binary;
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/fmt/binary.rs
@@ -0,0 +1,56 @@
+//! Implement Octal formatting
+
+macro_rules! impl_fmt_binary {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident | $test_tt:tt) => {
+        impl crate::fmt::Binary for $id {
+            #[cfg_attr(
+                feature = "cargo-clippy", allow(clippy::missing_inline_in_public_items)
+            )]
+            fn fmt(&self, f: &mut crate::fmt::Formatter<'_>)
+                   -> crate::fmt::Result {
+                write!(f, "{}(", stringify!($id))?;
+                for i in 0..$elem_count {
+                    if i > 0 {
+                        write!(f, ", ")?;
+                    }
+                    self.extract(i).fmt(f)?;
+                }
+                write!(f, ")")
+            }
+        }
+        test_if!{
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _fmt_binary>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn binary() {
+                        use arrayvec::{ArrayString,ArrayVec};
+                        type TinyString = ArrayString<[u8; 512]>;
+
+                        use crate::fmt::Write;
+                        let v = $id::splat($elem_ty::default());
+                        let mut s = TinyString::new();
+                        write!(&mut s, "{:#b}", v).unwrap();
+
+                        let mut beg = TinyString::new();
+                        write!(&mut beg, "{}(", stringify!($id)).unwrap();
+                        assert!(s.starts_with(beg.as_str()));
+                        assert!(s.ends_with(")"));
+                        let s: ArrayVec<[TinyString; 64]>
+                            = s.replace(beg.as_str(), "")
+                            .replace(")", "").split(",")
+                            .map(|v| TinyString::from(v.trim()).unwrap())
+                            .collect();
+                        assert_eq!(s.len(), $id::lanes());
+                        for (index, ss) in s.into_iter().enumerate() {
+                            let mut e = TinyString::new();
+                            write!(&mut e, "{:#b}", v.extract(index)).unwrap();
+                            assert_eq!(ss, e);
+                        }
+                    }
+                }
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/fmt/debug.rs
@@ -0,0 +1,64 @@
+//! Implement debug formatting
+
+macro_rules! impl_fmt_debug_tests {
+    ([$elem_ty:ty; $elem_count:expr]: $id:ident | $test_tt:tt) => {
+        test_if!{
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _fmt_debug>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn debug() {
+                        use arrayvec::{ArrayString,ArrayVec};
+                        type TinyString = ArrayString<[u8; 512]>;
+
+                        use crate::fmt::Write;
+                        let v = $id::default();
+                        let mut s = TinyString::new();
+                        write!(&mut s, "{:?}", v).unwrap();
+
+                        let mut beg = TinyString::new();
+                        write!(&mut beg, "{}(", stringify!($id)).unwrap();
+                        assert!(s.starts_with(beg.as_str()));
+                        assert!(s.ends_with(")"));
+                        let s: ArrayVec<[TinyString; 64]>
+                            = s.replace(beg.as_str(), "")
+                            .replace(")", "").split(",")
+                            .map(|v| TinyString::from(v.trim()).unwrap())
+                            .collect();
+                        assert_eq!(s.len(), $id::lanes());
+                        for (index, ss) in s.into_iter().enumerate() {
+                            let mut e = TinyString::new();
+                            write!(&mut e, "{:?}", v.extract(index)).unwrap();
+                            assert_eq!(ss, e);
+                        }
+                    }
+                }
+            }
+        }
+    };
+}
+
+macro_rules! impl_fmt_debug {
+    ([$elem_ty:ty; $elem_count:expr]: $id:ident | $test_tt:tt) => {
+        impl crate::fmt::Debug for $id {
+            #[cfg_attr(
+                feature = "cargo-clippy",
+                allow(clippy::missing_inline_in_public_items)
+            )]
+            fn fmt(
+                &self, f: &mut crate::fmt::Formatter<'_>,
+            ) -> crate::fmt::Result {
+                write!(f, "{}(", stringify!($id))?;
+                for i in 0..$elem_count {
+                    if i > 0 {
+                        write!(f, ", ")?;
+                    }
+                    self.extract(i).fmt(f)?;
+                }
+                write!(f, ")")
+            }
+        }
+        impl_fmt_debug_tests!([$elem_ty; $elem_count]: $id | $test_tt);
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/fmt/lower_hex.rs
@@ -0,0 +1,56 @@
+//! Implement `LowerHex` formatting
+
+macro_rules! impl_fmt_lower_hex {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident | $test_tt:tt) => {
+        impl crate::fmt::LowerHex for $id {
+            #[cfg_attr(
+                feature = "cargo-clippy", allow(clippy::missing_inline_in_public_items)
+            )]
+            fn fmt(&self, f: &mut crate::fmt::Formatter<'_>)
+                   -> crate::fmt::Result {
+                write!(f, "{}(", stringify!($id))?;
+                for i in 0..$elem_count {
+                    if i > 0 {
+                        write!(f, ", ")?;
+                    }
+                    self.extract(i).fmt(f)?;
+                }
+                write!(f, ")")
+            }
+        }
+        test_if!{
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _fmt_lower_hex>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn lower_hex() {
+                        use arrayvec::{ArrayString,ArrayVec};
+                        type TinyString = ArrayString<[u8; 512]>;
+
+                        use crate::fmt::Write;
+                        let v = $id::splat($elem_ty::default());
+                        let mut s = TinyString::new();
+                        write!(&mut s, "{:#x}", v).unwrap();
+
+                        let mut beg = TinyString::new();
+                        write!(&mut beg, "{}(", stringify!($id)).unwrap();
+                        assert!(s.starts_with(beg.as_str()));
+                        assert!(s.ends_with(")"));
+                        let s: ArrayVec<[TinyString; 64]>
+                            = s.replace(beg.as_str(), "").replace(")", "")
+                            .split(",")
+                            .map(|v| TinyString::from(v.trim()).unwrap())
+                            .collect();
+                        assert_eq!(s.len(), $id::lanes());
+                        for (index, ss) in s.into_iter().enumerate() {
+                            let mut e = TinyString::new();
+                            write!(&mut e, "{:#x}", v.extract(index)).unwrap();
+                        assert_eq!(ss, e);
+                        }
+                    }
+                }
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/fmt/octal.rs
@@ -0,0 +1,56 @@
+//! Implement Octal formatting
+
+macro_rules! impl_fmt_octal {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident | $test_tt:tt) => {
+        impl crate::fmt::Octal for $id {
+            #[cfg_attr(
+                feature = "cargo-clippy", allow(clippy::missing_inline_in_public_items)
+            )]
+            fn fmt(&self, f: &mut crate::fmt::Formatter<'_>)
+                   -> crate::fmt::Result {
+                write!(f, "{}(", stringify!($id))?;
+                for i in 0..$elem_count {
+                    if i > 0 {
+                        write!(f, ", ")?;
+                    }
+                    self.extract(i).fmt(f)?;
+                }
+                write!(f, ")")
+            }
+        }
+        test_if!{
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _fmt_octal>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn octal_hex() {
+                        use arrayvec::{ArrayString,ArrayVec};
+                        type TinyString = ArrayString<[u8; 512]>;
+
+                        use crate::fmt::Write;
+                        let v = $id::splat($elem_ty::default());
+                        let mut s = TinyString::new();
+                        write!(&mut s, "{:#o}", v).unwrap();
+
+                        let mut beg = TinyString::new();
+                        write!(&mut beg, "{}(", stringify!($id)).unwrap();
+                        assert!(s.starts_with(beg.as_str()));
+                        assert!(s.ends_with(")"));
+                        let s: ArrayVec<[TinyString; 64]>
+                            = s.replace(beg.as_str(), "").replace(")", "")
+                            .split(",")
+                            .map(|v| TinyString::from(v.trim()).unwrap())
+                            .collect();
+                        assert_eq!(s.len(), $id::lanes());
+                        for (index, ss) in s.into_iter().enumerate() {
+                            let mut e = TinyString::new();
+                            write!(&mut e, "{:#o}", v.extract(index)).unwrap();
+                            assert_eq!(ss, e);
+                        }
+                    }
+                }
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/fmt/upper_hex.rs
@@ -0,0 +1,56 @@
+//! Implement `UpperHex` formatting
+
+macro_rules! impl_fmt_upper_hex {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident | $test_tt:tt) => {
+        impl crate::fmt::UpperHex for $id {
+            #[cfg_attr(
+                feature = "cargo-clippy", allow(clippy::missing_inline_in_public_items)
+            )]
+            fn fmt(&self, f: &mut crate::fmt::Formatter<'_>)
+                   -> crate::fmt::Result {
+                write!(f, "{}(", stringify!($id))?;
+                for i in 0..$elem_count {
+                    if i > 0 {
+                        write!(f, ", ")?;
+                    }
+                    self.extract(i).fmt(f)?;
+                }
+                write!(f, ")")
+            }
+        }
+        test_if!{
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _fmt_upper_hex>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn upper_hex() {
+                        use arrayvec::{ArrayString,ArrayVec};
+                        type TinyString = ArrayString<[u8; 512]>;
+
+                        use crate::fmt::Write;
+                        let v = $id::splat($elem_ty::default());
+                        let mut s = TinyString::new();
+                        write!(&mut s, "{:#X}", v).unwrap();
+
+                        let mut beg = TinyString::new();
+                        write!(&mut beg, "{}(", stringify!($id)).unwrap();
+                        assert!(s.starts_with(beg.as_str()));
+                        assert!(s.ends_with(")"));
+                        let s: ArrayVec<[TinyString; 64]>
+                            = s.replace(beg.as_str(), "").replace(")", "")
+                            .split(",")
+                            .map(|v| TinyString::from(v.trim()).unwrap())
+                            .collect();
+                        assert_eq!(s.len(), $id::lanes());
+                        for (index, ss) in s.into_iter().enumerate() {
+                            let mut e = TinyString::new();
+                            write!(&mut e, "{:#X}", v.extract(index)).unwrap();
+                            assert_eq!(ss, e);
+                        }
+                    }
+                }
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/from.rs
@@ -0,0 +1,7 @@
+//! Implementations of the `From` and `Into` traits
+
+#[macro_use]
+mod from_array;
+
+#[macro_use]
+mod from_vector;
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/from/from_array.rs
@@ -0,0 +1,121 @@
+//! Implements `From<[T; N]>` and `Into<[T; N]>` for vector types.
+
+macro_rules! impl_from_array {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident | $test_tt:tt
+     | ($non_default_array:expr, $non_default_vec:expr)) => {
+        impl From<[$elem_ty; $elem_count]> for $id {
+            #[inline]
+            fn from(array: [$elem_ty; $elem_count]) -> Self {
+                union U {
+                    array: [$elem_ty; $elem_count],
+                    vec: $id,
+                }
+                unsafe { U { array }.vec }
+            }
+        }
+
+        impl From<$id> for [$elem_ty; $elem_count] {
+            #[inline]
+            fn from(vec: $id) -> Self {
+                union U {
+                    array: [$elem_ty; $elem_count],
+                    vec: $id,
+                }
+                unsafe { U { vec }.array }
+            }
+        }
+
+        // FIXME: `Into::into` is not inline, but due to
+        // the blanket impl in `std`, which is not
+        // marked `default`, we cannot override it here with
+        // specialization.
+        /*
+        impl Into<[$elem_ty; $elem_count]> for $id {
+            #[inline]
+            fn into(self) -> [$elem_ty; $elem_count] {
+                union U {
+                    array: [$elem_ty; $elem_count],
+                    vec: $id,
+                }
+                unsafe { U { vec: self }.array }
+            }
+        }
+
+        impl Into<$id> for [$elem_ty; $elem_count] {
+            #[inline]
+            fn into(self) -> $id {
+                union U {
+                    array: [$elem_ty; $elem_count],
+                    vec: $id,
+                }
+                unsafe { U { array: self }.vec }
+            }
+        }
+        */
+
+        test_if! {
+            $test_tt:
+            paste::item! {
+                mod [<$id _from>] {
+                    use super::*;
+                    #[test]
+                    fn array() {
+                        let vec: $id = Default::default();
+
+                        // FIXME: Workaround for arrays with more than 32
+                        // elements.
+                        //
+                        // Safe because we never take a reference to any
+                        // uninitialized element.
+                        union W {
+                            array: [$elem_ty; $elem_count],
+                            other: ()
+                        }
+                        let mut array = W { other: () };
+                        for i in 0..$elem_count {
+                            let default: $elem_ty = Default::default();
+                            // note: array.other is the active member and
+                            // initialized so we can take a reference to it:
+                            let p = unsafe {
+                                &mut array.other as *mut () as *mut $elem_ty
+                            };
+                            // note: default is a valid bit-pattern for
+                            // $elem_ty:
+                            unsafe {
+                                crate::ptr::write(p.wrapping_add(i), default)
+                            };
+                        }
+                        // note: the array variant of the union is properly
+                        // initialized:
+                        let mut array = unsafe {
+                            array.array
+                        };
+
+                        array[0] = $non_default_array;
+                        let vec = vec.replace(0, $non_default_vec);
+
+                        let vec_from_array = $id::from(array);
+                        assert_eq!(vec_from_array, vec);
+                        let array_from_vec
+                            = <[$elem_ty; $elem_count]>::from(vec);
+                        // FIXME: Workaround for arrays with more than 32
+                        // elements.
+                        for i in 0..$elem_count {
+                            assert_eq!(array_from_vec[i], array[i]);
+                        }
+
+                        let vec_from_into_array: $id = array.into();
+                        assert_eq!(vec_from_into_array, vec);
+                        let array_from_into_vec: [$elem_ty; $elem_count]
+                            = vec.into();
+                        // FIXME: Workaround for arrays with more than 32
+                        // elements.
+                        for i in 0..$elem_count {
+                            assert_eq!(array_from_into_vec[i], array[i]);
+                        }
+                    }
+                }
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/from/from_vector.rs
@@ -0,0 +1,67 @@
+//! Implements `From` and `Into` for vector types.
+
+macro_rules! impl_from_vector {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident | $test_tt:tt
+     | $source:ident) => {
+        impl From<$source> for $id {
+            #[inline]
+            fn from(source: $source) -> Self {
+                fn static_assert_same_number_of_lanes<T, U>()
+                where
+                    T: crate::sealed::Simd,
+                    U: crate::sealed::Simd<LanesType = T::LanesType>,
+                {
+                }
+                use crate::llvm::simd_cast;
+                static_assert_same_number_of_lanes::<$id, $source>();
+                Simd(unsafe { simd_cast(source.0) })
+            }
+        }
+
+        // FIXME: `Into::into` is not inline, but due to the blanket impl in
+        // `std`, which is not marked `default`, we cannot override it here
+        // with specialization.
+
+        /*
+           impl Into<$id> for $source {
+               #[inline]
+               fn into(self) -> $id {
+                   unsafe { simd_cast(self) }
+               }
+           }
+        */
+
+        test_if! {
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _from_ $source>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)]
+                    #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn from() {
+                        assert_eq!($id::lanes(), $source::lanes());
+                        let source: $source = Default::default();
+                        let vec: $id = Default::default();
+
+                        let e = $id::from(source);
+                        assert_eq!(e, vec);
+
+                        let e: $id = source.into();
+                        assert_eq!(e, vec);
+                    }
+                }
+            }
+        }
+    };
+}
+
+macro_rules! impl_from_vectors {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident | $test_tt:tt
+     | $($source:ident),*) => {
+        $(
+            impl_from_vector!(
+                [$elem_ty; $elem_count]: $id | $test_tt | $source
+            );
+        )*
+    }
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/hash.rs
@@ -0,0 +1,47 @@
+//! Implements `Hash` for vector types.
+
+macro_rules! impl_hash {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident | $test_tt:tt) => {
+        impl crate::hash::Hash for $id {
+            #[inline]
+            fn hash<H: crate::hash::Hasher>(&self, state: &mut H) {
+                unsafe {
+                    union A {
+                        data: [$elem_ty; $id::lanes()],
+                        vec: $id,
+                    }
+                    A { vec: *self }.data.hash(state)
+                }
+            }
+        }
+
+        test_if! {
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _hash>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn hash() {
+                        use crate::hash::{Hash, Hasher};
+                        #[allow(deprecated)]
+                        use crate::hash::{SipHasher13};
+                        type A = [$elem_ty; $id::lanes()];
+                        let a: A = [42 as $elem_ty; $id::lanes()];
+                        assert_eq!(
+                            crate::mem::size_of::<A>(),
+                            crate::mem::size_of::<$id>()
+                        );
+                        #[allow(deprecated)]
+                        let mut a_hash = SipHasher13::new();
+                        let mut v_hash = a_hash.clone();
+                        a.hash(&mut a_hash);
+
+                        let v = $id::splat(42 as $elem_ty);
+                        v.hash(&mut v_hash);
+                        assert_eq!(a_hash.finish(), v_hash.finish());
+                    }
+                }
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/into_bits.rs
@@ -0,0 +1,59 @@
+//! Implementation of `FromBits` and `IntoBits`.
+
+/// Safe lossless bitwise conversion from `T` to `Self`.
+pub trait FromBits<T>: crate::marker::Sized {
+    /// Safe lossless bitwise transmute from `T` to `Self`.
+    fn from_bits(t: T) -> Self;
+}
+
+/// Safe lossless bitwise conversion from `Self` to `T`.
+pub trait IntoBits<T>: crate::marker::Sized {
+    /// Safe lossless bitwise transmute from `self` to `T`.
+    fn into_bits(self) -> T;
+}
+
+/// `FromBits` implies `IntoBits`.
+impl<T, U> IntoBits<U> for T
+where
+    U: FromBits<T>,
+{
+    #[inline]
+    fn into_bits(self) -> U {
+        debug_assert!(
+            crate::mem::size_of::<Self>() == crate::mem::size_of::<U>()
+        );
+        U::from_bits(self)
+    }
+}
+
+/// `FromBits` and `IntoBits` are reflexive
+impl<T> FromBits<T> for T {
+    #[inline]
+    fn from_bits(t: Self) -> Self {
+        t
+    }
+}
+
+#[macro_use]
+mod macros;
+
+mod v16;
+pub use self::v16::*;
+
+mod v32;
+pub use self::v32::*;
+
+mod v64;
+pub use self::v64::*;
+
+mod v128;
+pub use self::v128::*;
+
+mod v256;
+pub use self::v256::*;
+
+mod v512;
+pub use self::v512::*;
+
+mod arch_specific;
+pub use self::arch_specific::*;
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/into_bits/arch_specific.rs
@@ -0,0 +1,190 @@
+//! `FromBits` and `IntoBits` between portable vector types and the
+//! architecture-specific vector types.
+#![rustfmt::skip]
+
+// FIXME: MIPS FromBits/IntoBits
+
+#[allow(unused)]
+use crate::*;
+
+/// This macro implements FromBits for the portable and the architecture
+/// specific vector types.
+///
+/// The "leaf" case is at the bottom, and the most generic case is at the top.
+/// The generic case is split into smaller cases recursively.
+macro_rules! impl_arch {
+    ([$arch_head_i:ident[$arch_head_tt:tt]: $($arch_head_ty:ident),*],
+     $([$arch_tail_i:ident[$arch_tail_tt:tt]: $($arch_tail_ty:ident),*]),* |
+     from: $($from_ty:ident),* | into: $($into_ty:ident),* |
+     test: $test_tt:tt) => {
+        impl_arch!(
+            [$arch_head_i[$arch_head_tt]: $($arch_head_ty),*] |
+            from: $($from_ty),* |
+            into: $($into_ty),* |
+            test: $test_tt
+        );
+        impl_arch!(
+            $([$arch_tail_i[$arch_tail_tt]: $($arch_tail_ty),*]),* |
+            from: $($from_ty),* |
+            into: $($into_ty),* |
+            test: $test_tt
+        );
+    };
+    ([$arch:ident[$arch_tt:tt]: $($arch_ty:ident),*] |
+     from: $($from_ty:ident),* | into: $($into_ty:ident),* |
+     test: $test_tt:tt) => {
+        // note: if target is "arm", "+v7,+neon" must be enabled
+        // and the std library must be recompiled with them
+        #[cfg(any(
+            not(target_arch = "arm"),
+            all(target_feature = "v7", target_feature = "neon",
+                any(feature = "core_arch", libcore_neon)))
+        )]
+        // note: if target is "powerpc", "altivec" must be enabled
+        // and the std library must be recompiled with it
+        #[cfg(any(
+            not(target_arch = "powerpc"),
+            all(target_feature = "altivec", feature = "core_arch"),
+        ))]
+        #[cfg(target_arch = $arch_tt)]
+        use crate::arch::$arch::{
+            $($arch_ty),*
+        };
+
+        #[cfg(any(
+            not(target_arch = "arm"),
+            all(target_feature = "v7", target_feature = "neon",
+                any(feature = "core_arch", libcore_neon)))
+        )]
+        #[cfg(any(
+            not(target_arch = "powerpc"),
+            all(target_feature = "altivec", feature = "core_arch"),
+        ))]
+        #[cfg(target_arch = $arch_tt)]
+        impl_arch!($($arch_ty),* | $($from_ty),* | $($into_ty),* |
+                   test: $test_tt);
+    };
+    ($arch_head:ident, $($arch_tail:ident),* | $($from_ty:ident),*
+     | $($into_ty:ident),* | test: $test_tt:tt) => {
+        impl_arch!($arch_head | $($from_ty),* | $($into_ty),* |
+                   test: $test_tt);
+        impl_arch!($($arch_tail),* | $($from_ty),* | $($into_ty),* |
+                   test: $test_tt);
+    };
+    ($arch_head:ident | $($from_ty:ident),* | $($into_ty:ident),* |
+     test: $test_tt:tt) => {
+        impl_from_bits!($arch_head[$test_tt]: $($from_ty),*);
+        impl_into_bits!($arch_head[$test_tt]: $($into_ty),*);
+    };
+}
+
+////////////////////////////////////////////////////////////////////////////////
+// Implementations for the 64-bit wide vector types:
+
+// FIXME: 64-bit single element types
+// FIXME: arm/aarch float16x4_t missing
+impl_arch!(
+    [x86["x86"]: __m64], [x86_64["x86_64"]: __m64],
+    [arm["arm"]: int8x8_t, uint8x8_t, poly8x8_t, int16x4_t, uint16x4_t,
+     poly16x4_t, int32x2_t, uint32x2_t, float32x2_t, int64x1_t,
+     uint64x1_t],
+    [aarch64["aarch64"]: int8x8_t, uint8x8_t, poly8x8_t, int16x4_t, uint16x4_t,
+     poly16x4_t, int32x2_t, uint32x2_t, float32x2_t, int64x1_t, uint64x1_t,
+     float64x1_t] |
+    from: i8x8, u8x8, m8x8, i16x4, u16x4, m16x4, i32x2, u32x2, f32x2, m32x2 |
+    into: i8x8, u8x8, i16x4, u16x4, i32x2, u32x2, f32x2 |
+    test: test_v64
+);
+
+////////////////////////////////////////////////////////////////////////////////
+// Implementations for the 128-bit wide vector types:
+
+// FIXME: arm/aarch float16x8_t missing
+// FIXME: ppc vector_pixel missing
+// FIXME: ppc64 vector_Float16 missing
+// FIXME: ppc64 vector_signed_long_long missing
+// FIXME: ppc64 vector_unsigned_long_long missing
+// FIXME: ppc64 vector_bool_long_long missing
+// FIXME: ppc64 vector_signed___int128 missing
+// FIXME: ppc64 vector_unsigned___int128 missing
+impl_arch!(
+    [x86["x86"]: __m128, __m128i, __m128d],
+    [x86_64["x86_64"]:  __m128, __m128i, __m128d],
+    [arm["arm"]: int8x16_t, uint8x16_t, poly8x16_t, int16x8_t, uint16x8_t,
+     poly16x8_t, int32x4_t, uint32x4_t, float32x4_t, int64x2_t, uint64x2_t],
+    [aarch64["aarch64"]: int8x16_t, uint8x16_t, poly8x16_t, int16x8_t,
+     uint16x8_t, poly16x8_t, int32x4_t, uint32x4_t, float32x4_t, int64x2_t,
+     uint64x2_t, float64x2_t],
+    [powerpc["powerpc"]: vector_signed_char, vector_unsigned_char,
+     vector_signed_short, vector_unsigned_short, vector_signed_int,
+     vector_unsigned_int, vector_float],
+    [powerpc64["powerpc64"]: vector_signed_char, vector_unsigned_char,
+     vector_signed_short, vector_unsigned_short, vector_signed_int,
+     vector_unsigned_int,  vector_float, vector_signed_long,
+     vector_unsigned_long, vector_double] |
+    from: i8x16, u8x16, m8x16, i16x8, u16x8, m16x8, i32x4, u32x4, f32x4, m32x4,
+    i64x2, u64x2, f64x2, m64x2, i128x1, u128x1, m128x1 |
+    into: i8x16, u8x16, i16x8, u16x8, i32x4, u32x4, f32x4, i64x2, u64x2, f64x2,
+    i128x1, u128x1 |
+    test: test_v128
+);
+
+impl_arch!(
+    [powerpc["powerpc"]: vector_bool_char],
+    [powerpc64["powerpc64"]: vector_bool_char] |
+    from: m8x16, m16x8, m32x4, m64x2, m128x1 |
+    into: i8x16, u8x16, i16x8, u16x8, i32x4, u32x4, f32x4,
+    i64x2, u64x2, f64x2, i128x1, u128x1,
+    // Masks:
+    m8x16 |
+    test: test_v128
+);
+
+impl_arch!(
+    [powerpc["powerpc"]: vector_bool_short],
+    [powerpc64["powerpc64"]: vector_bool_short] |
+    from: m16x8, m32x4, m64x2, m128x1 |
+    into: i8x16, u8x16, i16x8, u16x8, i32x4, u32x4, f32x4,
+    i64x2, u64x2, f64x2, i128x1, u128x1,
+    // Masks:
+    m8x16, m16x8 |
+    test: test_v128
+);
+
+impl_arch!(
+    [powerpc["powerpc"]: vector_bool_int],
+    [powerpc64["powerpc64"]: vector_bool_int] |
+    from: m32x4, m64x2, m128x1 |
+    into: i8x16, u8x16, i16x8, u16x8, i32x4, u32x4, f32x4,
+    i64x2, u64x2, f64x2, i128x1, u128x1,
+    // Masks:
+    m8x16, m16x8, m32x4 |
+    test: test_v128
+);
+
+impl_arch!(
+    [powerpc64["powerpc64"]: vector_bool_long] |
+    from: m64x2, m128x1 |
+    into: i8x16, u8x16, i16x8, u16x8, i32x4, u32x4, f32x4,
+    i64x2, u64x2, f64x2, i128x1, u128x1,
+    // Masks:
+    m8x16, m16x8, m32x4, m64x2 |
+    test: test_v128
+);
+
+////////////////////////////////////////////////////////////////////////////////
+// Implementations for the 256-bit wide vector types
+
+impl_arch!(
+    [x86["x86"]: __m256, __m256i, __m256d],
+    [x86_64["x86_64"]:  __m256, __m256i, __m256d] |
+    from: i8x32, u8x32, m8x32, i16x16, u16x16, m16x16,
+    i32x8, u32x8, f32x8, m32x8,
+    i64x4, u64x4, f64x4, m64x4, i128x2, u128x2, m128x2 |
+    into: i8x32, u8x32, i16x16, u16x16, i32x8, u32x8, f32x8,
+    i64x4, u64x4, f64x4, i128x2, u128x2 |
+    test: test_v256
+);
+
+////////////////////////////////////////////////////////////////////////////////
+// FIXME: Implementations for the 512-bit wide vector types
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/into_bits/macros.rs
@@ -0,0 +1,74 @@
+//! Macros implementing `FromBits`
+
+macro_rules! impl_from_bits_ {
+    ($id:ident[$test_tt:tt]: $from_ty:ident) => {
+        impl crate::api::into_bits::FromBits<$from_ty> for $id {
+            #[inline]
+            fn from_bits(x: $from_ty) -> Self {
+                unsafe { crate::mem::transmute(x) }
+            }
+        }
+
+        test_if! {
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _from_bits_ $from_ty>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)]
+                    #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn test() {
+                        use crate::{
+                            ptr::{read_unaligned},
+                            mem::{size_of, zeroed}
+                        };
+                        use crate::IntoBits;
+                        assert_eq!(size_of::<$id>(),
+                                   size_of::<$from_ty>());
+                        // This is safe becasue we never create a reference to
+                        // uninitialized memory:
+                        let a: $from_ty = unsafe { zeroed() };
+
+                        let b_0: $id = crate::FromBits::from_bits(a);
+                        let b_1: $id = a.into_bits();
+
+                        // Check that these are byte-wise equal, that is,
+                        // that the bit patterns are identical:
+                        for i in 0..size_of::<$id>() {
+                            // This is safe because we only read initialized
+                            // memory in bounds. Also, taking a reference to
+                            // `b_i` is ok because the fields are initialized.
+                            unsafe {
+                                let b_0_v: u8 = read_unaligned(
+                                    (&b_0 as *const $id as *const u8)
+                                        .wrapping_add(i)
+                                );
+                                let b_1_v: u8 = read_unaligned(
+                                    (&b_1 as *const $id as *const u8)
+                                        .wrapping_add(i)
+                                );
+                                assert_eq!(b_0_v, b_1_v);
+                            }
+                        }
+                    }
+                }
+            }
+        }
+    };
+}
+
+macro_rules! impl_from_bits {
+    ($id:ident[$test_tt:tt]: $($from_ty:ident),*) => {
+        $(
+            impl_from_bits_!($id[$test_tt]: $from_ty);
+        )*
+    }
+}
+
+#[allow(unused)]
+macro_rules! impl_into_bits {
+    ($id:ident[$test_tt:tt]: $($from_ty:ident),*) => {
+        $(
+            impl_from_bits_!($from_ty[$test_tt]: $id);
+        )*
+    }
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/into_bits/v128.rs
@@ -0,0 +1,28 @@
+//! `FromBits` and `IntoBits` implementations for portable 128-bit wide vectors
+#![rustfmt::skip]
+
+#[allow(unused)]  // wasm_bindgen_test
+use crate::*;
+
+impl_from_bits!(i8x16[test_v128]: u8x16, m8x16, i16x8, u16x8, m16x8, i32x4, u32x4, f32x4, m32x4, i64x2, u64x2, f64x2, m64x2, i128x1, u128x1, m128x1);
+impl_from_bits!(u8x16[test_v128]: i8x16, m8x16, i16x8, u16x8, m16x8, i32x4, u32x4, f32x4, m32x4, i64x2, u64x2, f64x2, m64x2, i128x1, u128x1, m128x1);
+impl_from_bits!(m8x16[test_v128]: m16x8, m32x4, m64x2, m128x1);
+
+impl_from_bits!(i16x8[test_v128]: i8x16, u8x16, m8x16, u16x8, m16x8, i32x4, u32x4, f32x4, m32x4, i64x2, u64x2, f64x2, m64x2, i128x1, u128x1, m128x1);
+impl_from_bits!(u16x8[test_v128]: i8x16, u8x16, m8x16, i16x8, m16x8, i32x4, u32x4, f32x4, m32x4, i64x2, u64x2, f64x2, m64x2, i128x1, u128x1, m128x1);
+impl_from_bits!(m16x8[test_v128]: m32x4, m64x2, m128x1);
+
+impl_from_bits!(i32x4[test_v128]: i8x16, u8x16, m8x16, i16x8, u16x8, m16x8, u32x4, f32x4, m32x4, i64x2, u64x2, f64x2, m64x2, i128x1, u128x1, m128x1);
+impl_from_bits!(u32x4[test_v128]: i8x16, u8x16, m8x16, i16x8, u16x8, m16x8, i32x4, f32x4, m32x4, i64x2, u64x2, f64x2, m64x2, i128x1, u128x1, m128x1);
+impl_from_bits!(f32x4[test_v128]: i8x16, u8x16, m8x16, i16x8, u16x8, m16x8, i32x4, u32x4, m32x4, i64x2, u64x2, f64x2, m64x2, i128x1, u128x1, m128x1);
+impl_from_bits!(m32x4[test_v128]: m64x2, m128x1);
+
+impl_from_bits!(i64x2[test_v128]: i8x16, u8x16, m8x16, i16x8, u16x8, m16x8, i32x4, u32x4, f32x4, m32x4, u64x2, f64x2, m64x2, i128x1, u128x1, m128x1);
+impl_from_bits!(u64x2[test_v128]: i8x16, u8x16, m8x16, i16x8, u16x8, m16x8, i32x4, u32x4, f32x4, m32x4, i64x2, f64x2, m64x2, i128x1, u128x1, m128x1);
+impl_from_bits!(f64x2[test_v128]: i8x16, u8x16, m8x16, i16x8, u16x8, m16x8, i32x4, u32x4, f32x4, m32x4, i64x2, u64x2, m64x2, i128x1, u128x1, m128x1);
+impl_from_bits!(m64x2[test_v128]: m128x1);
+
+impl_from_bits!(i128x1[test_v128]: i8x16, u8x16, m8x16, i16x8, u16x8, m16x8, i32x4, u32x4, f32x4, m32x4, i64x2, u64x2, f64x2, m64x2, u128x1, m128x1);
+impl_from_bits!(u128x1[test_v128]: i8x16, u8x16, m8x16, i16x8, u16x8, m16x8, i32x4, u32x4, f32x4, m32x4, i64x2, u64x2, f64x2, m64x2, i128x1, m128x1);
+// note: m128x1 cannot be constructed from all the other masks bit patterns in here
+
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/into_bits/v16.rs
@@ -0,0 +1,9 @@
+//! `FromBits` and `IntoBits` implementations for portable 16-bit wide vectors
+#![rustfmt::skip]
+
+#[allow(unused)]  // wasm_bindgen_test
+use crate::*;
+
+impl_from_bits!(i8x2[test_v16]: u8x2, m8x2);
+impl_from_bits!(u8x2[test_v16]: i8x2, m8x2);
+// note: m8x2 cannot be constructed from all i8x2 or u8x2 bit patterns
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/into_bits/v256.rs
@@ -0,0 +1,27 @@
+//! `FromBits` and `IntoBits` implementations for portable 256-bit wide vectors
+#![rustfmt::skip]
+
+#[allow(unused)]  // wasm_bindgen_test
+use crate::*;
+
+impl_from_bits!(i8x32[test_v256]: u8x32, m8x32, i16x16, u16x16, m16x16, i32x8, u32x8, f32x8, m32x8, i64x4, u64x4, f64x4, m64x4, i128x2, u128x2, m128x2);
+impl_from_bits!(u8x32[test_v256]: i8x32, m8x32, i16x16, u16x16, m16x16, i32x8, u32x8, f32x8, m32x8, i64x4, u64x4, f64x4, m64x4, i128x2, u128x2, m128x2);
+impl_from_bits!(m8x32[test_v256]: m16x16, m32x8, m64x4, m128x2);
+
+impl_from_bits!(i16x16[test_v256]: i8x32, u8x32, m8x32, u16x16, m16x16, i32x8, u32x8, f32x8, m32x8, i64x4, u64x4, f64x4, m64x4, i128x2, u128x2, m128x2);
+impl_from_bits!(u16x16[test_v256]: i8x32, u8x32, m8x32, i16x16, m16x16, i32x8, u32x8, f32x8, m32x8, i64x4, u64x4, f64x4, m64x4, i128x2, u128x2, m128x2);
+impl_from_bits!(m16x16[test_v256]: m32x8, m64x4, m128x2);
+
+impl_from_bits!(i32x8[test_v256]: i8x32, u8x32, m8x32, i16x16, u16x16, m16x16, u32x8, f32x8, m32x8, i64x4, u64x4, f64x4, m64x4, i128x2, u128x2, m128x2);
+impl_from_bits!(u32x8[test_v256]: i8x32, u8x32, m8x32, i16x16, u16x16, m16x16, i32x8, f32x8, m32x8, i64x4, u64x4, f64x4, m64x4, i128x2, u128x2, m128x2);
+impl_from_bits!(f32x8[test_v256]: i8x32, u8x32, m8x32, i16x16, u16x16, m16x16, i32x8, u32x8, m32x8, i64x4, u64x4, f64x4, m64x4, i128x2, u128x2, m128x2);
+impl_from_bits!(m32x8[test_v256]: m64x4, m128x2);
+
+impl_from_bits!(i64x4[test_v256]: i8x32, u8x32, m8x32, i16x16, u16x16, m16x16, i32x8, u32x8, f32x8, m32x8, u64x4, f64x4, m64x4, i128x2, u128x2, m128x2);
+impl_from_bits!(u64x4[test_v256]: i8x32, u8x32, m8x32, i16x16, u16x16, m16x16, i32x8, u32x8, f32x8, m32x8, i64x4, f64x4, m64x4, i128x2, u128x2, m128x2);
+impl_from_bits!(f64x4[test_v256]: i8x32, u8x32, m8x32, i16x16, u16x16, m16x16, i32x8, u32x8, f32x8, m32x8, i64x4, u64x4, m64x4, i128x2, u128x2, m128x2);
+impl_from_bits!(m64x4[test_v256]: m128x2);
+
+impl_from_bits!(i128x2[test_v256]: i8x32, u8x32, m8x32, i16x16, u16x16, m16x16, i32x8, u32x8, f32x8, m32x8, i64x4, u64x4, f64x4, m64x4, u128x2, m128x2);
+impl_from_bits!(u128x2[test_v256]: i8x32, u8x32, m8x32, i16x16, u16x16, m16x16, i32x8, u32x8, f32x8, m32x8, i64x4, u64x4, f64x4, m64x4, i128x2, m128x2);
+// note: m128x2 cannot be constructed from all the other masks bit patterns in here
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/into_bits/v32.rs
@@ -0,0 +1,13 @@
+//! `FromBits` and `IntoBits` implementations for portable 32-bit wide vectors
+#![rustfmt::skip]
+
+#[allow(unused)]  // wasm_bindgen_test
+use crate::*;
+
+impl_from_bits!(i8x4[test_v32]: u8x4, m8x4, i16x2, u16x2, m16x2);
+impl_from_bits!(u8x4[test_v32]: i8x4, m8x4, i16x2, u16x2, m16x2);
+impl_from_bits!(m8x4[test_v32]: m16x2);
+
+impl_from_bits!(i16x2[test_v32]: i8x4, u8x4, m8x4, u16x2, m16x2);
+impl_from_bits!(u16x2[test_v32]: i8x4, u8x4, m8x4, i16x2, m16x2);
+// note: m16x2 cannot be constructed from all m8x4 bit patterns
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/into_bits/v512.rs
@@ -0,0 +1,27 @@
+//! `FromBits` and `IntoBits` implementations for portable 512-bit wide vectors
+#![rustfmt::skip]
+
+#[allow(unused)]  // wasm_bindgen_test
+use crate::*;
+
+impl_from_bits!(i8x64[test_v512]: u8x64, m8x64, i16x32, u16x32, m16x32, i32x16, u32x16, f32x16, m32x16, i64x8, u64x8, f64x8, m64x8, i128x4, u128x4, m128x4);
+impl_from_bits!(u8x64[test_v512]: i8x64, m8x64, i16x32, u16x32, m16x32, i32x16, u32x16, f32x16, m32x16, i64x8, u64x8, f64x8, m64x8, i128x4, u128x4, m128x4);
+impl_from_bits!(m8x64[test_v512]: m16x32, m32x16, m64x8, m128x4);
+
+impl_from_bits!(i16x32[test_v512]: i8x64, u8x64, m8x64, u16x32, m16x32, i32x16, u32x16, f32x16, m32x16, i64x8, u64x8, f64x8, m64x8, i128x4, u128x4, m128x4);
+impl_from_bits!(u16x32[test_v512]: i8x64, u8x64, m8x64, i16x32, m16x32, i32x16, u32x16, f32x16, m32x16, i64x8, u64x8, f64x8, m64x8, i128x4, u128x4, m128x4);
+impl_from_bits!(m16x32[test_v512]: m32x16, m64x8, m128x4);
+
+impl_from_bits!(i32x16[test_v512]: i8x64, u8x64, m8x64, i16x32, u16x32, m16x32, u32x16, f32x16, m32x16, i64x8, u64x8, f64x8, m64x8, i128x4, u128x4, m128x4);
+impl_from_bits!(u32x16[test_v512]: i8x64, u8x64, m8x64, i16x32, u16x32, m16x32, i32x16, f32x16, m32x16, i64x8, u64x8, f64x8, m64x8, i128x4, u128x4, m128x4);
+impl_from_bits!(f32x16[test_v512]: i8x64, u8x64, m8x64, i16x32, u16x32, m16x32, i32x16, u32x16, m32x16, i64x8, u64x8, f64x8, m64x8, i128x4, u128x4, m128x4);
+impl_from_bits!(m32x16[test_v512]: m64x8, m128x4);
+
+impl_from_bits!(i64x8[test_v512]: i8x64, u8x64, m8x64, i16x32, u16x32, m16x32, i32x16, u32x16, f32x16, m32x16, u64x8, f64x8, m64x8, i128x4, u128x4, m128x4);
+impl_from_bits!(u64x8[test_v512]: i8x64, u8x64, m8x64, i16x32, u16x32, m16x32, i32x16, u32x16, f32x16, m32x16, i64x8, f64x8, m64x8, i128x4, u128x4, m128x4);
+impl_from_bits!(f64x8[test_v512]: i8x64, u8x64, m8x64, i16x32, u16x32, m16x32, i32x16, u32x16, f32x16, m32x16, i64x8, u64x8, m64x8, i128x4, u128x4, m128x4);
+impl_from_bits!(m64x8[test_v512]: m128x4);
+
+impl_from_bits!(i128x4[test_v512]: i8x64, u8x64, m8x64, i16x32, u16x32, m16x32, i32x16, u32x16, f32x16, m32x16, i64x8, u64x8, f64x8, m64x8, u128x4, m128x4);
+impl_from_bits!(u128x4[test_v512]: i8x64, u8x64, m8x64, i16x32, u16x32, m16x32, i32x16, u32x16, f32x16, m32x16, i64x8, u64x8, f64x8, m64x8, i128x4, m128x4);
+// note: m128x4 cannot be constructed from all the other masks bit patterns in here
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/into_bits/v64.rs
@@ -0,0 +1,18 @@
+//! `FromBits` and `IntoBits` implementations for portable 64-bit wide vectors
+#![rustfmt::skip]
+
+#[allow(unused)]  // wasm_bindgen_test
+use crate::*;
+
+impl_from_bits!(i8x8[test_v64]: u8x8, m8x8, i16x4, u16x4, m16x4, i32x2, u32x2, f32x2, m32x2);
+impl_from_bits!(u8x8[test_v64]: i8x8, m8x8, i16x4, u16x4, m16x4, i32x2, u32x2, f32x2, m32x2);
+impl_from_bits!(m8x8[test_v64]: m16x4, m32x2);
+
+impl_from_bits!(i16x4[test_v64]: i8x8, u8x8, m8x8, u16x4, m16x4, i32x2, u32x2, f32x2, m32x2);
+impl_from_bits!(u16x4[test_v64]: i8x8, u8x8, m8x8, i16x4, m16x4, i32x2, u32x2, f32x2, m32x2);
+impl_from_bits!(m16x4[test_v64]: m32x2);
+
+impl_from_bits!(i32x2[test_v64]: i8x8, u8x8, m8x8, i16x4, u16x4, m16x4, u32x2, f32x2, m32x2);
+impl_from_bits!(u32x2[test_v64]: i8x8, u8x8, m8x8, i16x4, u16x4, m16x4, i32x2, f32x2, m32x2);
+impl_from_bits!(f32x2[test_v64]: i8x8, u8x8, m8x8, i16x4, u16x4, m16x4, i32x2, u32x2, m32x2);
+// note: m32x2 cannot be constructed from all m16x4 or m8x8 bit patterns
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/math.rs
@@ -0,0 +1,4 @@
+//! Implements vertical math operations
+
+#[macro_use]
+mod float;
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/math/float.rs
@@ -0,0 +1,61 @@
+//! Implements vertical floating-point math operations.
+
+#[macro_use]
+mod abs;
+
+#[macro_use]
+mod consts;
+
+#[macro_use]
+mod cos;
+
+#[macro_use]
+mod exp;
+
+#[macro_use]
+mod powf;
+
+#[macro_use]
+mod ln;
+
+#[macro_use]
+mod mul_add;
+
+#[macro_use]
+mod mul_adde;
+
+#[macro_use]
+mod recpre;
+
+#[macro_use]
+mod rsqrte;
+
+#[macro_use]
+mod sin;
+
+#[macro_use]
+mod sqrt;
+
+#[macro_use]
+mod sqrte;
+
+macro_rules! impl_float_category {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident, $mask_ty:ident) => {
+        impl $id {
+            #[inline]
+            pub fn is_nan(self) -> $mask_ty {
+                self.ne(self)
+            }
+
+            #[inline]
+            pub fn is_infinite(self) -> $mask_ty {
+                self.eq(Self::INFINITY) | self.eq(Self::NEG_INFINITY)
+            }
+
+            #[inline]
+            pub fn is_finite(self) -> $mask_ty {
+                !(self.is_nan() | self.is_infinite())
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/math/float/abs.rs
@@ -0,0 +1,31 @@
+//! Implements vertical (lane-wise) floating-point `abs`.
+
+macro_rules! impl_math_float_abs {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident | $test_tt:tt) => {
+        impl $id {
+            /// Absolute value.
+            #[inline]
+            pub fn abs(self) -> Self {
+                use crate::codegen::math::float::abs::Abs;
+                Abs::abs(self)
+            }
+        }
+
+        test_if!{
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _math_abs>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn abs() {
+                        let o = $id::splat(1 as $elem_ty);
+                        assert_eq!(o, o.abs());
+
+                        let mo = $id::splat(-1 as $elem_ty);
+                        assert_eq!(o, mo.abs());
+                    }
+                }
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/math/float/consts.rs
@@ -0,0 +1,86 @@
+macro_rules! impl_float_consts {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident) => {
+        impl $id {
+            /// Machine epsilon value.
+            pub const EPSILON: $id = $id::splat(core::$elem_ty::EPSILON);
+
+            /// Smallest finite value.
+            pub const MIN: $id = $id::splat(core::$elem_ty::MIN);
+
+            /// Smallest positive normal value.
+            pub const MIN_POSITIVE: $id =
+                $id::splat(core::$elem_ty::MIN_POSITIVE);
+
+            /// Largest finite value.
+            pub const MAX: $id = $id::splat(core::$elem_ty::MAX);
+
+            /// Not a Number (NaN).
+            pub const NAN: $id = $id::splat(core::$elem_ty::NAN);
+
+            /// Infinity (∞).
+            pub const INFINITY: $id = $id::splat(core::$elem_ty::INFINITY);
+
+            /// Negative infinity (-∞).
+            pub const NEG_INFINITY: $id =
+                $id::splat(core::$elem_ty::NEG_INFINITY);
+
+            /// Archimedes' constant (π)
+            pub const PI: $id = $id::splat(core::$elem_ty::consts::PI);
+
+            /// π/2
+            pub const FRAC_PI_2: $id =
+                $id::splat(core::$elem_ty::consts::FRAC_PI_2);
+
+            /// π/3
+            pub const FRAC_PI_3: $id =
+                $id::splat(core::$elem_ty::consts::FRAC_PI_3);
+
+            /// π/4
+            pub const FRAC_PI_4: $id =
+                $id::splat(core::$elem_ty::consts::FRAC_PI_4);
+
+            /// π/6
+            pub const FRAC_PI_6: $id =
+                $id::splat(core::$elem_ty::consts::FRAC_PI_6);
+
+            /// π/8
+            pub const FRAC_PI_8: $id =
+                $id::splat(core::$elem_ty::consts::FRAC_PI_8);
+
+            /// 1/π
+            pub const FRAC_1_PI: $id =
+                $id::splat(core::$elem_ty::consts::FRAC_1_PI);
+
+            /// 2/π
+            pub const FRAC_2_PI: $id =
+                $id::splat(core::$elem_ty::consts::FRAC_2_PI);
+
+            /// 2/sqrt(π)
+            pub const FRAC_2_SQRT_PI: $id =
+                $id::splat(core::$elem_ty::consts::FRAC_2_SQRT_PI);
+
+            /// sqrt(2)
+            pub const SQRT_2: $id = $id::splat(core::$elem_ty::consts::SQRT_2);
+
+            /// 1/sqrt(2)
+            pub const FRAC_1_SQRT_2: $id =
+                $id::splat(core::$elem_ty::consts::FRAC_1_SQRT_2);
+
+            /// Euler's number (e)
+            pub const E: $id = $id::splat(core::$elem_ty::consts::E);
+
+            /// log<sub>2</sub>(e)
+            pub const LOG2_E: $id = $id::splat(core::$elem_ty::consts::LOG2_E);
+
+            /// log<sub>10</sub>(e)
+            pub const LOG10_E: $id =
+                $id::splat(core::$elem_ty::consts::LOG10_E);
+
+            /// ln(2)
+            pub const LN_2: $id = $id::splat(core::$elem_ty::consts::LN_2);
+
+            /// ln(10)
+            pub const LN_10: $id = $id::splat(core::$elem_ty::consts::LN_10);
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/math/float/cos.rs
@@ -0,0 +1,44 @@
+//! Implements vertical (lane-wise) floating-point `cos`.
+
+macro_rules! impl_math_float_cos {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident | $test_tt:tt) => {
+        impl $id {
+            /// Cosine.
+            #[inline]
+            pub fn cos(self) -> Self {
+                use crate::codegen::math::float::cos::Cos;
+                Cos::cos(self)
+            }
+
+            /// Cosine of `self * PI`.
+            #[inline]
+            pub fn cos_pi(self) -> Self {
+                use crate::codegen::math::float::cos_pi::CosPi;
+                CosPi::cos_pi(self)
+            }
+        }
+
+        test_if!{
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _math_cos>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn cos() {
+                        use crate::$elem_ty::consts::PI;
+                        let z = $id::splat(0 as $elem_ty);
+                        let o = $id::splat(1 as $elem_ty);
+                        let p = $id::splat(PI as $elem_ty);
+                        let ph = $id::splat(PI as $elem_ty / 2.);
+                        let z_r = $id::splat((PI as $elem_ty / 2.).cos());
+                        let o_r = $id::splat((PI as $elem_ty).cos());
+
+                        assert_eq!(o, z.cos());
+                        assert_eq!(z_r, ph.cos());
+                        assert_eq!(o_r, p.cos());
+                    }
+                }
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/math/float/exp.rs
@@ -0,0 +1,33 @@
+//! Implements vertical (lane-wise) floating-point `exp`.
+
+macro_rules! impl_math_float_exp {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident | $test_tt:tt) => {
+        impl $id {
+            /// Returns the exponential function of `self`: `e^(self)`.
+            #[inline]
+            pub fn exp(self) -> Self {
+                use crate::codegen::math::float::exp::Exp;
+                Exp::exp(self)
+            }
+        }
+
+        test_if!{
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _math_exp>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn exp() {
+                        let z = $id::splat(0 as $elem_ty);
+                        let o = $id::splat(1 as $elem_ty);
+                        assert_eq!(o, z.exp());
+
+                        let e = $id::splat(crate::f64::consts::E as $elem_ty);
+                        let tol = $id::splat(2.4e-4 as $elem_ty);
+                        assert!((e - o.exp()).abs().le(tol).all());
+                    }
+                }
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/math/float/ln.rs
@@ -0,0 +1,33 @@
+//! Implements vertical (lane-wise) floating-point `ln`.
+
+macro_rules! impl_math_float_ln {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident | $test_tt:tt) => {
+        impl $id {
+            /// Returns the natural logarithm of `self`.
+            #[inline]
+            pub fn ln(self) -> Self {
+                use crate::codegen::math::float::ln::Ln;
+                Ln::ln(self)
+            }
+        }
+
+        test_if!{
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _math_ln>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn ln() {
+                        let z = $id::splat(0 as $elem_ty);
+                        let o = $id::splat(1 as $elem_ty);
+                        assert_eq!(z, o.ln());
+
+                        let e = $id::splat(crate::f64::consts::E as $elem_ty);
+                        let tol = $id::splat(2.4e-4 as $elem_ty);
+                        assert!((o - e.ln()).abs().le(tol).all());
+                    }
+                }
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/math/float/mul_add.rs
@@ -0,0 +1,44 @@
+//! Implements vertical (lane-wise) floating-point `mul_add`.
+
+macro_rules! impl_math_float_mul_add {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident | $test_tt:tt) => {
+        impl $id {
+            /// Fused multiply add: `self * y + z`
+            #[inline]
+            pub fn mul_add(self, y: Self, z: Self) -> Self {
+                use crate::codegen::math::float::mul_add::MulAdd;
+                MulAdd::mul_add(self, y, z)
+            }
+        }
+
+        test_if!{
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _math_mul_add>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn mul_add() {
+                        let z = $id::splat(0 as $elem_ty);
+                        let o = $id::splat(1 as $elem_ty);
+                        let t = $id::splat(2 as $elem_ty);
+                        let t3 = $id::splat(3 as $elem_ty);
+                        let f = $id::splat(4 as $elem_ty);
+
+                        assert_eq!(z, z.mul_add(z, z));
+                        assert_eq!(o, o.mul_add(o, z));
+                        assert_eq!(o, o.mul_add(z, o));
+                        assert_eq!(o, z.mul_add(o, o));
+
+                        assert_eq!(t, o.mul_add(o, o));
+                        assert_eq!(t, o.mul_add(t, z));
+                        assert_eq!(t, t.mul_add(o, z));
+
+                        assert_eq!(f, t.mul_add(t, z));
+                        assert_eq!(f, t.mul_add(o, t));
+                        assert_eq!(t3, t.mul_add(o, o));
+                    }
+                }
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/math/float/mul_adde.rs
@@ -0,0 +1,48 @@
+//! Implements vertical (lane-wise) floating-point `mul_adde`.
+
+macro_rules! impl_math_float_mul_adde {
+    ([$elem_ty:ident; $elem_count:expr]: $id:ident | $test_tt:tt) => {
+        impl $id {
+            /// Fused multiply add estimate: ~= `self * y + z`
+            ///
+            /// While fused multiply-add (`fma`) has infinite precision,
+            /// `mul_adde` has _at worst_ the same precision of a multiply followed by an add.
+            /// This might be more efficient on architectures that do not have an `fma` instruction.
+            #[inline]
+            pub fn mul_adde(self, y: Self, z: Self) -> Self {
+                use crate::codegen::math::float::mul_adde::MulAddE;
+                MulAddE::mul_adde(self, y, z)
+            }
+        }
+
+        test_if!{
+            $test_tt:
+            paste::item! {
+                pub mod [<$id _math_mul_adde>] {
+                    use super::*;
+                    #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)]
+                    fn mul_adde() {
+                        let z = $id::splat(0 as $elem_ty);
+                        let o = $id::splat(1 as $elem_ty);
+                        let t = $id::splat(2 as $elem_ty);
+                        let t3 = $id::splat(3 as $elem_ty);
+                        let f = $id::splat(4 as $elem_ty);
+
+                        assert_eq!(z, z.mul_adde(z, z));
+                        assert_eq!(o, o.mul_adde(o, z));
+                        assert_eq!(o, o.mul_adde(z, o));
+                        assert_eq!(o, z.mul_adde(o, o));
+
+                        assert_eq!(t, o.mul_adde(o, o));
+                        assert_eq!(t, o.mul_adde(t, z));
+                        assert_eq!(t, t.mul_adde(o, z));
+
+                        assert_eq!(f, t.mul_adde(t, z));
+                        assert_eq!(f, t.mul_adde(o, t));
+                        assert_eq!(t3, t.mul_adde(o, o));
+                    }
+                }
+            }
+        }
+    };
+}
new file mode 100644
--- /dev/null
+++ b/third_party/rust/packed_simd/src/api/math/float/powf.rs
@@ -0,0 +1,36 @@
+//! Implements vertical (lane-wise) floating-point `powf`.
+
+macro_rules! impl_math_float_powf {